# 5. Minimizing Circuits

Size: px
Start display at page:

Transcription

1 5. MINIMIZING CIRCUITS Minimizing Circuits 5.. Minimizing Circuits. A circuit is minimized if it is a sum-of-products that uses the least number of products of literals and each product contains the least number of literals possible to produce the desired output. The laws of Boolean algebra can often be used to simplif a complicated Boolean epression, particularl the sum-of-products epressions that we have used to represent Boolean functions. An such simplification also leads to a simplification of combinatorial circuits Eample Eample F (,, z) = z + z + z + z Mimimized Epression: + z. We can simplif the epression in Eample 5.2. as follows. (z + z) + ( z + z) = (z + z) + z( + ) = () + z() = + z There are various methods that do not require ad-hoc manipulation of variables for simplifing epressions and we cover two of the basic methods here: Karnaugh Maps and Quine McCluske Karnaugh Maps. () For a given number of variables, n, form a table containing s for all possible minterms arranged so the minterms that are adjacent (left to right or above and below) differ b onl a singe literal. (2) Circle blocks of adjacent s. Start with the largest possible block with number of rows and columns powers of 2. Continue circling the largest block possible so that ever is within at least one block. (3) The simplified form is the sum of the products represented b each block Two Variables. The Table below shows how the Karnaugh map represents the minterms for two variables.

2 5. MINIMIZING CIRCUITS 47 Eample 5.4. (Eample : Two Variables). Simplif + +. Solution. First create a table with s corresponding to each minterm. Net circle blocks of size 2 2, 2, and/or blocks of size Last, write the sum of the terms represented b the circled blocks. + When using the Karnaugh maps to simplif functions of two variable we tr to find blocks of s. If all 4 squares have ones, we have a 2 2 block we circle. Otherwise look for 2 blocks of ones. Circle an block of this size possible. If there is a not covered, see if it is in a 2 block. If it is circle the block, if not circle the one. Continue in this manner until all the ones are circled.

3 5. MINIMIZING CIRCUITS 48 Now, suppose the blocks representing and are circled. The product that corresponds to this block is since + = ( + ) =. A method of determining the product corresponding to a block is to look for the literal(s) that are the same in ever entr in that block Three Variables. The Table below shows how the Karnaugh map represents the minterms for three variables. z z z z z z z z The Karnaugh maps ma be set up with the variables in different arrangements than the one in the above chart, but the must be set up so that adjacent squares differ b onl one literal. Notice the entries in the left column differ from the ones in the right column b a single variable. We consider the top left adjacent to the top right and the bottom left adjacent to the bottom right. If ou imagine rolling the chart and taping the red edges ou have a tube which best represents this Karnaugh map. Eample Eample 2: Three Variables Simplif z + z + z + z + z +. Solution: First create a table with s corresponding to each minterm. Net circle blocks of size 2 4, 4, 2 2, 2 and/or blocks of size

4 5. MINIMIZING CIRCUITS 49 Last, write the sum of the terms represented b the circled blocks. z + To simplif we check as follows () If all the squares have ones the function simplifies to. (2) Check for blocks of size 2 2, 4, 2, or. Circle the largest block ou can find. (3) If there is a not circled, find the largest possible block containing it and if possible tr to use a block that contains other s that are not circled. (4) continue until all the s have been circled. (5) Write down the sum of the products represented b the circled blocks Four Variables. The Table below shows how the Karnaugh map represents the minterms for four variables. As with the map with three variables, we consider the squares on the left adjacent to the corresponding ones on the right. In addition we wish to consider the top

5 5. MINIMIZING CIRCUITS 50 row entries adjacent to the corresponding entries in the bottom row. This ma be visualized b rolling the chart so we tape the red edges together to create a tube. Now curve the tube around so the blue edges ma be taped together to create a donut shape (also called a torus). Eample 5.6. (Eample 3: Four Variables). Simplif u z + + u z + +. Solution. First create a table with s corresponding to each minterm. Net circle blocks of size 4 4, 2 4, 4, 2 2, 2 and/or blocks of size Last, write the sum of the terms represented b the circled blocks. v + v This time we check for blocks of size 4 4, 2 4, 2 2, 4, 2, or.

6 5. MINIMIZING CIRCUITS 5 The Karnaugh maps begin to lose their ease of use when we move to more variables. It is still possible to use Karnaugh maps for four variables, but the adjacent squares are more difficult to visualize. Eercise Draw Karnaugh maps for five variables and identif which blocks are adjacent Quine-McCluske Method. The Quine-McCluske method is a method used for simplifing the conjunctive normal form of a Boolean epression. This method is easier to program than the Karnaugh Maps. Eample Simplif the epression u v + + u v + Solution. () Represent each minterm b a binar string. Use for the variable and 0 for the complement: (2) Make a table listing the minterms, the binar strings, and the number of s in the stings. Enumerate the list. Minterm String no. of ones u v u v (3) Find the strings that differ b onl one bit. Replace the different bit with a dash and remove the variable from the product that corresponds to that bit. (4) Create a new table b listing the combined product, the new product, and the binar string. Product String (, 2) v (, 3) (4, 5) 00 (4, 6) v 0 0 (5, 7) v 00 0 (6, 7) u v 000 (5) Use the previous table to continue to reduce the products b finding strings that differ b one bit.

7 5. MINIMIZING CIRCUITS 52 Product String ((4, 5), (6, 7)) v 0 0 (6) Since there are no bit strings in the last table that differ b a single bit we are read to find the simplified epression. (7) From the last table we have the string v. This simplified the minterms numbered 4 through 7. From the table before we look for strings that simplif the minterms numbered through 3. We use v and to cover the minterms, 2, and 3. The simplified form is v + v + Notice that a string with a certain number of s will have eactl one more or one less if one of the bits are changed. Thus when we are looking for bit strings that differ b onl one bit we onl need to look at the bits that have eactl one more or one less. This is the onl reason we add a column with the number of s in it. We could also add this column in the later tables. Combining (4, 5) and (6, 7) gives us the same string as we get b combining (4, 6) and (5, 7), so we onl use one of these combinations. An time the numbers are the same we will obtain the same string. We continue creating tables until we get to a table where none of the bit strings in that table differ b a single bit (including the dashes). Once we have all the tables created we need to cover all the minterms. In this eample, we start with the last table and use the strings given in that table to cover the minterms numbered 4, 5, 6, 7. Since this was the onl product in the last table we now move to the second to the last table and look one or more products that cover the remaining minterms,, 2, and 3. Since there is a product that covers and 2 we will use it. Now we have to cover 3. An product that covers 3 will do, but there is onl one choice in this table so we use it. If there had not been a product in the second to the last table that covered 3, we would move up to the previous table. It is possible to an epression to have more than one minimal epression. It is also possible that there are several choices of strings from a given table that could be used to cover the minterms. We chose the combinations that use the fewest possible strings to cover the most minterms.

### 24 Nov Boolean Operations. Boolean Algebra. Boolean Functions and Expressions. Boolean Functions and Expressions

24 Nov 25 Boolean Algebra Boolean algebra provides the operations and the rules for working with the set {, }. These are the rules that underlie electronic circuits, and the methods we will discuss are

### Simplification of Boolean Functions

COM111 Introduction to Computer Engineering (Fall 2006-2007) NOTES 5 -- page 1 of 5 Introduction Simplification of Boolean Functions You already know one method for simplifying Boolean expressions: Boolean

### Boolean Functions (10.1) Representing Boolean Functions (10.2) Logic Gates (10.3)

Chapter (Part ): Boolean Algebra Boolean Functions (.) Representing Boolean Functions (.2) Logic Gates (.3) It has started from the book titled The laws of thought written b George Boole in 854 Claude

### Review: Standard forms of expressions

Karnaugh maps Last time we saw applications of Boolean logic to circuit design. The basic Boolean operations are AND, OR and NOT. These operations can be combined to form complex expressions, which can

### ENGIN 112. Intro to Electrical and Computer Engineering

ENIN 2 Intro to Electrical and Computer Engineering Lecture 6 More Boolean Algebra ENIN2 L6: More Boolean Algebra September 5, 23 A B Overview Epressing Boolean functions Relationships between algebraic

### Introduction to Microprocessors and Digital Logic (ME262) Boolean Algebra and Logic Equations. Spring 2011

Introduction to Microprocessors and Digital (ME262) lgebra and Spring 2 Outline. lgebra 2. 3. Karnaugh Maps () 4. Two-variable 5. 6. 7. 2 lgebra s of Simplifying equations are defined in terms of inary

### User s Manual. Ronwaldo A. Collado Diosdado Y. Tejoso Jr. CMSC 130 Logistic Design and Digital Computer Circuits Second Semester, A. Y.

The Quine-McCluskey Method, also known as the Tabulation Method is a specific step-by-step method that is ensured to generate a simplified standard-form expression for a function. Ronwaldo A. Collado Diosdado

### Combinational Logic Circuits

Chapter 3 Combinational Logic Circuits 12 Hours 24 Marks 3.1 Standard representation for logical functions Boolean expressions / logic expressions / logical functions are expressed in terms of logical

### Boolean Function Simplification

Universit of Wisconsin - Madison ECE/Comp Sci 352 Digital Sstems Fundamentals Charles R. Kime Section Fall 200 Chapter 2 Combinational Logic Circuits Part 5 Charles Kime & Thomas Kaminski Boolean Function

### Experiment 4 Boolean Functions Implementation

Experiment 4 Boolean Functions Implementation Introduction: Generally you will find that the basic logic functions AND, OR, NAND, NOR, and NOT are not sufficient to implement complex digital logic functions.

### Gate-Level Minimization. section instructor: Ufuk Çelikcan

Gate-Level Minimization section instructor: Ufuk Çelikcan Compleity of Digital Circuits Directly related to the compleity of the algebraic epression we use to build the circuit. Truth table may lead to

### Combinational Logic Circuits Part III -Theoretical Foundations

Combinational Logic Circuits Part III -Theoretical Foundations Overview Simplifying Boolean Functions Algebraic Manipulation Karnaugh Map Manipulation (simplifying functions of 2, 3, 4 variables) Systematic

### Definitions. 03 Logic networks Boolean algebra. Boolean set: B 0,

3. Boolean algebra 3 Logic networks 3. Boolean algebra Definitions Boolean functions Properties Canonical forms Synthesis and minimization alessandro bogliolo isti information science and technology institute

### Chapter 2. Boolean Expressions:

Chapter 2 Boolean Expressions: A Boolean expression or a function is an expression which consists of binary variables joined by the Boolean connectives AND and OR along with NOT operation. Any Boolean

### ENGIN 112 Intro to Electrical and Computer Engineering

ENGIN 2 Intro to Electrical and Computer Engineering Lecture 8 Minimization with Karnaugh Maps Overview K-maps: an alternate approach to representing oolean functions K-map representation can be used to

### Module -7. Karnaugh Maps

1 Module -7 Karnaugh Maps 1. Introduction 2. Canonical and Standard forms 2.1 Minterms 2.2 Maxterms 2.3 Canonical Sum of Product or Sum-of-Minterms (SOM) 2.4 Canonical product of sum or Product-of-Maxterms(POM)

### Chapter 2 Part 5 Combinational Logic Circuits

Universit of Wisconsin - Madison ECE/Comp Sci 352 Digital Sstems Fundamentals Kewal K. Saluja and Yu Hen Hu Spring 2002 Chapter 2 Part 5 Combinational Logic Circuits Originals b: Charles R. Kime and Tom

### Karnaugh Map (K-Map) Karnaugh Map. Karnaugh Map Examples. Ch. 2.4 Ch. 2.5 Simplification using K-map

Karnaugh Map (K-Map) Ch. 2.4 Ch. 2.5 Simplification using K-map A graphical map method to simplify Boolean function up to 6 variables A diagram made up of squares Each square represents one minterm (or

### A graphical method of simplifying logic

4-5 Karnaugh Map Method A graphical method of simplifying logic equations or truth tables. Also called a K map. Theoretically can be used for any number of input variables, but practically limited to 5

### Bawar Abid Abdalla. Assistant Lecturer Software Engineering Department Koya University

Logic Design First Stage Lecture No.6 Boolean Algebra Bawar Abid Abdalla Assistant Lecturer Software Engineering Department Koya University Outlines Boolean Operations Laws of Boolean Algebra Rules of

### A B AB CD Objectives:

Objectives:. Four variables maps. 2. Simplification using prime implicants. 3. "on t care" conditions. 4. Summary.. Four variables Karnaugh maps Minterms A A m m m3 m2 A B C m4 C A B C m2 m8 C C m5 C m3

### 3.4 QUINE MCCLUSKEY METHOD 73. f(a, B, C, D, E)¼AC ĒþB CD þ BCDþĀBD.

3.4 QUINE MCCLUSKEY METHOD 73 FIGURE 3.22 f(a, B, C, D, E)¼B CD þ BCD. FIGURE 3.23 f(a, B, C, D, E)¼AC ĒþB CD þ BCDþĀBD. A¼1map are, 1, and 1, respectively, whereas the corresponding entries in the A¼0

### S1 Teknik Telekomunikasi Fakultas Teknik Elektro FEH2H3 2016/2017

S1 Teknik Telekomunikasi Fakultas Teknik Elektro FEH2H3 2016/2017 Karnaugh Map Karnaugh maps Last time we saw applications of Boolean logic to circuit design. The basic Boolean operations are AND, OR and

### UNIT II. Circuit minimization

UNIT II Circuit minimization The complexity of the digital logic gates that implement a Boolean function is directly related to the complexity of the algebraic expression from which the function is implemented.

### Homework. Update on website issue Reading: Chapter 7 Homework: All exercises at end of Chapter 7 Due 9/26

Homework Update on website issue Reading: hapter 7 Homework: All exercises at end of hapter 7 Due 9/26 opyright c 22 28 UMaine omputer Science Department / 2 OS 4: Foundations of omputer Science Karnaugh

### Chapter 2 Combinational Logic Circuits

Logic and Computer Design Fundamentals Chapter 2 Combinational Logic Circuits Part 2 Circuit Optimization Overview Part Gate Circuits and Boolean Equations Binary Logic and Gates Boolean Algebra Standard

### Transformations of Functions. 1. Shifting, reflecting, and stretching graphs Symmetry of functions and equations

Chapter Transformations of Functions TOPICS.5.. Shifting, reflecting, and stretching graphs Smmetr of functions and equations TOPIC Horizontal Shifting/ Translation Horizontal Shifting/ Translation Shifting,

### To write Boolean functions in their standard Min and Max terms format. To simplify Boolean expressions using Karnaugh Map.

3.1 Objectives To write Boolean functions in their standard Min and Max terms format. To simplify Boolean expressions using. 3.2 Sum of Products & Product of Sums Any Boolean expression can be simplified

### 4 KARNAUGH MAP MINIMIZATION

4 KARNAUGH MAP MINIMIZATION A Karnaugh map provides a systematic method for simplifying Boolean expressions and, if properly used, will produce the simplest SOP or POS expression possible, known as the

### Simplification of Boolean Functions

Simplification of Boolean Functions Contents: Why simplification? The Map Method Two, Three, Four and Five variable Maps. Simplification of two, three, four and five variable Boolean function by Map method.

### STRAND J: TRANSFORMATIONS, VECTORS and MATRICES

Mathematics SKE, Strand J UNIT J Further Transformations: Tet STRND J: TRNSFORMTIONS, VETORS and MTRIES J Further Transformations Tet ontents Section J.1 Translations * J. ombined Transformations Mathematics

### Rational Functions with Removable Discontinuities

Rational Functions with Removable Discontinuities 1. a) Simplif the rational epression and state an values of where the epression is b) Using the simplified epression in part (a), predict the shape for

### CHAPTER-2 STRUCTURE OF BOOLEAN FUNCTION USING GATES, K-Map and Quine-McCluskey

CHAPTER-2 STRUCTURE OF BOOLEAN FUNCTION USING GATES, K-Map and Quine-McCluskey 2. Introduction Logic gates are connected together to produce a specified output for certain specified combinations of input

### Date Performed: Marks Obtained: /10. Group Members (ID):. Experiment # 04. Boolean Expression Simplification and Implementation

Name: Instructor: Engr. Date Performed: Marks Obtained: /10 Group Members (ID):. Checked By: Date: Experiment # 04 Boolean Expression Simplification and Implementation OBJECTIVES: To understand the utilization

### Chapter 2 Combinational Logic Circuits

Logic and Computer Design Fundamentals Chapter 2 Combinational Logic Circuits Part 2 Circuit Optimization Charles Kime & Thomas Kaminski 2008 Pearson Education, Inc. (Hyperlinks are active in View Show

### I. This material refers to mathematical methods designed for facilitating calculations in matrix

A FEW CONSIDERATIONS REGARDING MATRICES operations. I. This material refers to mathematical methods designed for facilitating calculations in matri In this case, we know the operations of multiplying two

### Digital Logic Lecture 7 Gate Level Minimization

Digital Logic Lecture 7 Gate Level Minimization By Ghada Al-Mashaqbeh The Hashemite University Computer Engineering Department Outline Introduction. K-map principles. Simplification using K-maps. Don t-care

### EXAMPLE A {(1, 2), (2, 4), (3, 6), (4, 8)}

Name class date Understanding Relations and Functions A relation shows how one set of things is related to, or corresponds to, another set. For instance, the equation A 5 s shows how the area of a square

### CprE 281: Digital Logic

CprE 28: Digital Logic Instructor: Alexander Stoytchev http://www.ece.iastate.edu/~alexs/classes/ Minimization CprE 28: Digital Logic Iowa State University, Ames, IA Copyright Alexander Stoytchev Administrative

### Gate-Level Minimization. BME208 Logic Circuits Yalçın İŞLER

Gate-Level Minimization BME28 Logic Circuits Yalçın İŞLER islerya@yahoo.com http://me.islerya.com Complexity of Digital Circuits Directly related to the complexity of the algebraic expression we use to

Summary Boolean Addition In Boolean algebra, a variable is a symbol used to represent an action, a condition, or data. A single variable can only have a value of or 0. The complement represents the inverse

### IT 201 Digital System Design Module II Notes

IT 201 Digital System Design Module II Notes BOOLEAN OPERATIONS AND EXPRESSIONS Variable, complement, and literal are terms used in Boolean algebra. A variable is a symbol used to represent a logical quantity.

### 3.6 Graphing Piecewise-Defined Functions and Shifting and Reflecting Graphs of Functions

76 CHAPTER Graphs and Functions Find the equation of each line. Write the equation in the form = a, = b, or = m + b. For Eercises through 7, write the equation in the form f = m + b.. Through (, 6) and

### Combinational Circuits Digital Logic (Materials taken primarily from:

Combinational Circuits Digital Logic (Materials taken primarily from: http://www.facstaff.bucknell.edu/mastascu/elessonshtml/eeindex.html http://www.cs.princeton.edu/~cos126 ) Digital Systems What is a

### Digital Circuits ECS 371

Digital Circuits ECS 37 Dr. Prapun Suksompong prapun@siit.tu.ac.th Lecture 7 Office Hours: KD 36-7 Monday 9:-:3, :3-3:3 Tuesday :3-:3 Announcement HW2 posted on the course web site Chapter 4: Write down

### Appendix A.6 Functions

A. Functions 539 RELATIONS: DOMAIN AND RANGE Appendi A. Functions A relation is a set of ordered pairs. A relation can be a simple set of just a few ordered pairs, such as {(0, ), (1, 3), (, )}, or it

### Exponential and Logarithmic Functions

Eponential and Logarithmic Functions Figure Electron micrograph of E. Coli bacteria (credit: Mattosaurus, Wikimedia Commons) CHAPTER OUTLINE. Eponential Functions. Logarithmic Properties. Graphs of Eponential

### Exponential and Logarithmic Functions

Eponential and Logarithmic Functions Figure Electron micrograph of E. Coli bacteria (credit: Mattosaurus, Wikimedia Commons) Chapter Outline. Eponential Functions. Logarithmic Properties. Graphs of Eponential

### Plot and connect the points in a coordinate plane to make a polygon. Name the polygon.

. Start Thinking Find at least two objects in each of the following categories: circle, square, triangle, and rectangle (nonsquare). Use a table to compare each object of the same categor in the following

### Gate Level Minimization Map Method

Gate Level Minimization Map Method Complexity of hardware implementation is directly related to the complexity of the algebraic expression Truth table representation of a function is unique Algebraically

### 7. f(x) = 1 2 x f(x) = x f(x) = 4 x at x = 10, 8, 6, 4, 2, 0, 2, and 4.

Section 2.2 The Graph of a Function 109 2.2 Eercises Perform each of the following tasks for the functions defined b the equations in Eercises 1-8. i. Set up a table of points that satisf the given equation.

### p Graph square root functions. VOCABULARY Radical expression Radical function Square root function Parent square root function

. Graph Square Root Functions Goal p Graph square root functions. Your Notes VOCABULARY Radical epression Radical function Square root function Parent square root function PARENT FUNCTION FOR SQUARE ROOT

### Chapter 3 Simplification of Boolean functions

3.1 Introduction Chapter 3 Simplification of Boolean functions In this chapter, we are going to discuss several methods for simplifying the Boolean function. What is the need for simplifying the Boolean

### Experiment 3: Logic Simplification

Module: Logic Design Name:... University no:.. Group no:. Lab Partner Name: Mr. Mohamed El-Saied Experiment : Logic Simplification Objective: How to implement and verify the operation of the logical functions

### Literal Cost F = BD + A B C + A C D F = BD + A B C + A BD + AB C F = (A + B)(A + D)(B + C + D )( B + C + D) L = 10

Circuit Optimization Goal: To obtain the simplest implementation for a given function Optimization is a more formal approach to simplification that is performed using a specific procedure or algorithm

### Chapter 3. Gate-Level Minimization. Outlines

Chapter 3 Gate-Level Minimization Introduction The Map Method Four-Variable Map Five-Variable Map Outlines Product of Sums Simplification Don t-care Conditions NAND and NOR Implementation Other Two-Level

### CS470: Computer Architecture. AMD Quad Core

CS470: Computer Architecture Yashwant K. Malaiya, Professor malaiya@cs.colostate.edu AMD Quad Core 1 Architecture Layers Building blocks Gates, flip-flops Functional bocks: Combinational, Sequential Instruction

### Points Addressed in this Lecture. Standard form of Boolean Expressions. Lecture 4: Logic Simplication & Karnaugh Map

Points Addressed in this Lecture Lecture 4: Logic Simplication & Karnaugh Map Professor Peter Cheung Department of EEE, Imperial College London Standard form of Boolean Expressions Sum-of-Products (SOP),

### Standard Forms of Expression. Minterms and Maxterms

Standard Forms of Expression Minterms and Maxterms Standard forms of expressions We can write expressions in many ways, but some ways are more useful than others A sum of products (SOP) expression contains:

### Matrix Representations

CONDENSED LESSON 6. Matri Representations In this lesson, ou Represent closed sstems with transition diagrams and transition matrices Use matrices to organize information Sandra works at a da-care center.

### Combinational Logic & Circuits

Week-I Combinational Logic & Circuits Spring' 232 - Logic Design Page Overview Binary logic operations and gates Switching algebra Algebraic Minimization Standard forms Karnaugh Map Minimization Other

### Lecture 10: Combinational Circuits

Computer Architecture Lecture : Combinational Circuits Previous two lectures.! TOY machine. Net two lectures.! Digital circuits. George Boole (85 864) Claude Shannon (96 2) Culminating lecture.! Putting

### LSN 4 Boolean Algebra & Logic Simplification. ECT 224 Digital Computer Fundamentals. Department of Engineering Technology

LSN 4 Boolean Algebra & Logic Simplification Department of Engineering Technology LSN 4 Key Terms Variable: a symbol used to represent a logic quantity Compliment: the inverse of a variable Literal: a

### Transformations of y = x 2 Parent Parabola

Transformations of = 2 SUGGESTED LEARNING STRATEGIES: Marking the Tet, Interactive Word Wall, Create Representations, Quickwrite 1. Graph the parent quadratic function, f () = 2, on the coordinate grid

### TIPS4RM: MHF4U: Unit 1 Polynomial Functions

TIPSRM: MHFU: Unit Polnomial Functions 008 .5.: Polnomial Concept Attainment Activit Compare and contrast the eamples and non-eamples of polnomial functions below. Through reasoning, identif attributes

### STRAND I: Geometry and Trigonometry. UNIT 37 Further Transformations: Student Text Contents. Section Reflections. 37.

MEP Jamaica: STRN I UNIT 7 Further Transformations: Student Tet ontents STRN I: Geometr and Trigonometr Unit 7 Further Transformations Student Tet ontents Section 7. Reflections 7. Rotations 7. Translations

### 2.8 Distance and Midpoint Formulas; Circles

Section.8 Distance and Midpoint Formulas; Circles 9 Eercises 89 90 are based on the following cartoon. B.C. b permission of Johnn Hart and Creators Sndicate, Inc. 89. Assuming that there is no such thing

### Section 2.2: Absolute Value Functions, from College Algebra: Corrected Edition by Carl Stitz, Ph.D. and Jeff Zeager, Ph.D. is available under a

Section.: Absolute Value Functions, from College Algebra: Corrected Edition b Carl Stitz, Ph.D. and Jeff Zeager, Ph.D. is available under a Creative Commons Attribution-NonCommercial-ShareAlike.0 license.

### Chapter 6. Logic Design Optimization Chapter 6

Chapter 6 Logic Design Optimization Chapter 6 Optimization The second part of our design process. Optimization criteria: Performance Size Power Two-level Optimization Manipulating a function until it is

### DKT 122/3 DIGITAL SYSTEM 1

Company LOGO DKT 122/3 DIGITAL SYSTEM 1 BOOLEAN ALGEBRA (PART 2) Boolean Algebra Contents Boolean Operations & Expression Laws & Rules of Boolean algebra DeMorgan s Theorems Boolean analysis of logic circuits

### 2.2 Absolute Value Functions

. Absolute Value Functions 7. Absolute Value Functions There are a few was to describe what is meant b the absolute value of a real number. You ma have been taught that is the distance from the real number

### Investigation Free Fall

Investigation Free Fall Name Period Date You will need: a motion sensor, a small pillow or other soft object What function models the height of an object falling due to the force of gravit? Use a motion

### 3.5 Rational Functions

0 Chapter Polnomial and Rational Functions Rational Functions For a rational function, find the domain and graph the function, identifing all of the asmptotes Solve applied problems involving rational

### A Rational Shift in Behavior. Translating Rational Functions. LEARnIng goals

. A Rational Shift in Behavior LEARnIng goals In this lesson, ou will: Analze rational functions with a constant added to the denominator. Compare rational functions in different forms. Identif vertical

### 9/10/2016. ECE 120: Introduction to Computing. The Domain of a Boolean Function is a Hypercube. List All Implicants for One Variable A

University of Illinois at Urbana-Champaign Dept. of Electrical and Computer Engineering ECE 120: Introduction to Computing To Simplify, Write Function as a Sum of Prime Implicants One way to simplify a

### LESSON 3.1 INTRODUCTION TO GRAPHING

LESSON 3.1 INTRODUCTION TO GRAPHING LESSON 3.1 INTRODUCTION TO GRAPHING 137 OVERVIEW Here s what ou ll learn in this lesson: Plotting Points a. The -plane b. The -ais and -ais c. The origin d. Ordered

CSC 258H1 Y 2016 Midterm Test Duration 1 hour and 50 minutes Aids allowed: none Student Number: UTORid: Last Name: First Name: Question 0. [1 mark] Read and follow all instructions on this page, and fill

### Double Integrals in Polar Coordinates

Double Integrals in Polar Coordinates. A flat plate is in the shape of the region in the first quadrant ling between the circles + and +. The densit of the plate at point, is + kilograms per square meter

### Digital Logic Design. Midterm #1

The University of Toleo f6ms_il7.fm - EECS: igital Logic esign r. Anthony. Johnson Stuent Name_ igital Logic esign Miterm # Problems Points. 3. 4 3. 6 4. Total 5 Was the eam fair? yes no 9/9/6 The University

### Unit-IV Boolean Algebra

Unit-IV Boolean Algebra Boolean Algebra Chapter: 08 Truth table: Truth table is a table, which represents all the possible values of logical variables/statements along with all the possible results of

### Technology Assignment: Limits at Infinity

The goal of this technology assignment is to find the location of the horizontal asymptote for your model from Technology Assignment: Rational Model. You will produce a graph similar to the one below.

### Chapter 2 Combinational

Computer Engineering 1 (ECE290) Chapter 2 Combinational Logic Circuits Part 2 Circuit Optimization HOANG Trang 2008 Pearson Education, Inc. Overview Part 1 Gate Circuits and Boolean Equations Binary Logic

Answers Investigation Applications. a. At seconds, the flare will have traveled to a maimum height of 00 ft. b. The flare will hit the water when the height is 0 ft, which will occur at 0 seconds. c. In

### Gate Level Minimization

Gate Level Minimization By Dr. M. Hebaishy Digital Logic Design Ch- Simplifying Boolean Equations Example : Y = AB + AB Example 2: = B (A + A) T8 = B () T5 = B T Y = A(AB + ABC) = A (AB ( + C ) ) T8 =

### Check Skills You ll Need (For help, go to Lesson 1-2.) Evaluate each expression for the given value of x.

A_3eSE_00X 0/6/005 :3 AM Page - Eploring Eponential Models Lesson Preview What You ll Learn To model eponential growth To model eponential deca... And Wh To model a car s depreciation, as in Eample 6 Check

### Ready To Go On? Skills Intervention 4-1 Graphing Relationships

Read To Go On? Skills Intervention -1 Graphing Relationships Find these vocabular words in Lesson -1 and the Multilingual Glossar. Vocabular continuous graph discrete graph Relating Graphs to Situations

### Learning Objectives: Topic Karnaugh Maps. At the end of this topic you will be able to;

Topic.2.3 Karnaugh Maps Learning Objectives: t the end of this topic you will be able to; Draw a Karnaugh map for a logic system with up to four inputs and use it to minimise the number of gates required;

### Functions: The domain and range

Mathematics Learning Centre Functions: The domain and range Jackie Nicholas Jacquie Hargreaves Janet Hunter c 6 Universit of Sdne Mathematics Learning Centre, Universit of Sdne Functions In these notes

### University of Technology

University of Technology Lecturer: Dr. Sinan Majid Course Title: microprocessors 4 th year Lecture 5 & 6 Minimization with Karnaugh Maps Karnaugh maps lternate way of representing oolean function ll rows

### Incompletely Specified Functions with Don t Cares 2-Level Transformation Review Boolean Cube Karnaugh-Map Representation and Methods Examples

Lecture B: Logic Minimization Incompletely Specified Functions with Don t Cares 2-Level Transformation Review Boolean Cube Karnaugh-Map Representation and Methods Examples Incompletely specified functions

### Gate-Level Minimization

MEC520 디지털공학 Gate-Level Minimization Jee-Hwan Ryu School of Mechanical Engineering Gate-Level Minimization-The Map Method Truth table is unique Many different algebraic expression Boolean expressions may

### Concept: Slope of a Line

Concept: Slope of a Line Warm Up Name: The following suggested activities would serve as a review to consolidate previous learning. While promoting rich mathematical dialog, the will also provide students

### Name Class Date. subtract 3 from each side. w 5z z 5 2 w p - 9 = = 15 + k = 10m. 10. n =

Reteaching Solving Equations To solve an equation that contains a variable, find all of the values of the variable that make the equation true. Use the equalit properties of real numbers and inverse operations

### 2.2. Changing One Dimension

2.2 Changing One Dimension The epression (n - 2)(n + 2) is in factored form because it is written as a product of factors. The epression n 2-4 is in epanded form because it is written as the sum or difference

### Using Euler s Theorem

Using Euler s Theorem Suppose that a connected, planar graph has 249 vertices and 57 faces. How many edges does it have? A: 106 B: 194 C: 304 D: 306 E: We don t have enough information Using Euler s Theorem

### Chapter 3. Boolean Algebra and Digital Logic

Chapter 3 Boolean Algebra and Digital Logic Chapter 3 Objectives Understand the relationship between Boolean logic and digital computer circuits. Learn how to design simple logic circuits. Understand how