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2 Applied Digital Logic Exercises Using FPGAs
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4 Applied Digital Logic Exercises Using FPGAs Kurt Wick University of Minnesota, USA Morgan & Claypool Publishers
5 Copyright ª 2017 Morgan & Claypool Publishers All rights reserved. No part of this publication may be reproduced, stored in a retrieval system or transmitted in any form or by any means, electronic, mechanical, photocopying, recording or otherwise, without the prior permission of the publisher, or as expressly permitted by law or under terms agreed with the appropriate rights organization. Multiple copying is permitted in accordance with the terms of licences issued by the Copyright Licensing Agency, the Copyright Clearance Centre and other reproduction rights organisations. Rights & Permissions To obtain permission to re-use copyrighted material from Morgan & Claypool Publishers, please contact info@morganclaypool.com. ISBN ISBN ISBN (ebook) (print) (mobi) DOI / Version: IOP Concise Physics ISSN (online) ISSN (print) A Morgan & Claypool publication as part of IOP Concise Physics Published by Morgan & Claypool Publishers, 1210 Fifth Avenue, Suite 250, San Rafael, CA, 94901, USA IOP Publishing, Temple Circus, Temple Way, Bristol BS1 6HG, UK
6 To Ying, Chloe and Abby.
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8 Contents Preface Acknowledgments Author biography xi xii xiii 1 Introduction to digital logic 1-1 Additional reading Basic definitions of digital concepts Definition Analog versus digital analogy Binary states and digital logic levels Manipulating digital logic levels with operators or gates Digital and Boolean logic and its representation Fundamental gates Basic Boolean logic rules: application and examples Interchangeability of gates and De Morgan s theorem Implementing digital logic Implementing truth tables with Boolean logic expressions Creating a schematic representation from a Boolean expression Creating a Boolean expression from a schematic representations Tri-state logic Boolean logic expression summary Exercises FPGA and VERILOG: combinational logic I 2-1 Additional reading Introduction to digital hardware Application specific standard parts (ASSP): 74XX digital logic chips Review exercises Introduction to the Vivado design environment and the 2-4 BASYS3 boards Objective Hardware: BASYS3 board with the Xilinx Artix 7 FPGA Vivado project development: overview Review exercises Introduction to Verilog: wires, vectors, buses and Verilog operators 2-23 vii
9 Applied Digital Logic Exercises Using FPGAs Single-bit wires and vectors I/O ports and internal wires Extracting individual bits from vectors Bundling bits into vectors, concatenation Verilog operators Exercises Review exercises Instantiating modules Example of how to instantiate a module Review exercises: eight-input XOR gate/parity checker FPGA and VERILOG: combinational logic part II 3-1 Additional reading Binary number representation and Boolean mathematics Exercise: instantiating the seven-segment display Binary number representations and notation Review exercises: binary number representation exercises Signed binary numbers: two s complement Review exercises: binary number representation: signed numbers 3-9 and two s complement 3.2 Boolean algebra and adder circuits Half adder circuit Full adder circuit bit adder/calculator bit subtractor/calculator and two s complement Summary Review exercises: 8-bit adder/calculator Multiplexers (MUX)/demultiplexers (DEMUX) MUX application: look-up tables (LUTs) Review exercises: MUX/DEMUX Verilog implementation: conditional logic with a single 3-20 logic condition Verilog implementation: conditional logic with a multiple 3-20 logic condition Review exercises: MUX/DEMUX II Verilog project: look-up table (encoder) Conclusion on MUXs and FPGAs Review exercises: MUX/DEMUX III 3-22 viii
10 Applied Digital Logic Exercises Using FPGAs 4 FPGA and VERILOG part II: sequential logic 4-1 Additional reading Sequential logic: latches Verilog implementation of a transparent latch Review exercises Sequential logic: flip-flops Verilog implementation of a D-type flip-flop Flip-flop exercise Flip-flop exercise Review exercises Sequential logic: fundamental counters Counter exercise Review exercises Counter exercise Review exercises Sequential logic: counters with logic conditions Example 1: previous exercise using adders Example 2: decade counter; sequential logic if else statements Exercise 1: 44.1 khz audio clock Connecting signals to and from the BASYS3 board Review exercises Pulse width modulation (PWM) Introduction: digital-to-analog conversion methods, pulse 4-20 width modulation Introduction: light (LED) dimmer Simple PWM technique Exercise Review exercises An audio player with PWM Introduction Detailed description AddressCounter module Create the top module and instantiate the modules Physical connections and the constraint file Additional details Review exercises 4-31 ix
11 Applied Digital Logic Exercises Using FPGAs 5 Counters 5-1 Additional reading Introduction Synchronous versus asynchronous sequential logic One-shot or monostable multivibrator and synchronizer and 5-3 Vivado s behavior simulation tool One-shot with synchronizer Verilog module Review exercises State machine frequency counter Finite state machines (FSMs) Event counter FSM Verilog case statements and parameters FSM in Verilog and language templates Implementing the FSM code Hardware testing Complete FSM code Review exercises Period counter Introduction to period counters Exercise: implementing the period counter Review exercises Computer interfacing the design by embedding a microprocessor Data communication hardware and software Embedded designs and IP-cores Final exercise Debug suggestion Review exercises 5-39 Appendix A A-1 x
12 Preface This book is for anyone interested in digital logic and who wants to learn how to implement it through detailed exercises with state of the art digital design tools and components. It exposes the reader to combinational and sequential digital logic concepts and implements them with hands-on exercises using the Verilog hardware description language (HDL) and a field programmable gate arrays (FGPA) teaching board. This book covers basic digital design concepts and then applies them through exercises. It teaches the reader the syntax of the Verilog language to build a simple calculator, a basic music player, a frequency and period counter and it ends with a microprocessor being embedded in the fabric of the FGPA to communicate with the PC. In the process, the reader learns about digital mathematics and digital-to-analog converter concepts through pulse width modulation. The topics are aimed at an audience of undergraduate students in a science or engineering course (or hobbyists) wanting an introduction to applied digital logic concepts. The material is deliberately kept brief so it can be covered in about four (course) weeks. No prior knowledge of digital logic or the Verilog programming language is required. Hardware & Software Requirements: Verilog compiler software, Vivado Version 2016.x., can be obtained (for free) by Xilinx Inc., and FPGA teaching boards, BASYS3 by Digilent Inc. are sold for about $100 making them affordable for students and hobbyists. Access to an oscilloscope and a function generator is required for some of the exercises. Detailed software installation instructions are presented in appendix A. xi
13 Acknowledgments I extend my thanks to Kevin Booth and Professor Müller for their constructive input and proofreading. I would also like to thank Adam Schaefer, Luke Molacek and Siddarth Karuka for finding many, but by no means all, tedious mistakes in this manual. Thanks also to James Duckworth at Worcester Polytechnic Institute for his documents and help in interfacing the FPGA with the microprocessor, and to Jeremiah Mans for providing the code for the binary to BCD conversion for the HEX display. Last but not least, thanks to all the Fall 2016 Phys4051 students who worked through the exercises and provided feedback. Kurt Wick, University of Minnesota, 13 June 2017 xii
14 Author biography Kurt Wick Kurt Wick received his MS in 1989 from the University of Minnesota where he has been developing and teaching, as Senior Scientist, the methods of experimental physics advanced laboratory course. The course covers a wide range of fields, such as optics, solid state and high energy physics and exposes students to electronics, programing and computer interfacing, statistics and data analysis. With his background in computers and electronics he is interested in teaching the fundamentals of digital electronics and how it pertains to today s consumer electronics and lab instruments. For the last five years, he has presented workshops on FPGAs through the Advanced Laboratory in Physics Association and when he s not working, he enjoys paddling in the woods of northern Minnesota and Ontario. xiii
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