ECE331: Hardware Organization and Design
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1 ECE331: Hardware Organization and Design Lecture 9: Binary Addition & Multiplication Adapted from Computer Organization and Design, Patterson & Hennessy, UCB
2 Pop Quiz! Using 4 bits signed integer notation: XXXX Write out the following values in binary: plus 1 plus 7 minus 8 minus 1 Perform the following calculations (and verify). Use extra bits if necessary. 1 plus 1 1 plus 7 1 minus 1 minus 8 plus 7 Using shift left logic, perform the following calculations 4 times 1 4 times (minus 1) ECE331: Multipliers 2
3 Overview Signed Binary addition Difference between Carry Out and Overflow conditions Construction of a Full Adder (previous digital logic courses) Time delay in parallel (ripple carry) adders MIPS supports both multiplication and division Need to understand special registers that are used More practice converting C to MIPS Understanding real multipliers in microprocessors Mostly parallel Made of multiple adders Reassessing timing ECE331: Multipliers 3
4 Last time: Definitions Carry Out When adding two signed numbers for a fixed number of bits, N, when the N+1 bit carries a value. Carry out does not necessarily indicate an overflow in the number of bits. Overflow When adding two signed numbers for a fixed number of bits, N, when the N+1 bit carries a value because there are not enough bits to hold the result of the calculation Overflow has the potential to occur when the two signed values being summed have the same sign. ECE331: Multipliers 4
5 Overflow in 2 s Comp Add/Subtract (1) Example Carry-out discarded - does not indicate overflow In general, if X and Y have opposite signs - no overflow can occur regardless of whether there is a carry-out or not Examples - ECE331: Multipliers 5
6 Overflow in 2 s Comp Add/Subtract (2) If X and Y have the same sign and result has different sign - overflow occurs Examples = -18 mod 32 Carry-out and overflow = 16 mod 32 No carry-out but overflow ECE331: Multipliers 6
7 Full-Adder (FA) Examine the Full Adder table Cin x y Cin Cout S Cout = x y + Cin (x + y) S = x y c + x yc + xy c + xyc = x y c x y l In general, for bit i: c i+1 = x i y i + c i (x i +y i ) where c i+1 = Cout, c i = Cin Cout Sum Half adder has 2 inputs. In principle HA is same as FA, with Cin set to 0. ECE331: Multipliers 7
8 Ripple Carry Adder Addition most frequent operation used also for multiplication and division fast two-operand adder essential Simple parallel adder for adding xn-1,xn-2,...,x0 and yn-1,yn-2,,y0 using n full adders Full adder combinational digital circuit with input bits xi,yi and incoming carry bit ci, producing output sum bit si and outgoing carry bit ci+1 incoming carry for next FA with input bits xi+1,yi+1 si = xi yi ci ci+1 = xi yi + ci (xi + yi) ECE331: Multipliers 8
9 Parallel Adder: Ripple Carry In a parallel arithmetic unit All 2n input bits available at the same time Carry propagates from the FA to the right to FA to the left Carries ripple through all n FAs before we can claim that the sum outputs are correct and may be used in further calculations Each FA has a finite delay ECE331: Multipliers 9
10 Example x3,x2,x1,x0=1111 y3,y2,y1,y0=0001 ΔFA - operation time - delay Assuming equal delays for sum and carry-out Longest carry propagation chain when adding two 4-bit numbers In synchronous arithmetic units - time allowed for adder's operation is worst-case delay - nδfa ECE331: Multipliers 10
11 Subtraction using Ripple Carry Adder Suppose you are performing X-Y operation Complement Y bits Force C 0 to 1 add Example: X = 0101, Y = 0010; Compute X Y First step: Complement Y 1101 Second step: add = 0011 ECE331: Multipliers 11
12 Carry Select Adder Principle: speculative Carry propagate delay CP(2n) = 2*CP(n) n-bit adder n-bit adder CP(2n) = CP(n) + CP(mux) Compute both, select one n-bit adder 1 n-bit adder 0 n-bit adder MUX Cout Carry-select adder ECE331: Multipliers 12
13 MULTIPLY (unsigned) Paper and pencil example (unsigned): Multiplicand 1000 Multiplier Product m bits x n bits = m+n bit product Binary makes it easy: 0 place 0 ( 0 x multiplicand) 1 place a copy ( 1 x multiplicand) ECE331: Multipliers 13
14 MIPS Multiplication Two 32-bit registers for product HI: most-significant 32 bits LO: least-significant 32-bits Instructions mult rs, rt / multu rs, rt 64-bit product in HI/LO mfhi rd / mflo rd Move from HI/LO to rd Can test HI value to see if product overflows 32 bits ECE331: Multipliers 14 # fact is located in $s0 # n is located in $s1 # i is located in $s2 int fact = 1; addi $s0, $zero, 1 for (i=n; i > 0; i--) add $s2, $zero, $s1 fact = fact * i; loop: beq $s2, $zero, exit mult $s0, $s2 mflo $s0 addi $s2, $s2, -1 j loop exit: add $zero, $zero, $zero
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