Embedded Systems. PIC16F84A Internal Architecture. Eng. Anis Nazer First Semester

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1 Embedded Systems PIC16F84A Internal Architecture Eng. Anis Nazer First Semester

2 Review Computer system basic components? CPU? Memory? I/O? buses? Instruction? Program? Instruction set? CISC, RISC? Memory? address? Volatile? non volatile? Computer architecture? Von Neumann, Harvard? Microprocessor? Microcontroller?

3 Steps to design an Embedded System Specify requirements: Inputs / outputs of the system what should the system do Choose a suitable Microcontroller Flow chart and write the program Simulate the system if everything is OK, download program to microcontroller using a special hardware programmer Build circuit and test

4 Microcontroller families Wide range of MCUs Each MCU manufacturer has families (groups of similar MCUs) Each family has members Families differ in the core processor (have different instruction sets) Members deffer in capabilities (memory size, I/O ports, number of timers...others?)

5

6 Microchip families In this course we will use the PIC microcontroller form Microchip manufacturer Families: Baseline, Mid-range, High-Performance

7 Assignment Assignment: Search for another microcontroller type name the available families give and an example of a microcontroller in each family chose a micorontroller from a family and name its main features

8 PIC 16F84A We will use the PIC16F84A microcontroller Features: 18 pin Clock Speed: up to 20MHz 1K Program Memory 68 Byte RAM 64 byte EEPROM one 8-bit timer one 5-bit I/O port (PORTA) one 8-bit I/O port (PORTB) ICSP (In Circuit Serial Programming)

9 PIC16F84A pin diagram

10 PIC16F84 pins Power supply pins VDD: power (+) VSS: Ground ( - ) I/O ports: RA0-RA4 and RB0-RB7 Used to connect inputs / outputs all pins are digital (accept two values: logic 0, or logic 1) Master clear (reset): MCLR (active low, reset when logic zero) T0CKI: Timer0 Clock input the input that will drive the timer/counter in the microcontroller Question: name an example where a timer is useful

11 PIC16F84 pins External Interrupt: INT when active, this pin will stop the normal operation of the microcontroller to respond to an external event Oscillator OSC1, OSC2: used to connect a clock signal the PIC microcontroller needs a clock signal to operate clock signal: is periodic square wave signal alternating between logic 0 and logic 1 logic 1 logic 0 time

12 Clock Signal Definitions: period: time between pulses (unit second) frequency: 1 / period ( unit Hertz) period Question: A 2GHz signal has a period of ns

13 Clock and Instruction Frequency In the PIC microcontroller, the CPU needs 4 clock pulses to execute an instruction clock cycle = period instruction cycle = 4 clock cycles So, if you attach a 4 MHz clock, the PIC will execute 1M instruction cycle per second ( 1MIPS ) What is the clock frequency if you want the instruction cycle to be 5us? how long would it take the PIC to execute instruction cycles if the clock frequency is 12MHz? How may instruction cycles should be executed to get a delay of 1 second if the clock frequency is 32768Hz

14 Reset Reset: restart the MCU Reset occurs: after a power up externally activating MCLR after the watchdog timer overflows MCLR pin is active low (a clear will occur if the pin is logic 0) For normal operation of the PIC microcontroller, MCLR pin should be connected to logic 1

15 Master clear ( MCLR ) Connecting MCLR pin:

16

17 Program Memory Program Counter Call Stack Program Memory

18 Program Memory Program Memory: FLASH 1K x 14 Program starts at address 0 What is the address of the last instruction? 1023 in decimal = in binary = 3FF in hex = 0x3FF Program counter: holds the address of the next instruction to be executed Call Stack: holds the return address after a function call 8 levels, up to 8 nested function calls Last in First out organization (LIFO) Interrupt vector : the instruction that will be executed when an interrupt occurs

19 Data Memory Data memory (SRAM) : two parts: Special function registers (SFR) 68 x 8 general purpose Data Memory: EEPROM 64 x 8 name an example where EEPROM is useful

20 Data Memory (SRAM) Two categories: General Purpose Registers (GPR) : general use, any kind of data Special Function Registers (SFR) : have a special purpose, can control the operation of the PIC. Ex. Select port A as input Organized in two banks: selection through STATUS register to access bank 0, clear bit RP0 in status register to access bank 1, set bit RP0 in status register

21 Data Memory (SRAM) Special Function Registers (SFR) General Purpose Registers (GPR) Unimplemented

22 SFR Example: Status Register Status register is one of the special function registers It holds the flags of the last operation, similar to FLAGS in intel 8086 Holds other information related to the state of the microcontroller The register is at location 0x03 in data memory (bank 0) The register is duplicated at address 0x83 (bank 1) if you access the location 0x03 or 0x83 you get the same data

23 Status Register bits C: Carry/Borrow flag 1 if there is a carry-out of the MSB in the last operation 0 if no carry-out of the MSB in the last operation in case of subtraction borrow bit is reversed DC: digit carry, same as carry but for the 4 th bit Z: zero flag 1 if result is zero 0 if result is not zero (confusing, good for a trick question:)

24 Status Register bits RP0: bank select bit 0 to select bank 0 1 to select bank 1 TO: time-out bit (active low) PD: power down bit (active low)

25 Question The pairs of numbers shown below are added in a 16F84A program. What is the result in each case and the value of the Status register bits Z, DC and C after each addition? added to added to added to

26 Data memory: EEPROM Non-volatile memory, keeps data after power is off Accessed using SFRs: EEDATA, EEADR Read/Write operation is controlled using SFR: EECON1, EECON2 Reading or writing data to EEPROM requires a certain procedure. Writing takes a long time (relatively), so a certain procedure is followed to ensure a correct write

27 Pipelining The PIC microcontroller has a two step pipeline two steps for each instruction: fetch and execute steps are pipelined, ie: while an instruction is executed the next instruction is fetched.

28 Configuration Bits Part of program memory Specified during program download Cannot be read during program execution. Used to configure the PIC

29 Configuration Bits CP: code protect PWRTE: power up timer enable WDTE : watchdog timer enable FOSC0,1: oscillator selection bits 11: RC oscillator 10: HS oscillator 01: XT oscillator 00: Low Power oscillator

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