Govt. Polytechnic Education Society, Lisana (Rewari) LESSON PLANS 3 RD SEM. COMPUTER ENGINEERING 3.1 PROGRAMMING IN C
|
|
- Shonda Dorsey
- 5 years ago
- Views:
Transcription
1 Govt. Polytechnic Education Society, Lisana (Rewari) LESSON PLANS 3 RD SEM. COMPUTER ENGINEERING 3.1 PROGRAMMING IN C Name of the Faculty Discipline Department Semester Subject : Kuldeep Singh : Computer Engineering : Computer Engineering : 3rd : Programming in C Lesson Plan Duration : 15 weeks ( from July, 2018 to Dec., 2018) **Work load (Lecture / Practical) per week(in hours): Lectures-04, practicals -06 Theory Week 1st 2nd 3rd 4th Lecture day 1st 2nd 3rd 4th 5th 6th 7th 8th 9th 10th 11th 12th 13th 14th 15th 16th (Including assignment / test) Algorithm and Programming Development: Introduction Steps in development of a program Flow charts, Algorithm development Programme Debugging Algorithm and Flowchart writing for practical. Algorithm and Flowchart writing for practical. Practice of error detection and corrections in examples. Program Structure : Introduction to structure of C program Keywords, assign statements I/O statements:printf and Scanf Constants, variables and data types Operators and Expressions Unformatted and Formatted IOS Data Type Casting Basic Program writing and practice Revision of Unit II 5th 17th Control Structures :Introduction and use 18th 19th 20th Decision making with IF statement Practice of IF statement with examples IF Else and Nested IF 6th 21st While and do-while, for loop 7th 8th 9th 10th 22nd 23rd 24th 25th 26th 27th 28th 29th 30th 31st 32nd 33rd 34th 35th 36th 37th 38th 39th 40th Loop Practice and revision Break. Continue statements goto and switch statements Revision of Unit III Practice of Control structures using examples. Class Test of III Pointers :Introduction to pointers Practical Day 1st 2nd 3rd 4th 5th 6th 7th 8th 9th 10th 11th 12th 13th 14th Practical Programming exercises on executing and editing a C program Programming exercises on executing and editing a C program Programming exercises on executing and editing a C program Programming exercises on executing and editing a C program Programming exercises on executing and editing a C program Programming exercises on defining variables and assigning values to variables Programming exercises on arithmetic and relational operators Programming exercises on arithmetic expressions and their evaluation Programming exercises on formatting input/output using printf and scanf and their Programming exercises using if statement, if return type values Else Programming exercises on do while, statement. Programming exercises on switch statement. Programming exercises on for statement Programming exercises on do while, statement and for statement Address operator and pointers, Declaring and initializing pointers 15th Simple programs using pointers Single pointer Revision of Unit IV Practice of Pointers using examples and 16th Simple programs using pointers Functions:Introduction to functions Global and Local Variables Function Declaration, Standard functions Parameters and Parameter Passing Call - by value/reference Revision of functions and Parameter Passing Arrays and Strings:Introduction to Arrays, Array Declaration, Length of array Single and Multidimensional Array,Arrays of characters Revision of Arrays and functions. 17th 18th 19th 20th Simple programs using functions Simple programs using functions Programs on one-dimensional array. Programs on two-dimensional array. Programs on one-dimensional array. Programs on two-dimensional array.
2 22nd Programs on functions using array as parameters Week 1st 12th 13th 14th 11th Lecture day 44th 45th 46th 47th 48th 49th 50th 51st 52nd 53rd 54th 55th 56th strlen, strcpy, strcmp Passing an array to function (Including assignment / test) Programming examples of array passing as argument to a function Revision of arrays and functions with examples Pointers to an array and strings Pointers to an array and strings detailed Class Test of Pointers and Functions Practical Day 22nd Programs on functions using array as parameters 23rd 24th Programs on functions using array as parameters Programs on functions,strings and parameter passing by reference Structures and Unions : Introduction,Declaration of structures 25th Simple programs using structures Accessing structure members Structure Initialization Pointer to a structures Unions: Introduction Difference between Structures and unions Program examples of structures and unions Revision of Structure and unions 15th 57th Revision of Pointers 58th 41st. 42nd 43rd Examples of programs and Practice of array and functions Introduction of Strings: String declaration and definition, String Related function i.e. Revision of Loops and Control Structures. 26th 27th 28th 29th 21st (i) Programs for putting two strings together. (ii) Programs for comparing two strings Simple programs using structures Simple programs using union Simple programs using union Programming exercises on do while, statement and for statement 59th 60th Class Test of Loops, Pointers and Control Structures Revision of Structure and unions 30th Programming exercises on do while, statement and for statement (Signature of the teacher concerned with date)
3 3.2 OPERATING SYSTEMS NAME OF THE FACULTY: - Sh.Pankaj Yadav DISCIPLINE: - CSE SEMESTER: - 3rd SUBJECT-OS Lesson Plan Duration: - 15 weeks (July-2018 to Nov-2018) Work Load (Lecture/Practical) per week (In hours): Lecture- 04, Practical -02 Week Theory Practical Lecture Day (Including assignment/test) 1 st 1st Overview of Operating Systems Definition of Operating Systems, Practical 1st Demonstration of all the controls provided in windows control panel 2nd Types of Operating Systems, 3rd Operating System Services, User operating system interface 2 nd 4th System Calls, Types of System 2nd Exercise on Basics of Calls windows 5 th System Programs, Operating System Structure 6 th Virtual Machine, 3 rd 7 th Benefits of Virtual Machine 3 rd Installation of Linux Operating System 8 th Process Management (Principles and Brief Concept) 9 th Process concept, Process State 4 th 10 th Process Control Block, Scheduling Queues 11 th Scheduler, Job Scheduler 12 th Process Scheduler, Context Switch 5 th 13 th Operations on Processes, Interprocess Communication 14 th Shared Memory Systems, Message-Passing Systems 15 th Scheduling Algorithms, Preemptive and Non Preemptive Internal viva for the conducted 3 practical s 4th Usage of directory management commands of Linux: ls, cd, pwd, mkdir, rmdir 6 th 16 th Multiprocessor scheduling, Process Synchronization. 17 th Deadlocks (Principles and Brief Concept) Deadlock, Conditions for Dead lock, 18 th Methods for handling deadlocks, Dead Prevention 7 th 19 th Deadlock Avoidance, Deadlock detection 20 th Recovery from deadlock. 21 Memory Management Function 5 th Usage of File Management commands of Linux: cat, chmod,cp, mv, rm, pg, more, find 6 th Use the general purpose commands of Linux: wc, od, lp, cal, date, who, whoami
4 (Principles and Brief Concept) Definition Logical and Physical address Space 8 th 22 Swapping, Memory allocation, 23 Contiguous Memory allocation, Fixed and variable partition 24 Internal and External fragmentation and Compaction 9 th 25 Paging Principle of operation, Page allocation 26 Hardware support for paging, Protection and sharing 27 Disadvantages of paging, Segmentation, Virtual Memory. Internal viva for the conducted 6 practical s 7th Using the simple filters: pr, head, tail, cut, paste, nl, sort 10 th 28 Assignment and Revision 8. Communication 29 I/O Management Functions (Principles and Brief Concept) Commands: news, write, talk, mseg, mail, wall Dedicated Devices 30 Shared Devices, I/O Devices, Storage Devices 11 th 31 Buffering, Spooling. Internal viva for the conducted all practical s 32 Assignment and Revision. 33 File Management (Principles and Brief Concept) Types of File System 12 th 34 Simple file system, Basic file system 35 Logical file system, Physical file system 9 Write a shell program that finds the factorial of a number. 10 Write a shell program that finds whether a given number is prime or not. 36 Various Methods of Allocating Disk Space 13 th 37 Linux Operating System,History of Linux and Unix, Linux Overview, Structure of Linux 38 Linux releases, Open Linux, Linux System Requirements 39 Linux Commands and Filters: mkdir, cd,rmdir,pwd, ls, who, whoami, date, cat,chmo
5 14 th 40 cp, mv, rm,pg,more, pr, tail, head, cut, paste, nl, grep, wc, 41 sort, kill, write, talk,mseg,wall, merge,mail, news Shell: concepts of command options 42 input, output,redirection,pipes, redirecting and piping with standard errors 15 th 43 Shell scripts,vi editing commands 44 Assignment and Revision 45 Assignment and Revision 3.3 DIGITAL ELECTRONICS NAME OF THE FACULTY: - PRAVEEN KUMAR DISCIPLINE: - COMPUTER ENGINEERING SEMESTER:- 3rd
6 SUBJECT-DE Lesson Plan Duration:- 15 weeks (July-2018 to Nov-2018) Work Load (Lecture/Practical) per week (In hours): Lecture- 03, Practical -03 Week Theory Practical Lecture Day (Including assignment/test) 1 st 1st Introduction to the subject: Digital Electronics. 2nd Distinction between analog and digital signals. 3rd Applications and advantages of digital signals. Practical 1st Verification and interpretation of truth tables for AND, OR, NOT NAND, NOR and Exclusive OR (EXOR) and Exclusive NOR(EXNOR) gates 2 nd 4th Introduction to Binary, octal and hexadecimal number system: 5 th conversion from decimal and hexadecimal to binary and viceversa 6 th Binary addition and subtraction including binary points. 3 rd 7 th 1 s and 2 s complement method of addition/subtraction. 8 th Assignment and Revision 9 th Concept of code, weighted and non-weighted codes, 4 th 10 th Examples of 8421, BCD, excess- 3 and Gray code. 2nd Realisation of logic functions with the help of NAND or NOR gates 3 rd To design a half adder using XOR and NAND gates and verification of its operation - Construction of a full adder circuit using XOR and NAND gates and verify its operation Internal viva & test for the conducted 3 nos. Of practicals. 11 th Concept of parity, single and double parity and error detection 12 th Assignment and Revision 5 th 13 th a) Concept of negative and positive logic 14 th Definition, symbols and truth tables of NOT, AND, OR, NAND, NOR gate 15 th Definition, symbols and truth tables of EXOR Gates, NAND and NOR as universal gates 4th Verification of truth table for positive edge triggered, negative edge triggered, level triggered IC flip-flops (At least one IC each of D latch, D flipflop, JK flip-flops). 6 th 16 th Introduction to TTL and CMOS logic families 17 th Postulates of Boolean algebra, 5 th Verification of truth table for encoder and decoder ICs, Mux and DeMux.
7 De Morgan s Theorems. 18 th Implementation of Boolean (logic) equation with gates 7 th 19 th Karnaugh map (upto 4 variables) and simple application in developing combinational logic circuits Assignment and revision 20 th Half adder and Full adder circuit, design and implementation. 6 th To design a 4 bit SISO, SIPO, PISO, PIPO shift registers using JK/D flip flops and verification of their operation bit adder circuit, Four bit decoder circuits for 7 segment display and decoder/driver ICs. 8 th 22 Basic functions and block diagram of MUX and DEMUX with different ICs 23 Basic functions and block diagram of Encoder Internal viva & test for the conducted practicals (4 th to 6th). 24 Concept and types of latch with their working and applications 9 th 25 Operation using waveforms and truth tables of RS flip flop. 26 Operation using waveforms and truth tables of T, D flip flop 7th To design a 4 bit ring counter and verify its operation 27 Operation using waveforms and truth tables of Master/Slave JK 10 th 28 Introduction on latch and flip flop 29 Difference between a latch and a flip flop 8th Use of Asynchronous Counter ICs (7490 or 7493). 30 Assignment and Revision 11 th 31 Introduction to Asynchronous and Synchronous counters 32 Introduction to Binary counters 33 Divide by N ripple counters, 9th Internal viva & test for the conducted all practicals. 12 th 34 Decade counter, Ring counter 10th Revision Introduction and basic concepts including shift left and shift right. 36 Serial in parallel out, serial in
8 serial out, parallel in serial out, parallel in parallel out. 13 th 37 Universal shift register 11th Revision Working principle of A/D and D/A converters 39 Brief idea about different techniques of A/D conversion and study of : Stair step Ramp A/D converter 14 th 40 Dual Slope A/D converter 41 Successive Approximation A/D Converter Detail study of : Binary Weighted D/A converter 42 R/2R ladder D/A converter - Applications of A/D and D/A converter. 15 th 43 Memory organization, classification of semiconductor memories (RAM, ROM, PROM, EPROM, EEPROM), 44 static and dynamic RAM, introduction to ALU ICL 45 Assignment and Revision 12th 13th Revision... Revision... (Signature of the teacher concerned with date) 3.4 MULTIMEDIA APPLICATIONS Name of Faculty : Susheel Kumar Discipline : Computer Engg. Semester : 3 rd Subject : Multimedia Applications
9 Lesson Plan Duration : 15 weeks (from July, 2018 to November, 2018) Work Load (Lecture / Practical) per week (in hours) : Lectures-03, Practicals-06 Week Theory Practical Lecture Day (including assignment/test) 1 st 1 st Introduction to Multimedia Systems: Concept of Multimedia 2 nd History of Multimedia 3 rd Multimedia hardware and softwarevarious classes Practical Week 1 st Installation of various multimedia software like Photoshop, Flash, Director or any open source software 2 nd 4 th Components 2 nd Installing and use of various 5 th Quality criteria and specifications of different capturing devices multimedia devices: Scanner, Digital camera, web camera 6 th Communication devices 3 rd 7 th Storage devices 3 rd Installing and use of various 8 th Display devices 9 th Elements of Multimedia and different multimedia devices: Mike and multimedia file formats speakers, Touch screen, Plotter and printers 4 th 10 th Applications of multimedia benefits 4 th Installing and use of various 11 th and problems. Content and Project Planning, multimedia devices: DVD, Designing and development: Audio CD and Video CD 12 th Planning steps and process 5 th 13 th Concept of data compression, Text 5 th VIVA-VOCE encoding 14 th Revision & Feedback 15 th 1 st sessional test 6 th 16 th Audio encoding techniques 6 th Reading and writing of 17 th Types of images, Capturing images using camera/scanner different format on 18 th coding techniques for Moving Images CD/DVD 7 th 19 th Editing, Editing of images audio, text, video and graphics 7 th Transporting audio and video files 20 th navigation and user interface designing 21 st Use of various codes like bar code,use of various codes like bar code 8 th 22 nd QR code in multimedia applications 8 th Using various features of 23 rd Photo-shop workshop 24 th image editing tools Flash 9 th 25 th specifying and adjusting colors 9 th Revision of Practicals 26 th using gradient tools 27 th selection and move tools 10 th 28 th transforming path drawing and 10 th VIVA-VOCE editing tools 29 th Revision & Feedback
10 30 th 2 nd sessional test 11 th 31 st using channels, layers 11 th Using various features of 32 nd filters and actions 33 rd Multimedia Authoring Tools: Types of Photo-shop/GIMP Authoring programmes Icon based 12 th 34 th Time based 12 th Making multimedia 35 th Story boarding/scripting and object presentations oriented working in macromedia combining, Flash, flash Photo-shop, such as 36 th exploring interface using selection of department profile, PEN tools lesson presentation, games and project presentations. 13 th 37 th 38 th Working with drawing and painting tools applying colour viewing and 13 th Generation and recognition of bar code & QR code using pre built application/mobile 39 th manipulating time line applications 14 th 40 th animating 14 th Revision of Practicals 41 st processing 42 nd guiding layers 15 th 43 rd importing and editing sound and video clips in flash 44 th Revision & Feedback 45 th 3 rd sessional Test 15 th VIVA-VOCE :
11 3.5 DATA COMMUNICATION Name of the Faculty Discipline Department Semester Subject : Mr. Shri Krishan : Computer Engineering : Computer Engineering : 3rd Data Communication Lesson Plan Duration : 15 weeks ( from July, 2018 to Dec., 2018) **Work load (Lecture / Practical) per week(in hours): Lectures-04, practicals -Nil Theory Practical Week Lect. Pract day (Including assignment / test). Day 1st 1st 1. Introduction : Data Communication- Components 2nd Data representation 3rd Data flow Networks 4th Distributed processing 2nd 1st Network criteria Physical structures 2nd Network Category- LAN 3rd WAN, MAN 4th 2. Data and Signals : Analog and Digital data 3rd 1st Analog and digital signals 2nd Periodic and Non Periodic signals 3rd periodic analog signals 4th Digital Signals- Bit rate, Bit length 4th 1st Digital signal as a composite analog signal
12 2nd Transmission of digital signals 3rd Transmission Impairment- Attenuation, Distortion and noise 4th Performance- bandwidth, throughput 5th 1st Latency, jitter 2nd Revision 3. Digital and Analog Transmission : Analog transmission- Digital to 3rd Analog Conversion- ASK 4th PSK, FSK 6th 1st Analog to Analog Conversion- AM 2nd PM,FM( No mathematical treatment) 3rd Digital transmission- Digital to digital conversion- coding and schemes 4th Digital transmission- Digital to digital conversion- coding and schemes 7th 1st Analog to digital conversion- PCM 2nd Delta Modulation (DM) 3rd Transmission modes- Serial transmission 4th Transmission modes- parallel transmission 8th 1st Revision
13 2nd Revision 3rd 4. Multiplexing FDM 4th FDM 9th 1st WDM 2nd WDM 3rd TDM 4th TDM 10th 1st Revision 2nd Revision 3rd 5. Transmission media: Guided media 4th Twisted pair cable 11th 1st Twisted pair cable 2nd Co-axial cable 3rd Co-axial cable 4th Fibre optics cable 12th 1st Fibre optics cable 2nd Unguided Media 3rd Radio wave 4th Microwave 13th 1st Infrared
14 2nd Revision 3rd 6. Error Detection and Correction : Types of Errors 4th Redundancy 14th 1st Detection v/s correction 2nd Forward error correction 3rd Forward error correction v/s retransmission. 4th Error detection through Parity bit 15th 1st Block parity to detect double errors and correct single errors. 2nd General principles of error detection and correction using cyclic redundancy check 3rd Revision 4th Revision (Signature of the teacher concerned with date) C
15 SOFT SKILLS-I Name of the Faculty Discipline Department Semester Subject : Sh. Shri Krishan : Computer Engineering : Computer Engineering : 5th : Soft Skill Lesson Plan Duration : 15 weeks ( from July, 2018 to Dec., 2018) **Work load (Lecture / Practical) per week(in hours): Lectures-NIL, practicals - 04 Theory Practical Week 1st Lecture Practical day (Including assignment / test) Day 1st 1 Soft skill - Concept 2nd 2 Soft skill - Concept 2nd 3rd 3 Impotance of Soft skill 4th 4 Impotance of Soft skill 3rd 5th 5 Impotance of Soft skill 6th 6 Impotance of Soft skill 4th 7th 7 Communication Skills 8th 8 Verbal Communication 5th 9th 9 Improving Verbal
16 Communication 10th 10 Improving Verbal Communication 6th 11th 11 Improving Verbal Communication 12th 12 Improving Verbal Communication 7th 13th 13 Report Definition, Elements. 14th 14 Report Definition, Elements. 8th 15th 15 Structure of Report 16th 16 Structure of Report 9th 17th 17 Report Writing 18th 18 Report Writing 10th 19th 19 Methods to enhance memory and concentration 20th 20 Methods to enhance memory and concentration 11th 21st 21 Methods to enhance memory and concentration
17 22nd 22 Methods to enhance memory and concentration 12th 23rd 23 Methods to enhance memory and concentration 24th 24 Methods to enhance memory and concentration 13th 25th 25 Components of overall personality Week Lecture Practical day (Including assignment / test) Day 26th 26 Components of overall personality 14th 27th 27 Components of overall personality-dressing Sense/etiquettes 28th 28 Components of overall personality-dressing Sense/etiquettes 15th 29th 29 Components of overall personality Body Language etc. 30th 30 Components of overall personality Body Language etc. (Signature of the teacher concerned with date)
Lesson Plan (Odd Semester) Name of the Faculty: Rakesh Gupta
Lesson Plan (Odd Semester) Name of the Faculty: Rakesh Gupta Discipline: Department: Semester: Subject: Data Communication Lesson Plan Duration: 15 weeks ( from July, 2018 to Dec., 2018) **Work load (Lecture
More informationii) Do the following conversions: output is. (a) (101.10) 10 = (?) 2 i) Define X-NOR gate. (b) (10101) 2 = (?) Gray (2) /030832/31034
No. of Printed Pages : 4 Roll No.... rd 3 Sem. / ECE Subject : Digital Electronics - I SECTION-A Note: Very Short Answer type questions. Attempt any 15 parts. (15x2=30) Q.1 a) Define analog signal. b)
More informationGovernment Polytechnic, Hisar Lesson Plan (Odd Semester)
Name of the Faculty Discipline Department Government Polytechnic, Hisar Lesson Plan (Odd Semester) : Dr. Ajit Kumar : Computer Engineering : Computer Engineering Semester : 3 rd Subject : Programming in
More informationSyllabus for Computer Science General Part I
Distribution of Questions: Part I Q1. (Compulsory: 20 marks). Any ten questions to be answered out of fifteen questions, each carrying two marks (Group A 3 questions, Group B, Group C and Group D 4 questions
More informationPrinciples of Digital Techniques PDT (17320) Assignment No State advantages of digital system over analog system.
Assignment No. 1 1. State advantages of digital system over analog system. 2. Convert following numbers a. (138.56) 10 = (?) 2 = (?) 8 = (?) 16 b. (1110011.011) 2 = (?) 10 = (?) 8 = (?) 16 c. (3004.06)
More informationScheme G. Sample Test Paper-I
Sample Test Paper-I Marks : 25 Times:1 Hour 1. All questions are compulsory. 2. Illustrate your answers with neat sketches wherever necessary. 3. Figures to the right indicate full marks. 4. Assume suitable
More informationDIRECTORATE OF TECHNICAL EDUCATION DIPLOMA IN ELECTRICAL AND ELECTRONICS ENGINEERING II YEAR M SCHEME IV SEMESTER.
DIRECTORATE OF TECHNICAL EDUCATION DIPLOMA IN ELECTRICAL AND ELECTRONICS ENGINEERING II YEAR M SCHEME IV SEMESTER 2015 2016 onwards DIGITAL ELECTRONICS CURRICULUM DEVELOPMENT CENTRE Curriculum Development
More informationEND-TERM EXAMINATION
(Please Write your Exam Roll No. immediately) END-TERM EXAMINATION DECEMBER 2006 Exam. Roll No... Exam Series code: 100919DEC06200963 Paper Code: MCA-103 Subject: Digital Electronics Time: 3 Hours Maximum
More informationCONTENTS CHAPTER 1: NUMBER SYSTEM. Foreword...(vii) Preface... (ix) Acknowledgement... (xi) About the Author...(xxiii)
CONTENTS Foreword...(vii) Preface... (ix) Acknowledgement... (xi) About the Author...(xxiii) CHAPTER 1: NUMBER SYSTEM 1.1 Digital Electronics... 1 1.1.1 Introduction... 1 1.1.2 Advantages of Digital Systems...
More informationNOTIFICATION (Advt No. 1/2018) Syllabus (Paper III)
NOTIFICATION (Advt No. 1/2018) Syllabus (Paper III) Post Code - 302 Area: Instrumentation COMPUTER PROGRAMMING AND APPLICATION 1. OVERVIEW OF PROGRAMMING: Steps in program development, problem identification,
More informationUPY14602-DIGITAL ELECTRONICS AND MICROPROCESSORS Lesson Plan
UPY14602-DIGITAL ELECTRONICS AND MICROPROCESSORS Lesson Plan UNIT I - NUMBER SYSTEMS AND LOGIC GATES Introduction to decimal- Binary- Octal- Hexadecimal number systems-inter conversions-bcd code- Excess
More informationSHRI ANGALAMMAN COLLEGE OF ENGINEERING. (An ISO 9001:2008 Certified Institution) SIRUGANOOR, TIRUCHIRAPPALLI
SHRI ANGALAMMAN COLLEGE OF ENGINEERING AND TECHNOLOGY (An ISO 9001:2008 Certified Institution) SIRUGANOOR, TIRUCHIRAPPALLI 621 105 DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING EC1201 DIGITAL
More informationInjntu.com Injntu.com Injntu.com R16
1. a) What are the three methods of obtaining the 2 s complement of a given binary (3M) number? b) What do you mean by K-map? Name it advantages and disadvantages. (3M) c) Distinguish between a half-adder
More informationGARDEN CITY UNIVERSITY. Bachelor of Computer Applications SEMESTER- I. Course: CONCEPTS OF PROGRAMMING USING C LANGUAGE CODE: 05ABCAR17111 CREDITS: 04
GARDEN CITY UNIVERSITY Bachelor of Computer Applications SEMESTER- I Course: CONCEPTS OF PROGRAMMING USING C LANGUAGE CODE: 05ABCAR17111 CREDITS: 04 Unit 1 Programming Basics 1.1 Introduction to Programming
More informationHours / 100 Marks Seat No.
17320 21718 3 Hours / 100 Seat No. Instructions (1) All Questions are Compulsory. (2) Answer each next main Question on a new page. (3) Figures to the right indicate full marks. (4) Assume suitable data,
More informationSIR C.R.REDDY COLLEGE OF ENGINEERING, ELURU DEPARTMENT OF INFORMATION TECHNOLOGY LESSON PLAN
SIR C.R.REDDY COLLEGE OF ENGINEERING, ELURU DEPARTMENT OF INFORMATION TECHNOLOGY LESSON PLAN SUBJECT: CSE 2.1.6 DIGITAL LOGIC DESIGN CLASS: 2/4 B.Tech., I SEMESTER, A.Y.2017-18 INSTRUCTOR: Sri A.M.K.KANNA
More informationHANSABA COLLEGE OF ENGINEERING & TECHNOLOGY (098) SUBJECT: DIGITAL ELECTRONICS ( ) Assignment
Assignment 1. What is multiplexer? With logic circuit and function table explain the working of 4 to 1 line multiplexer. 2. Implement following Boolean function using 8: 1 multiplexer. F(A,B,C,D) = (2,3,5,7,8,9,12,13,14,15)
More informationVALLIAMMAI ENGINEERING COLLEGE. SRM Nagar, Kattankulathur DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING EC6302 DIGITAL ELECTRONICS
VALLIAMMAI ENGINEERING COLLEGE SRM Nagar, Kattankulathur-603 203 DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING EC6302 DIGITAL ELECTRONICS YEAR / SEMESTER: II / III ACADEMIC YEAR: 2015-2016 (ODD
More information3. The high voltage level of a digital signal in positive logic is : a) 1 b) 0 c) either 1 or 0
1. The number of level in a digital signal is: a) one b) two c) four d) ten 2. A pure sine wave is : a) a digital signal b) analog signal c) can be digital or analog signal d) neither digital nor analog
More informationKumaun University Nainital Proposed Syllabus for B. Sc. Semester program to be implemented from session Subject: Computer Science
Kumaun University Nainital Proposed Syllabus for B. Sc. Semester program to be implemented from session 2016-17 Subject: Computer Science Semester system course structure: 1. The course work shall be divided
More informationACADEMIC YEAR PLANNING - F.Y.J.C. ( ) F.Y.J.C. COMPUTER SCIENCE (Theory)
ACADEMIC YEAR PLANNING - F.Y.J.C. (2015-16) F.Y.J.C. COMPUTER SCIENCE (Theory) JULY Number Systems & Binary Arithmetic : Binary number, decimal, octal, hexadecimal numbers, BCD,conversion from one number
More informationB.Tech II Year I Semester (R13) Regular Examinations December 2014 DIGITAL LOGIC DESIGN
B.Tech II Year I Semester () Regular Examinations December 2014 (Common to IT and CSE) (a) If 1010 2 + 10 2 = X 10, then X is ----- Write the first 9 decimal digits in base 3. (c) What is meant by don
More informationHours / 100 Marks Seat No.
17333 13141 3 Hours / 100 Seat No. Instructions (1) All Questions are Compulsory. (2) Answer each next main Question on a new page. (3) Illustrate your answers with neat sketches wherever necessary. (4)
More informationCOURSE OUTLINE & WEEK WISE BREAKAGE
COURSE OUTLINE & WEEK WISE BREAKAGE Week wise Course outline of Computer Fundamentals & Programming (CE-100) 3+1 (Batch 2018-Electronic Engineering) Dated: 13-12-2017 Course Coordinator: Saeed Azhar WEEK
More informationSCHEME OF EXAMINATION FOR B.Sc.(COMPUTER SCIENCE) SEMESTER SYSTEM (Regular Course) w.e.f Scheme for B.Sc.-I. Semester-I. Internal Assessment
SCHEME OF EXAMINATION FOR B.Sc.(COMPUTER SCIENCE) SEMESTER SYSTEM (Regular Course) w.e.f. 2013-14 Scheme for B.Sc.-I Sr. No. Paper 1 Paper-I Computer And Programming Fundamentals Semester-I Internal Assessment
More information(ii) Simplify and implement the following SOP function using NOR gates:
DHANALAKSHMI COLLEGE OF ENGINEERING DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING EE6301 DIGITAL LOGIC CIRCUITS UNIT I NUMBER SYSTEMS AND DIGITAL LOGIC FAMILIES PART A 1. How can an OR gate be
More informationPABNA UNIVERSITY OF SCIENCE &TECHNOLOGY
PABNA UNIVERSITY OF SCIENCE &TECHNOLOGY PABNA, BANGLADESH Faculty of Engineering and Technology Department of Computer Science and Engineering CSE Syllabus for Master in Computer Science and Engineering
More informationRizvi College of Arts, Science & Commerce Bandra (W), Mumbai Teaching Plan Academic Year
Academic Year 17-18 Subject: Communication Skills Faculty: SHABANA ANSARI Class : F.Y.B.Sc. (IT) SEM-1 JUNE The Seven Cs of Effective Communication: Completeness, Conciseness, Consideration, Concreteness,
More informationCourse Batch Semester Subject Code Subject Name. B.E-Marine Engineering B.E- ME-16 III UBEE307 Integrated Circuits
Course Batch Semester Subject Code Subject Name B.E-Marine Engineering B.E- ME-16 III UBEE307 Integrated Circuits Part-A 1 Define De-Morgan's theorem. 2 Convert the following hexadecimal number to decimal
More informationLesson Plan. Week Theory Practical. Lecture Day Topic(including assignment Test) Practical Day
Lesson Plan Name of Faculty: Neha Aggarwal Discipline: BCA Semester: 2nd Subject: Office Automation Tools(BCA-124) Lesson Plan Duration: 15 Weeks Workload (Lecture) Per Week: 4 Lecture,4 Practical Per
More information1. Draw general diagram of computer showing different logical components (3)
Tutorial 1 1. Draw general diagram of computer showing different logical components (3) 2. List at least three input devices (1.5) 3. List any three output devices (1.5) 4. Fill the blank cells of the
More informationR10. II B. Tech I Semester, Supplementary Examinations, May
SET - 1 1. a) Convert the following decimal numbers into an equivalent binary numbers. i) 53.625 ii) 4097.188 iii) 167 iv) 0.4475 b) Add the following numbers using 2 s complement method. i) -48 and +31
More informationINSTITUTE OF AERONAUTICAL ENGINEERING (Autonomous) Dundigal, Hyderabad
INSTITUTE OF AERONAUTICAL ENGINEERING (Autonomous) Dundigal, Hyderabad - 500 043 COMPUTER SCIENCE AND ENGINEERING TUTORIAL QUESTION BANK Name : DIGITAL LOGIC DESISN Code : AEC020 Class : B Tech III Semester
More informationGovt. Polytechnic Education Society, Lisana (Rewari) LESSON PLANS 1 ST SEM. COMPUTER ENGINEERING
Govt. Polytechnic Education Society, Lisana (Rewari) LESSON PLANS 1 ST SEM. COMPUTER ENGINEERING 1.6 COMPUTER FUNDAMENTALS & INFORMATION TECNOLOGY Name of Faculty: Sh.Kuldeep Singh Discipline: computer
More informationSUBJECT CODE: IT T35 DIGITAL SYSTEM DESIGN YEAR / SEM : 2 / 3
UNIT - I PART A (2 Marks) 1. Using Demorgan s theorem convert the following Boolean expression to an equivalent expression that has only OR and complement operations. Show the function can be implemented
More informationCode No: 07A3EC03 Set No. 1
Code No: 07A3EC03 Set No. 1 II B.Tech I Semester Regular Examinations, November 2008 SWITCHING THEORY AND LOGIC DESIGN ( Common to Electrical & Electronic Engineering, Electronics & Instrumentation Engineering,
More informationBHARATHIDASAN ENGINEERING COLLEGE Degree / Branch : B.E./ECE Year / Sem : II/ III Sub.Code / Name : EC6302/DIGITAL ELECTRONICS
BHARATHIDASAN ENGINEERING COLLEGE Degree / Branch : B.E./ECE Year / Sem : II/ III Sub.Code / Name : EC6302/DIGITAL ELECTRONICS FREQUENTLY ASKED QUESTIONS UNIT I MINIMIZATION TECHNIQUES AND LOGIC GATES
More informationPhiladelphia University Student Name: Student Number:
Philadelphia University Student Name: Student Number: Faculty of Engineering Serial Number: Final Exam, First Semester: 2018/2019 Dept. of Computer Engineering Course Title: Logic Circuits Date: 03/01/2019
More informationOld Question Papers of PGDCA 1 st Semester H.K. Hi-Tech (College of IT & Management) H.K. Hi-Tech College of IT & Management
() Q.1 (a) What is a computer system? What are the various components of a CPU? Also explain its working. (b) What are the things that computers can do? Also explain the various characteristics of computers?
More informationDE Solution Set QP Code : 00904
DE Solution Set QP Code : 00904 1. Attempt any three of the following: 15 a. Define digital signal. (1M) With respect to digital signal explain the terms digits and bits.(2m) Also discuss active high and
More informationwww.vidyarthiplus.com Question Paper Code : 31298 B.E./B.Tech. DEGREE EXAMINATION, NOVEMBER/DECEMBER 2013. Third Semester Computer Science and Engineering CS 2202/CS 34/EC 1206 A/10144 CS 303/080230012--DIGITAL
More informationGovernment of Karnataka Department of Technical Education Board of Technical Examinations, Bengaluru
Government of Karnataka Department of Technical Education Board of Technical Examinations, Bengaluru Course Title: DIGITAL ELECTRONICS Course Code : 15EE34T Semester : III Course Group : Core Teaching
More informationD I G I T A L C I R C U I T S E E
D I G I T A L C I R C U I T S E E Digital Circuits Basic Scope and Introduction This book covers theory solved examples and previous year gate question for following topics: Number system, Boolean algebra,
More informationTEACHING & EXAMINATION SCHEME For the Examination COMPUTER SCIENCE. B.Sc. Part-I
TEACHING & EXAMINATION SCHEME For the Examination -2015 COMPUTER SCIENCE THEORY B.Sc. Part-I CS.101 Paper I Computer Oriented Numerical Methods and FORTRAN Pd/W Exam. Max. (45mts.) Hours Marks 150 2 3
More informationR07. Code No: V0423. II B. Tech II Semester, Supplementary Examinations, April
SET - 1 II B. Tech II Semester, Supplementary Examinations, April - 2012 SWITCHING THEORY AND LOGIC DESIGN (Electronics and Communications Engineering) Time: 3 hours Max Marks: 80 Answer any FIVE Questions
More informationMGU-BCA-205- Second Sem- Core VI- Fundamentals of Digital Systems- MCQ s. 2. Why the decimal number system is also called as positional number system?
MGU-BCA-205- Second Sem- Core VI- Fundamentals of Digital Systems- MCQ s Unit-1 Number Systems 1. What does a decimal number represents? A. Quality B. Quantity C. Position D. None of the above 2. Why the
More informationUNIVERSITY POLYTECHNIC B.I.T., MESRA, RANCHI. COURSE STRUCTURE (W.E.F Batch Students) (Total Unit 7.5) Sessional Unit Code. Theory Unit Course
COURSE STRUCTURE (W.E.F. 2011 Batch Students) (Total Unit 7.5) Course Theory Unit Course Sessional Unit Code Code DCP 4001 Data Structures 1.0 DCP 4002 Data Structures Lab. 0.5 DEC 4003 Electronics Circuits
More informationCode No: R Set No. 1
Code No: R059210504 Set No. 1 II B.Tech I Semester Regular Examinations, November 2006 DIGITAL LOGIC DESIGN ( Common to Computer Science & Engineering, Information Technology and Computer Science & Systems
More informationCode No: R Set No. 1
Code No: R059210504 Set No. 1 II B.Tech I Semester Regular Examinations, November 2007 DIGITAL LOGIC DESIGN ( Common to Computer Science & Engineering, Information Technology and Computer Science & Systems
More informationDHANALAKSHMI SRINIVASAN COLLEGE OF ENGINEERING AND TECHNOLOGY
DHANALAKSHMI SRINIVASAN COLLEGE OF ENGINEERING AND TECHNOLOGY Dept/Sem: II CSE/03 DEPARTMENT OF ECE CS8351 DIGITAL PRINCIPLES AND SYSTEM DESIGN UNIT I BOOLEAN ALGEBRA AND LOGIC GATES PART A 1. How many
More informationINSTITUTE OF AERONAUTICAL ENGINEERING (Autonomous) Dundigal, Hyderabad
INSTITUTE OF AERONAUTICAL ENGINEERING (Autonomous) Dundigal, Hyderabad - 500043 Course Name : DIGITAL LOGIC DESISN Course Code : AEC020 Class : B Tech III Semester Branch : CSE Academic Year : 2018 2019
More informationII/IV B.Tech (Regular/Supplementary) DEGREE EXAMINATION. Answer ONE question from each unit.
Hall Ticket Number: 14CS IT303 November, 2017 Third Semester Time: Three Hours Answer Question No.1 compulsorily. II/IV B.Tech (Regular/Supplementary) DEGREE EXAMINATION Common for CSE & IT Digital Logic
More informationKINGS COLLEGE OF ENGINEERING DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING QUESTION BANK NAME OF THE SUBJECT: EE 2255 DIGITAL LOGIC CIRCUITS
KINGS COLLEGE OF ENGINEERING DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING QUESTION BANK NAME OF THE SUBJECT: EE 2255 DIGITAL LOGIC CIRCUITS YEAR / SEM: II / IV UNIT I BOOLEAN ALGEBRA AND COMBINATIONAL
More informationNADAR SARASWATHI COLLEGE OF ENGINEERING AND TECHNOLOGY Vadapudupatti, Theni
NADAR SARASWATHI COLLEGE OF ENGINEERING AND TECHNOLOGY Vadapudupatti, Theni-625531 Question Bank for the Units I to V SEMESTER BRANCH SUB CODE 3rd Semester B.E. / B.Tech. Electrical and Electronics Engineering
More informationComputer Logical Organization Tutorial
Computer Logical Organization Tutorial COMPUTER LOGICAL ORGANIZATION TUTORIAL Simply Easy Learning by tutorialspoint.com tutorialspoint.com i ABOUT THE TUTORIAL Computer Logical Organization Tutorial Computer
More informationLABORATORY MANUAL VLSI DESIGN LAB EE-330-F
LABORATORY MANUAL VLSI DESIGN LAB EE-330-F (VI th Semester) Prepared By: Vikrant Verma B. Tech. (ECE), M. Tech. (ECE) Department of Electrical & Electronics Engineering BRCM College of Engineering & Technology
More informationCOLLEGE OF ENGINEERING DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING QUESTION BANK SUBJECT CODE & NAME: EC 1312 DIGITAL LOGIC CIRCUITS UNIT I
KINGS COLLEGE OF ENGINEERING DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING QUESTION BANK SUBJECT CODE & NAME: EC 1312 DIGITAL LOGIC CIRCUITS YEAR / SEM: III / V UNIT I NUMBER SYSTEM & BOOLEAN ALGEBRA
More informationDigital logic fundamentals. Question Bank. Unit I
Digital logic fundamentals Question Bank Subject Name : Digital Logic Fundamentals Subject code: CA102T Staff Name: R.Roseline Unit I 1. What is Number system? 2. Define binary logic. 3. Show how negative
More informationQuestion Bank. Fundamentals Of Computer FYBCA (SEM - I)
Question Bank Fundamentals Of Computer FYBCA (SEM - I) 1) Choose the appropriate option (1 Marks Questions) 1) COBOL is an example of level language. a) low level b) middle level c) high level d) both
More informationR a) Simplify the logic functions from binary to seven segment display code converter (8M) b) Simplify the following using Tabular method
SET - 1 1. a) Convert the decimal number 250.5 to base 3, base 4 b) Write and prove de-morgan laws c) Implement two input EX-OR gate from 2 to 1 multiplexer (3M) d) Write the demerits of PROM (3M) e) What
More informationSemester I.
Semester I Code No. Name of the Paper Marks (Theory + CCE) FC Hindi 35+15 FC English 35+15 FC Development of Entrepreneurship 35+15 FC Udiyamita vikas 35+15 BCA 101 Computer Fundamentals 35+15 BCA 102
More informationPART B. 3. Minimize the following function using K-map and also verify through tabulation method. F (A, B, C, D) = +d (0, 3, 6, 10).
II B. Tech II Semester Regular Examinations, May/June 2015 SWITCHING THEORY AND LOGIC DESIGN (Com. to EEE, ECE, ECC, EIE.) Time: 3 hours Max. Marks: 70 Note: 1. Question Paper consists of two parts (Part-A
More informationDigital Logic Design Exercises. Assignment 1
Assignment 1 For Exercises 1-5, match the following numbers with their definition A Number Natural number C Integer number D Negative number E Rational number 1 A unit of an abstract mathematical system
More informationSardar Patel University S Y BSc. Computer Science CS-201 Introduction to Programming Language Effective from July-2002
Sardar Patel University S Y BSc. Computer Science CS-201 Introduction to Programming Language Effective from July-2002 2 Practicals per week External marks :80 Internal Marks : 40 Total Marks :120 University
More informationKING FAHD UNIVERSITY OF PETROLEUM & MINERALS COMPUTER ENGINEERING DEPARTMENT
KING FAHD UNIVERSITY OF PETROLEUM & MINERALS COMPUTER ENGINEERING DEPARTMENT COE 202: Digital Logic Design Term 162 (Spring 2017) Instructor: Dr. Abdulaziz Barnawi Class time: U.T.R.: 11:00-11:50AM Class
More informationCOPYRIGHTED MATERIAL INDEX
INDEX Absorption law, 31, 38 Acyclic graph, 35 tree, 36 Addition operators, in VHDL (VHSIC hardware description language), 192 Algebraic division, 105 AND gate, 48 49 Antisymmetric, 34 Applicable input
More informationCourse Title III Allied Practical** IV Environmental Studies #
Part Ins. hrs / week Dur.Hr s. CIA Marks Total Marks Credit Page 1 of 5 BHARATHIAR UNIVERSITY,COIMBATORE-641 046 B.Sc. PHYSICS DEGREE COURSE SCHEME OF EXAMINATIONS (CBCS PATTERN) (For the students admitted
More informationSUBJECT COMPUTER APPLICATION PAGE 1
BACHELOR OF ARTS (B.A.) (THREE YEAR DEGREE COURSE) SUBJECT COMPUTER APPLICATION PAGE 1 B.A.(COMPUTER APPLICATION) COURSE STRUCTURE FIRST YEAR PAPER 101: Computer Fundamentals PAPER 102: Operating System
More informationMULTIMEDIA COLLEGE JALAN GURNEY KIRI KUALA LUMPUR
STUDENT IDENTIFICATION NO MULTIMEDIA COLLEGE JALAN GURNEY KIRI 54100 KUALA LUMPUR SECOND SEMESTER FINAL EXAMINATION, 2013/2014 SESSION ITC2223 COMPUTER ORGANIZATION & ARCHITECTURE DSEW-E-F 1/13 18 FEBRUARY
More informationVALLIAMMAI ENGINEERING COLLEGE
VALLIAMMAI ENGINEERING COLLEGE SRM Nagar, Kattankulathur 603 203 DEPARTMENT OF INFORMATION TECHNOLOGY QUESTION BANK Academic Year 2018 19 III SEMESTER CS8351-DIGITAL PRINCIPLES AND SYSTEM DESIGN Regulation
More informationDigital Design Using Digilent FPGA Boards -- Verilog / Active-HDL Edition
Digital Design Using Digilent FPGA Boards -- Verilog / Active-HDL Edition Table of Contents 1. Introduction to Digital Logic 1 1.1 Background 1 1.2 Digital Logic 5 1.3 Verilog 8 2. Basic Logic Gates 9
More informationEE178 Spring 2018 Lecture Module 1. Eric Crabill
EE178 Spring 2018 Lecture Module 1 Eric Crabill Goals I am here because I enjoy sharing information on how to use Xilinx silicon, software, and solutions You are here to earn elective credits, but more
More informationTeaching and Examination Scheme: PAPER HRS TH TU PR TH PR OR TW TOTAL
Course Name : Computer Engineering Group Course Code : CO/CD/CM/CW/IF Semester : Fifth for CO/CM/CW/IF and Sixth for CD Subject Title : Operating System Subject Code : 17512 Teaching and Examination Scheme:
More informationLogic design Ibn Al Haitham collage /Computer science Eng. Sameer
DEMORGAN'S THEOREMS One of DeMorgan's theorems stated as follows: The complement of a product of variables is equal to the sum of the complements of the variables. DeMorgan's second theorem is stated as
More informationVALLIAMMAI ENGINEERING COLLEGE
VALLIAMMAI ENGINEERING COLLEGE SRM Nagar, Kattankulathur 603 203 DEPARTMENT OF INFORMATION TECHNOLOGY & COMPUTER SCIENCE AND ENGINEERING QUESTION BANK II SEMESTER CS6201- DIGITAL PRINCIPLE AND SYSTEM DESIGN
More informationTIME SCHEDULE. 2 Physical Layer 15. Course General Outcomes: Sl. G.O On completion of this course the student will be able :
COURSE TITLE : DATA COMMUNICATION COURSE CODE : 3151 COURSE CATEGORY : B PERIODS/WEEK : 4 PERIODS/SEMESTER : 60 CREDITS : 4 TIME SCHEDULE MODULE TOPICS PERIODS 1 Concepts of Data Communication 15 2 Physical
More informationSIDDHARTH GROUP OF INSTITUTIONS :: PUTTUR Siddharth Nagar, Narayanavanam Road QUESTION BANK (DESCRIPTIVE)
SIDDHARTH GROUP OF INSTITUTIONS :: PUTTUR Siddharth Nagar, Narayanavanam Road 517583 QUESTION BANK (DESCRIPTIVE) Subject with Code : STLD(16EC402) Year & Sem: II-B.Tech & I-Sem Course & Branch: B.Tech
More informationDIGITAL ELECTRONICS. Vayu Education of India
DIGITAL ELECTRONICS ARUN RANA Assistant Professor Department of Electronics & Communication Engineering Doon Valley Institute of Engineering & Technology Karnal, Haryana (An ISO 9001:2008 ) Vayu Education
More informationSemester: I Credits: 5. Category: MC No.of hrs/week: 5 CA PROGRAMMING IN C
Semester: I Credits: 5 Category: MC No.of hrs/week: 5 CA1505 - PROGRAMMING IN C Objective: This course aims at explaining the basic concepts of computers and an easy understanding of C Language by the
More informationAryan College. Computer Fundamental. Introduction to Computer System
Computer Fundamental Unit 1 Introduction to Computer System 1. List various characteristics of computer. (2017) 2. Give name of two super computers. (2017) 3. What do you mean by system software? (2017)
More informationLesson Plan for Even semester Govt. Polytechnic Education Society, Lisana (Rewari) Name of the Faculty: Sh. Praveen Kumar Discipline:
Lesson Plan for Even semester Govt. Polytechnic Education Society, Lisana (Rewari) Name of the Faculty: Sh. Praveen Kumar Discipline: Computer Engg. Semester: Subject: 4 th DATA STRUCTURES USING C Lesson
More informationComputer Organization
A Text Book of Computer Organization and Architecture Prof. JATINDER SINGH Director, GGI, Dhaliwal Er. AMARDEEP SINGH M.Tech (IT) AP&HOD, Deptt.of CSE, SVIET, Banur Er. GURJEET SINGH M.Tech (CSE) Head,
More informationINTRODUCTION TO COMPUTERS KANNAN TUITION CENTER. CHAPTER: 2 NUMBER SYSTEMS
CHAPTER: 1 TWO MARKS QUESTIONS. 1. What are peripheral devices? 2. What do you mean by an algorithm? 3. What is a word processor software? 4. What is analog computing system? 5. What is laptop computer?
More informationUNIT I BOOLEAN ALGEBRA AND COMBINATIONAL CIRCUITS PART-A (2 MARKS)
SUBJECT NAME: DIGITAL LOGIC CIRCUITS YEAR / SEM : II / III DEPARTMENT : EEE UNIT I BOOLEAN ALGEBRA AND COMBINATIONAL CIRCUITS 1. What is variable mapping? 2. Name the two canonical forms for Boolean algebra.
More informationFIRST SEMESTER BCA Syllabus Copy BCA103T : PROBLEM SOLVING TECHNIQUES USING C
FIRST SEMESTER BCA Syllabus Copy BCA103T : PROBLEM SOLVING TECHNIQUES USING C Unit - I Introduction to Programming Concepts: Software, Classification of Software, Modular Programming, Structured Programming,
More informationCode No: R Set No. 1
Code No: R059210504 Set No. 1 II B.Tech I Semester Supplementary Examinations, February 2007 DIGITAL LOGIC DESIGN ( Common to Computer Science & Engineering, Information Technology and Computer Science
More informationJiwaji University, Gwalior -- B.A. Session
BA FIRST YEAR Jiwaji University, Gwalior -- B.A. Session 2014-17 Course Name Introduction to Information Technology Operating Systems - Windows 98 Theory Marks Practical Marks Total Marks 50-50 50 50 100
More informationLESSON PLAN BCA-2 nd Sem Subject : BCA 121 Advanced Programming in C Name of Assistant Prof : Ms Sonia Sharma
LESSON PLAN 2017-2018 BCA-2 nd Sem Subject : BCA 121 Advanced Programming in C Name of Assistant Prof : Ms Sonia Sharma January, Chapter 1: Strings in C Day3 January, Chapter 2 : Structure and Union Day3
More informationThis tutorial gives a complete understanding on Computer Logical Organization starting from basic computer overview till its advanced architecture.
About the Tutorial Computer Logical Organization refers to the level of abstraction above the digital logic level, but below the operating system level. At this level, the major components are functional
More informationSEMESTER SYSTEM, PROPOSED SCHEME FOR B.Sc. (ELECTRONICS), B.Sc. (ELECTRONICS MAINTENANCE)
SEMESTER SYSTEM, 2008 PROPOSED SCHEME FOR B.Sc. (ELECTRONICS), B.Sc. (ELECTRONICS MAINTENANCE) CLASS/ SEMESTER Sem-III Hons.-> Sem-IV Hons.-> B. Sc (Elex) B. Sc (Elex. Maint) EL-2101 Op-Amp & its Application
More informationCS6201-DIGITAL PRINCIPLE AND SYSTEM DESIGN I YEAR/II SEM PART-B UNIT-I BOOLEAN ALGEBRA AND LOGIC GATES.
CS6201-DIGITAL PRINCIPLE AND SYSTEM DESIGN I YEAR/II SEM PART-B UNIT-I BOOLEAN ALGEBRA AND LOGIC GATES. 1) Simplify the boolean function using tabulation method. F = (0, 1, 2, 8, 10, 11, 14, 15) List all
More informationHonorary Professor Supercomputer Education and Research Centre Indian Institute of Science, Bangalore
COMPUTER ORGANIZATION AND ARCHITECTURE V. Rajaraman Honorary Professor Supercomputer Education and Research Centre Indian Institute of Science, Bangalore T. Radhakrishnan Professor of Computer Science
More informationAcademic Programme: B.Sc. I Year. Computer Science (Optional) Hours. Fundamentals of Computer Hours.
Swami Ramanand Teerth Marathwada University, Nanded B.Sc First Year Semester Pattern Computer Science (Optional) With Effect from 2009-10 Aims and Objectives: 1. To provide a professional level of competence
More informationGuru Jambheshwar University of Science & Technology, Hisar Scheme for Theory + Practical Based Subjects
Guru Jambheshwar University of Science & Technology, Hisar Scheme for Theory + Practical Based Subjects Guidelines for Scheme of examination of UG Course Computer Science-B.A. Pass course (under semester
More informationCS/IT DIGITAL LOGIC DESIGN
CS/IT 214 (CR) Total No. of Questions :09] [Total No. of Pages : 02 II/IV B.Tech. DEGREE EXAMINATIONS, DECEMBER- 2016 First Semester CS/IT DIGITAL LOGIC DESIGN Time: Three Hours 1. a) Flip-Flop Answer
More informationR07
www..com www..com SET - 1 II B. Tech I Semester Supplementary Examinations May 2013 SWITCHING THEORY AND LOGIC DESIGN (Com. to EEE, EIE, BME, ECC) Time: 3 hours Max. Marks: 80 Answer any FIVE Questions
More informationDepartment of Computer Science and Engineering Khulna University of Engineering & Technology Khulna , Bangladesh. Course Plan/Profile
Department of Computer Science and Engineering Khulna University of Engineering & Technology Khulna - 9203, Bangladesh Course Plan/Profile 1. Course No.: CSE 1201 Contact Hours:3/week 2. Course Title:
More informationDIRECTORATE OF DISTANCE EDUCATION COMPUTER ORGANIZATION AND ARCHITECTURE/INTRODUCTION TO COMPUTER ORGANIZATION AND ARCHITECTURE
www.lpude.in DIRECTORATE OF DISTANCE EDUCATION COMPUTER ORGANIZATION AND ARCHITECTURE/INTRODUCTION TO COMPUTER ORGANIZATION AND ARCHITECTURE Copyright 2012 Lovely Professional University All rights reserved
More informationDIGITAL ELECTRONICS. P41l 3 HOURS
UNIVERSITY OF SWAZILAND FACUL TY OF SCIENCE AND ENGINEERING DEPARTMENT OF PHYSICS MAIN EXAMINATION 2015/16 TITLE OF PAPER: COURSE NUMBER: TIME ALLOWED: INSTRUCTIONS: DIGITAL ELECTRONICS P41l 3 HOURS ANSWER
More informationSeth Jai Parkash Polytechnic, Damla
Seth Jai Parkash Polytechnic, Damla Name of the Faculty: Ms Richa Kharbanda Discipline: Computer Engg. Semester: 4 th Subject: DATA STRUCTURES USING C Lesson Plan Duration: 15 weeks (from January, 2018
More information