Reinhard v. Hanxleden 1, Michael Mendler 2, J. Aguado 2, Björn Duderstadt 1, Insa Fuhrmann 1, Christian Motika 1, Stephen Mercer 3 and Owen Brian 3

Size: px
Start display at page:

Download "Reinhard v. Hanxleden 1, Michael Mendler 2, J. Aguado 2, Björn Duderstadt 1, Insa Fuhrmann 1, Christian Motika 1, Stephen Mercer 3 and Owen Brian 3"

Transcription

1 Sequentially Constructive Concurrency * A conservative extension of the Synchronous Model of Computation Reinhard v. Hanxleden, Michael Mendler 2, J. Aguado 2, Björn Duderstadt, Insa Fuhrmann, Christian Motika, Stephen Mercer 3 and Owen Brian 3 * to appear at DATE, Grenoble, March 23 University of Kiel, 2 University of Bamberg, 3 National Instruments von Hanxleden, et al. Synchron 22, Port aux Rocs, 2..2

2 Motivation (Taming Concurrency) Synchronous Languages Esterel, Lustre, Signal, Clocked, cyclic schedule by default: single iter per cycle, all reads initialised on demand: separate multiple assignments by clock barrier (pause, wait) Declarative all micro-step sequential control flow descriptive resolved by scheduler Sequential Languages C, Java, Asynchronous schedule by default: multiple concurrent readers/iters on demand: single assignment synchronisation (locks, semaphores) Imperative all sequential control flow prescriptive resolved by programmer von Hanxleden, et al. Synchron 22, Port aux Rocs,

3 Motivation (Taming Concurrency) Synchronous Languages Esterel, Lustre, Signal, Clocked, cyclic schedule deterministic concurrency and deadlock freedom Heavy restrictions by constructiveness analysis Sequential Languages C, Java, Asynchronous schedule No guarantees of determinism or deadlock freedom Intuitive programming paradigm Sequentially Constructive Model of Computation (SC MoC) all micro-step concurrent control flow descriptive resolved by scheduler all micro-step sequential control flow is prescriptive resolved by programmer von Hanxleden, et al. Synchron 22, Port aux Rocs,

4 Outline. Example 2. Threads and Concurrency 3. Sequential Constructiveness (SC) 4. Analysing SC 5. Notions of Constructiveness

5 A Sequentially Constructive Program Control Threads checkreq Request grant Dispatch req pend grant free von Hanxleden, et al. Synchron 22, Port aux Rocs,

6 A Sequentially Constructive Program Control checkreq grant req pend grant free von Hanxleden, et al. Synchron 22, Port aux Rocs,

7 A Sequentially Constructive Program F T F F T Imperative Program Order (Sequential access to share variables): ite-after-ite can change value sequentially (multi-iter) fully deterministic at thread level but not permitted in standard synchronous MoC von Hanxleden, et al. Synchron 22, Port aux Rocs,

8 A Sequentially Constructive Program SC MoC: Intra-instant (micro-step) thread scheduling prohibits race conditions... Concurrency Scheduling Constraints (access to shared variables): ite-before-read for concurrent ite/reads ite-before-ite for concurrent & conflicting ites (see later) von Hanxleden, et al. Synchron 22, Port aux Rocs,

9 Outline. Example 2. Threads and Concurrency 3. Sequential Constructiveness (SC) 4. Analysing SC 5. Notions of Constructiveness

10 Sequential Concurrent Program Graph (SCG) entry exit von Hanxleden, et al. Synchron 22, Port aux Rocs,

11 Intra-Instant Concurrency entry exit von Hanxleden, et al. Synchron 22, Port aux Rocs,

12 Intra-Instant Concurrency entry exit von Hanxleden, et al. Synchron 22, Port aux Rocs,

13 Intra-Instant Concurrency entry exit von Hanxleden, et al. Synchron 22, Port aux Rocs,

14 Intra-Instant Concurrency entry exit von Hanxleden, et al. Synchron 22, Port aux Rocs,

15 Intra-Instant Concurrency entry exit von Hanxleden, et al. Synchron 22, Port aux Rocs,

16 Intra-Instant Concurrency entry exit von Hanxleden, et al. Synchron 22, Port aux Rocs,

17 Intra-Instant Concurrency entry exit von Hanxleden, et al. Synchron 22, Port aux Rocs,

18 Intra-Instant Concurrency entry exit von Hanxleden, et al. Synchron 22, Port aux Rocs,

19 Intra-Instant Concurrency entry exit von Hanxleden, et al. Synchron 22, Port aux Rocs,

20 Intra-Instant Concurrency entry exit von Hanxleden, et al. Synchron 22, Port aux Rocs,

21 Intra-Instant Concurrency Definition: Two node instances and are concurrent in a macro tick, denoted, iff they appear in the micro ticks of they belong to statically concurrent threads their threads have been instantiated by the same instance of the associated least common ancestor fork. von Hanxleden, et al. Synchron 22, Port aux Rocs,

22 Outline. Example 2. Threads and Concurrency 3. Sequential Constructiveness (SC) 4. Analysing SC 5. Notions of Constructiveness

23 Sequential Admissibility Remember Sequentially ordered variable accesses exhibit no races cannot be reordered by the compiler Only concurrent ites to the same variable generate potential data data races must be resolved by the compiler can be ordered under multi-threading The following applies to concurrent variable accesses only... von Hanxleden, et al. Synchron 22, Port aux Rocs,

24 Organising Concurrent Variable Accesses concurrent, single iter, multi reader variables identical absolute ites confluent relative ites reads von Hanxleden, et al. Synchron 22, Port aux Rocs,

25 Types of Writes Given two ites to x, distinguish Confluent ites, where the order of the ites does not matter This implies that there are no side effects Non-confluent ites, where the order of the ites matters Given one ite to x, distinguish Absolute ites ( initialisation ) x = e Expression e does not constitute relative ite (see below) Eg, x =, x = 2*y + 5, x = f(z) Relative ites ( increments ) x = f(x, e) Combination function f such that f(f(x, e ), e 2 ) = f(f(x, e 2 ), e ) Hence schedules "x = f(x, e ); x = f(x, e 2 )" and "x = f(x, e 2 ); x = f(x, e )" yield same result for x the ites are confluent Sufficient condition: f is a commutative and associative Eg, x++, x = 5*x, x = x Also distinguish Effective ites, which change value of x Ineffective ites, that do not change value of x von Hanxleden, et al. Synchron 22, Port aux Rocs,

26 Sequential Admissibility Definition: A run for a SCG G = (N,E) is S-admissible if, for all ticks in this run, and for all concurrent node instances (n, i ), (n 2, i 2 ), with i i 2 and n R n 2 none of the following occurs: n and n 2 perform non-confluent ites on the same variable n reads a variable, on which n 2 then performs an effective ite n performs a relative ite to a variable, on which n 2 then performs an absolute ite. von Hanxleden, et al. Synchron 22, Port aux Rocs,

27 Sequential Constructiveness The existence of an S-admissible run does not guarantee by itself determinism! if!x entry x = false; y = false true y = true exit if!y true x = true This program has two S-admissible runs. Depending on which conditional is scheduled first, The resulting memory would be either: [x=true, y=false] or [x=false, y=true] von Hanxleden, et al. Synchron 22, Port aux Rocs,

28 Sequential Constructiveness Definition: A program is sequentially constructive (SC) if for each initial configuration and input:. there exists an S-admissible run 2. every S-admissible run generates the same, determinate sequence of macro responses in bounded time. von Hanxleden, et al. Synchron 22, Port aux Rocs,

29 Outline. Example 2. Threads and Concurrency 3. Sequential Constructiveness (SC) 4. Analysing SC 5. Notions of Constructiveness

30 Conservative Static Approximation Use a relation n j n 2 to over-approximate n j R n 2, i.e., what statements are concurrently invoked in the same tick, by considering only static control flow, or ignoring dependency on initial conditions, or by falsely considering nodes to be in the same tick. Over-approximate what ites are relative and confluent absolute and confluent by not evaluating expressions (combination function). von Hanxleden, et al. Synchron 22, Port aux Rocs,

31 Analysing Sequential Constructiveness In addition to and the following static node relations are introduced: iff and there exists a variable on which and perform non-confluent ites (e.g., non-identical absolute ites or relative ites with different combination function). iff and performs an absolute ite to a variable that is read by. iff and performs an absolute ite to a variable on which performs a relative ite. von Hanxleden, et al. Synchron 22, Port aux Rocs,

32 Analysing Sequential Constructiveness iff and performs an relative ite to a variable that is read by. iff or or. This contains the constraints induced by concurrent ite/increment/read accesses. iff or that is, if there is any control-flow or concurrent-access-induced ordering constraints. von Hanxleden, et al. Synchron 22, Port aux Rocs,

33 Analysing Sequential Constructiveness Definition: A program is acyclic SC (ASC) schedulable if in its SCG:. There are no statement nodes, with 2. There is no cycle that contains edges induced by. Lemma: Every ASC schedulable program is sequentially constructive. For a ASC program, an S-admissible schedule is one which executes concurrent statements in the order induced by!. Such schedule may be implemented by associating a priority with each statement node... von Hanxleden, et al. Synchron 22, Port aux Rocs,

34 Analysing Sequential Constructiveness Priorities and S-admissible schedule: checkreq = req grant = false pend && grant checkreq && free true true pend = false grant = true surface priority priority surface von Hanxleden, et al. Synchron 22, Port aux Rocs,

35 Analysing Sequential Constructiveness Priorities and S-admissible schedule: checkreq = req grant = false pend && grant checkreq && free true pend = false surface true grant = true surface von Hanxleden, et al. Synchron 22, Port aux Rocs,

36 Analysing Sequential Constructiveness Priorities and S-admissible schedule: checkreq = req grant = false pend && grant checkreq && free true pend = false true grant = true surface surface von Hanxleden, et al. Synchron 22, Port aux Rocs,

37 Analysing Sequential Constructiveness Priorities and S-admissible schedule: checkreq = req grant = false pend && grant checkreq && free true pend = false true grant = true surface surface von Hanxleden, et al. Synchron 22, Port aux Rocs,

38 Analysing Sequential Constructiveness Priorities and S-admissible schedule: checkreq = req grant = false pend && grant checkreq && free true true pend = false grant = true surface surface von Hanxleden, et al. Synchron 22, Port aux Rocs,

39 Analysing Sequential Constructiveness Priorities and S-admissible schedule: 2 checkreq = req grant = false pend && grant checkreq && free true true pend = false grant = true surface surface von Hanxleden, et al. Synchron 22, Port aux Rocs,

40 Analysing Sequential Constructiveness Priorities and S-admissible schedule: (variables are true initially) 2 checkreq = req grant = false pend && grant checkreq && free true true pend = false grant = true surface surface von Hanxleden, et al. Synchron 22, Port aux Rocs,

41 Analysing Sequential Constructiveness Priorities and S-admissible schedule: (variables are true initially) 2 checkreq = req grant = false pend && grant checkreq && free true true pend = false grant = true surface surface von Hanxleden, et al. Synchron 22, Port aux Rocs,

42 Analysing Sequential Constructiveness Priorities and S-admissible schedule: (variables are true initially) 2 checkreq = req grant = false pend && grant checkreq && free true true pend = false grant = true surface surface von Hanxleden, et al. Synchron 22, Port aux Rocs,

43 Analysing Sequential Constructiveness Priorities and S-admissible schedule: (variables are true initially) 2 checkreq = req grant = false pend && grant checkreq && free true true pend = false grant = true surface surface von Hanxleden, et al. Synchron 22, Port aux Rocs,

44 Analysing Sequential Constructiveness Priorities and S-admissible schedule: (variables are true initially) 2 checkreq = req grant = false pend && grant checkreq && free true true pend = false grant = true surface surface von Hanxleden, et al. Synchron 22, Port aux Rocs,

45 Analysing Sequential Constructiveness Priorities and S-admissible schedule: (variables are true initially) 2 checkreq = req grant = false pend && grant checkreq && free true true pend = false grant = true surface surface von Hanxleden, et al. Synchron 22, Port aux Rocs,

46 Analysing Sequential Constructiveness Priorities and S-admissible schedule: (variables are true initially) 2 checkreq = req grant = false pend && grant checkreq && free true true pend = false grant = true surface surface von Hanxleden, et al. Synchron 22, Port aux Rocs,

47 Analysing Sequential Constructiveness Lemma: A program is ASC schedulable if in its SCG:. There are no statement nodes, with. 2. All statement priorities are finite. ) Longest Weighted Path Problem NP hard in presence of non-zero weighted cycles However: non-zero cycles indicate causality problem (reject) ASC constructive programs have zero cycles factorises: (a) Strongly Connected Components, (b) Max Path in DAG ) linear complexity von Hanxleden, et al. Synchron 22, Port aux Rocs,

48 Outline. Example 2. Threads and Concurrency 3. Sequential Constructiveness (SC) 4. Analysing SC 5. Notions of Constructiveness

49 A Game of Constructiveness and Schedulability logically reactive program programmer compiler run-time system Programmer defines the rules prescribes sequential execution order leaves concurrency to compiler and run time Free Schedules deadlocks, oscillation, non-determinism, metastability Compiler = Player determines winning strategy restricts concurrency to ensure determinacy and deadlock freedom Admissible Schedules Run-time = Opponent tries to choose a spoiling execution from admissible schedules von Hanxleden, et al. Synchron 22, Port aux Rocs,

50 X-Constructiveness Definition: A program is X-constructive (XC) if for each initial configuration and input:. there exists an X-admissible run 2. every X-admissible run generates the same, determinate sequence of macro step responses in bounded time. von Hanxleden, et al. Synchron 22, Port aux Rocs,

51 Alternative Notions of Constructiveness Cyclic concurrent dependencies. Concurrent ites S constructive Static cycles, dynamic scheduling Speculate on absence P constructive B constructive Ineffective ites Speculate on absence or presence L constructive Out-of-order schedule von Hanxleden, et al. Synchron 22, Port aux Rocs,

52 Alternative Notions of Constructiveness S constructive Static cycles, dynamic scheduling Acyclic S constructive Sequence of values All programs without the fork-par-join operator are S constructive but many fail to be B constructive B constructive von Hanxleden, et al. Synchron 22, Port aux Rocs,

53 Alternative Notions of Constructiveness S constructive Static cycles, dynamic scheduling If (x) then x = Acyclic S constructive Sequence of values If (!x) then x = If (x & y) then x = If (x) then x = else x = B constructive P constructive L constructive von Hanxleden, et al. Synchron 22, Port aux Rocs,

54 Alternative Notions of Constructiveness S constructive Static cycles, dynamic scheduling Acyclic S constructive Sequence of values fork y = x par if (!x) then x = join B constructive P constructive L constructive von Hanxleden, et al. Synchron 22, Port aux Rocs,

55 Alternative Notions of Constructiveness S constructive Static cycles, dynamic scheduling fork if (x) then y = z par if (!x) then z = y join Acyclic S constructive Sequence of values B constructive von Hanxleden, et al. Synchron 22, Port aux Rocs,

56 Alternative Notions of Constructiveness S constructive Static cycles, dynamic scheduling fork if (x) then y = z par if (!x) then z = y join Acyclic S constructive Sequence of values B constructive x = ; fork if (x) then y = par if (y) then x = join von Hanxleden, et al. Synchron 22, Port aux Rocs,

57 Conclusion This Talk Clocked synchronous model of execution for imperative, shared-memory multi-processing Recovers and relaxes Esterel-style synchrony Future Plans Full-scale implementation within PRETSY (Precision-timed Synchronous Processing) Develop approximating algorithms for SC-analysis: Constructiveness + WCRT Detailed semantical study of the class of SC programs vis-a-vis other classes (Pnueli & Shalev, Berry, Signal, ) von Hanxleden, et al. Synchron 22, Port aux Rocs, 2..2

58 Questions Thank you! von Hanxleden, et al. Synchron 22, Port aux Rocs, 2..2

SCCharts. Sequentially Constructive Charts

SCCharts. Sequentially Constructive Charts SCCharts Sequentially Constructive Charts Reinhard von Hanxleden, Björn Duderstadt, Christian Motika, Steven Smyth, Michael Mendler, Joaquin Aguado, Stephen Mercer, and Owen O Brien Real-Time Systems and

More information

Overview. Synchronous Languages Lecture 12. Code Generation for Sequential Constructiveness. Compilation Overview. The 5-Minute Review Session

Overview. Synchronous Languages Lecture 12. Code Generation for Sequential Constructiveness. Compilation Overview. The 5-Minute Review Session Synchronous Languages Lecture 12 Overview Prof. Dr. Reinhard von Hanxleden Steven Smyth Christian-Albrechts Universität Kiel Department of Computer Science Real-Time Systems and Embedded Systems Group

More information

Submitted to Special Issue on Application of Concurrency to System Design

Submitted to Special Issue on Application of Concurrency to System Design Submitted to Special Issue on Application of Concurrency to System Design A Sequentially Constructive Concurrency A Conservative Extension of the Synchronous Model of Computation REINHARD VON HANXLEDEN,

More information

A Data-Flow Approach for Compiling the Sequentially Constructive Language (SCL)

A Data-Flow Approach for Compiling the Sequentially Constructive Language (SCL) A Data-Flow Approach for Compiling the Sequentially Constructive Language (SCL) Steven Smyth, Christian Motika, and Reinhard von Hanxleden Real-Time and Embedded Systems Group, Department of Computer Science

More information

EE382N.23: Embedded System Design and Modeling

EE382N.23: Embedded System Design and Modeling EE382N.23: Embedded System Design and Modeling Lecture 3 Language Semantics Andreas Gerstlauer Electrical and Computer Engineering University of Texas at Austin gerstl@ece.utexas.edu Lecture 3: Outline

More information

Synchronous Dataflow Processong

Synchronous Dataflow Processong Synchronous Dataflow Processong Claus Traulsen and Reinhard von Hanxleden Christian-Albrechts Universität zu Kiel Echtzeitsysteme / Eingebettete Systeme March 00 CAU Claus Traulsen / 8 Outline Motivation

More information

Sequential Constructiveness, SCL and SCCharts

Sequential Constructiveness, SCL and SCCharts Sequential Constructiveness, SCL and SCCharts Incorporating synchrony in conventional languages Reinhard von Hanxleden (U Kiel) 14 March 2018, Collège de France Reactive Systems pause input I output O

More information

Synchronous Statecharts. Christian Motika

Synchronous Statecharts. Christian Motika Execution (KlePto) Esterel to transformation (KIES) Synchronous Statecharts for executing Esterel with Ptolemy Christian Motika Real-Time Systems and Embedded Systems Group Department of Computer Science

More information

INSTITUT FÜR INFORMATIK

INSTITUT FÜR INFORMATIK INSTITUT FÜR INFORMATIK A Sequentially Constructive Circuit Semantics for Esterel Alexander Schulz-Rosengarten, Steven Smyth, Reinhard von Hanxleden, Michael Mendler Bericht Nr. 1801 February 2018 ISSN

More information

Updates on SCCharts Christian Motika Steven Smyth

Updates on SCCharts Christian Motika Steven Smyth Updates on SCCharts Updates on SCCharts Christian Motika Steven Smyth SYNCHRON 2015 04. DEC 2015, Kiel 1 Reactive System Updates on SCCharts Safety-critical systems State based reactions Concurrency Synchronous

More information

Synchronous Languages Lecture 07

Synchronous Languages Lecture 07 Synchronous Languages Lecture 07 Prof. Dr. Reinhard von Hanxleden Christian-Albrechts Universität Kiel Department of Computer Science Real-Time Systems and Embedded Systems Group 27 May 2015 Last compiled:

More information

Cyber Physical System Verification with SAL

Cyber Physical System Verification with SAL Cyber Physical System Verification with July 22, 2013 Cyber Physical System Verification with Outline 1 2 3 4 5 Cyber Physical System Verification with Table of Contents 1 2 3 4 5 Cyber Physical System

More information

Compiling SCCharts A Case-Study on Interactive Model-Based Compilation

Compiling SCCharts A Case-Study on Interactive Model-Based Compilation Compiling SCCharts A Case-Study on Interactive Model-Based Compilation Christian Motika, Steven Smyth, and Reinhard von Hanxleden Real-Time and Embedded Systems Group, Department of Computer Science Christian-Albrechts-Universität

More information

Deterministic Concurrency: A Clock-Synchronised Shared Memory Approach

Deterministic Concurrency: A Clock-Synchronised Shared Memory Approach Deterministic Concurrency: A Clock-Synchronised Shared Memory Approach Joaquín Aguado 1, Michael Mendler 1, Marc Pouzet 2, Partha Roop 3, and Reinhard von Hanxleden 4 1 Otto-Friedrich-Universität Bamberg,

More information

Foundations of the C++ Concurrency Memory Model

Foundations of the C++ Concurrency Memory Model Foundations of the C++ Concurrency Memory Model John Mellor-Crummey and Karthik Murthy Department of Computer Science Rice University johnmc@rice.edu COMP 522 27 September 2016 Before C++ Memory Model

More information

CMSC 714 Lecture 14 Lamport Clocks and Eraser

CMSC 714 Lecture 14 Lamport Clocks and Eraser Notes CMSC 714 Lecture 14 Lamport Clocks and Eraser Midterm exam on April 16 sample exam questions posted Research project questions? Alan Sussman (with thanks to Chris Ackermann) 2 Lamport Clocks Distributed

More information

Removing Cycles in Esterel Programs

Removing Cycles in Esterel Programs Removing Cycles in Esterel Programs Jan Lukoschus 1, Reinhard von Hanxleden 2 1 Christian-Albrechts-Universität zu Kiel, Institut für Informatik 24098, Kiel, Olshausenstr. 40, Germany jlu@informatik.uni-kiel.de

More information

Synchronous C + WCRT Algebra 101

Synchronous C + WCRT Algebra 101 Synchronous C + 101 Reinhard von Hanxleden Joint work with Michael Mendler, Claus Traulsen,... Real-Time and Embedded Systems Group (RTSYS) Department of Computer Science Christian-Albrechts-Universität

More information

Concurrent Models of Computation

Concurrent Models of Computation Concurrent Models of Computation Edward A. Lee Robert S. Pepper Distinguished Professor, UC Berkeley EECS 219D Concurrent Models of Computation Fall 2011 Copyright 2009-2011, Edward A. Lee, All rights

More information

The Java Memory Model

The Java Memory Model Jeremy Manson 1, William Pugh 1, and Sarita Adve 2 1 University of Maryland 2 University of Illinois at Urbana-Champaign Presented by John Fisher-Ogden November 22, 2005 Outline Introduction Sequential

More information

Clock-Synchronised Shared Objects for Deterministic Concurrency

Clock-Synchronised Shared Objects for Deterministic Concurrency BAMBERGER BEITRÄGE ZUR WIRTSCHAFTSINFORMATIK UND ANGEWANDTEN INFORMATIK ISSN 0937-3349 Nr. 102/Juli 2017 Clock-Synchronised Shared Objects for Deterministic Concurrency Joaquín Aguado, Michael Mendler,

More information

Modal Models in Ptolemy

Modal Models in Ptolemy Modal Models in Ptolemy Edward A. Lee Stavros Tripakis UC Berkeley Workshop on Equation-Based Object-Oriented Modeling Languages and Tools 3rd International Workshop on Equation-Based Object-Oriented Modeling

More information

The Esterel Language. The Esterel Version. Basic Ideas of Esterel

The Esterel Language. The Esterel Version. Basic Ideas of Esterel The Synchronous Language Esterel OMS W4995-02 Prof. Stephen. Edwards Fall 2002 olumbia University epartment of omputer Science The Esterel Language eveloped by Gérard erry starting 1983 Originally for

More information

Section 8. The Basic Step Algorithm

Section 8. The Basic Step Algorithm Section 8. The Basic Step Algorithm Inputs The status of the system The current time A list of external changes presented by the environment since the last step Comments Scheduled action appears in the

More information

Predictable multithreading of embedded applications using PRET-C

Predictable multithreading of embedded applications using PRET-C Predictable multithreading of embedded applications using PRET-C Sidharta Andalam University of Auckland New Zealand Interactive Presentation March 2010 Andalam (UoA) PRET DATE'10 1 / 20 Layout 1 Introduction

More information

The Java Memory Model

The Java Memory Model The Java Memory Model What is it and why would I want one? Jörg Domaschka. ART Group, Institute for Distributed Systems Ulm University, Germany December 14, 2009 public class WhatDoIPrint{ static int x

More information

Resource Allocation. Pradipta De

Resource Allocation. Pradipta De Resource Allocation Pradipta De pradipta.de@sunykorea.ac.kr Outline Dining Philosophers Problem Drinking Philosophers Problem Dining Philosophers Problem f(5) 5 f(1) Each philosopher goes through, Think

More information

RELAXED CONSISTENCY 1

RELAXED CONSISTENCY 1 RELAXED CONSISTENCY 1 RELAXED CONSISTENCY Relaxed Consistency is a catch-all term for any MCM weaker than TSO GPUs have relaxed consistency (probably) 2 XC AXIOMS TABLE 5.5: XC Ordering Rules. An X Denotes

More information

Concurrent ML. John Reppy January 21, University of Chicago

Concurrent ML. John Reppy January 21, University of Chicago Concurrent ML John Reppy jhr@cs.uchicago.edu University of Chicago January 21, 2016 Introduction Outline I Concurrent programming models I Concurrent ML I Multithreading via continuations (if there is

More information

Potential violations of Serializability: Example 1

Potential violations of Serializability: Example 1 CSCE 6610:Advanced Computer Architecture Review New Amdahl s law A possible idea for a term project Explore my idea about changing frequency based on serial fraction to maintain fixed energy or keep same

More information

PRET-C: A New Language for Programming Precision Timed Architectures (extended abstract)

PRET-C: A New Language for Programming Precision Timed Architectures (extended abstract) PRET-C: A New Language for Programming Precision Timed Architectures (extended abstract) Sidharta Andalam 1, Partha S Roop 1, Alain Girault 2, and Claus Traulsen 3 1 University of Auckland, New Zealand

More information

The Java Memory Model

The Java Memory Model The Java Memory Model The meaning of concurrency in Java Bartosz Milewski Plan of the talk Motivating example Sequential consistency Data races The DRF guarantee Causality Out-of-thin-air guarantee Implementation

More information

Executing SyncCharts with Ptolemy

Executing SyncCharts with Ptolemy Executing SyncCharts with Christian Motika Real-Time Systems and Embedded Systems Group Department of Computer Science Christian-Albrechts-Universität zu Kiel, Germany KIEL ER SYNCHRON Workshop 2010 Frejús,

More information

Lecture 21: Transactional Memory. Topics: consistency model recap, introduction to transactional memory

Lecture 21: Transactional Memory. Topics: consistency model recap, introduction to transactional memory Lecture 21: Transactional Memory Topics: consistency model recap, introduction to transactional memory 1 Example Programs Initially, A = B = 0 P1 P2 A = 1 B = 1 if (B == 0) if (A == 0) critical section

More information

Lecture 6: Logical Time

Lecture 6: Logical Time Lecture 6: Logical Time 1. Question from reviews a. 2. Key problem: how do you keep track of the order of events. a. Examples: did a file get deleted before or after I ran that program? b. Did this computers

More information

G52CON: Concepts of Concurrency

G52CON: Concepts of Concurrency G52CON: Concepts of Concurrency Lecture 6: Algorithms for Mutual Natasha Alechina School of Computer Science nza@cs.nott.ac.uk Outline of this lecture mutual exclusion with standard instructions example:

More information

Java Memory Model. Jian Cao. Department of Electrical and Computer Engineering Rice University. Sep 22, 2016

Java Memory Model. Jian Cao. Department of Electrical and Computer Engineering Rice University. Sep 22, 2016 Java Memory Model Jian Cao Department of Electrical and Computer Engineering Rice University Sep 22, 2016 Content Introduction Java synchronization mechanism Double-checked locking Out-of-Thin-Air violation

More information

A Semantics to Generate the Context-sensitive Synchronized Control-Flow Graph (extended)

A Semantics to Generate the Context-sensitive Synchronized Control-Flow Graph (extended) A Semantics to Generate the Context-sensitive Synchronized Control-Flow Graph (extended) Marisa Llorens, Javier Oliver, Josep Silva, and Salvador Tamarit Universidad Politécnica de Valencia, Camino de

More information

A Simple Example. The Synchronous Language Esterel. A First Try: An FSM. The Esterel Version. The Esterel Version. The Esterel Version

A Simple Example. The Synchronous Language Esterel. A First Try: An FSM. The Esterel Version. The Esterel Version. The Esterel Version The Synchronous Language Prof. Stephen. Edwards Simple Example The specification: The output O should occur when inputs and have both arrived. The R input should restart this behavior. First Try: n FSM

More information

Lecture 27: Safety and Liveness Properties, Java Synchronizers, Dining Philosophers Problem

Lecture 27: Safety and Liveness Properties, Java Synchronizers, Dining Philosophers Problem COMP 322: Fundamentals of Parallel Programming Lecture 27: Safety and Liveness Properties, Java Synchronizers, Dining Philosophers Problem Mack Joyner and Zoran Budimlić {mjoyner, zoran}@rice.edu http://comp322.rice.edu

More information

Interactive Esterel to SyncCharts Transformation. Christian Motika

Interactive Esterel to SyncCharts Transformation. Christian Motika Interactive Esterel to SyncCharts Transformation for executing Esterel with Ptolemy Christian Motika Real-Time Systems and Embedded Systems Group Department of Computer Science Christian-Albrechts-Universität

More information

Compiler Techniques For Memory Consistency Models

Compiler Techniques For Memory Consistency Models Compiler Techniques For Memory Consistency Models Students: Xing Fang (Purdue), Jaejin Lee (Seoul National University), Kyungwoo Lee (Purdue), Zehra Sura (IBM T.J. Watson Research Center), David Wong (Intel

More information

Separate Translation of Synchronous Programs to Guarded Actions

Separate Translation of Synchronous Programs to Guarded Actions Separate Translation of Synchronous Programs to Guarded Actions Jens Brandt and Klaus Schneider Embedded Systems Group Department of Computer Science University of Kaiserslautern http://es.cs.uni-kl.de

More information

Handout 9: Imperative Programs and State

Handout 9: Imperative Programs and State 06-02552 Princ. of Progr. Languages (and Extended ) The University of Birmingham Spring Semester 2016-17 School of Computer Science c Uday Reddy2016-17 Handout 9: Imperative Programs and State Imperative

More information

Functional Logic Programming Language Curry

Functional Logic Programming Language Curry Functional Logic Programming Language Curry Xiang Yin Department of Computer Science McMaster University November 9, 2010 Outline Functional Logic Programming Language 1 Functional Logic Programming Language

More information

Hierarchical FSMs with Multiple CMs

Hierarchical FSMs with Multiple CMs Hierarchical FSMs with Multiple CMs Manaloor Govindarajan Balasubramanian Manikantan Bharathwaj Muthuswamy (aka Bharath) Reference: Hierarchical FSMs with Multiple Concurrency Models. Alain Girault, Bilung

More information

Computation Abstractions. Processes vs. Threads. So, What Is a Thread? CMSC 433 Programming Language Technologies and Paradigms Spring 2007

Computation Abstractions. Processes vs. Threads. So, What Is a Thread? CMSC 433 Programming Language Technologies and Paradigms Spring 2007 CMSC 433 Programming Language Technologies and Paradigms Spring 2007 Threads and Synchronization May 8, 2007 Computation Abstractions t1 t1 t4 t2 t1 t2 t5 t3 p1 p2 p3 p4 CPU 1 CPU 2 A computer Processes

More information

Formal Specification and Verification

Formal Specification and Verification Formal Specification and Verification Introduction to Promela Bernhard Beckert Based on a lecture by Wolfgang Ahrendt and Reiner Hähnle at Chalmers University, Göteborg Formal Specification and Verification:

More information

A taxonomy of race. D. P. Helmbold, C. E. McDowell. September 28, University of California, Santa Cruz. Santa Cruz, CA

A taxonomy of race. D. P. Helmbold, C. E. McDowell. September 28, University of California, Santa Cruz. Santa Cruz, CA A taxonomy of race conditions. D. P. Helmbold, C. E. McDowell UCSC-CRL-94-34 September 28, 1994 Board of Studies in Computer and Information Sciences University of California, Santa Cruz Santa Cruz, CA

More information

A Deterministic Concurrent Language for Embedded Systems

A Deterministic Concurrent Language for Embedded Systems A Deterministic Concurrent Language for Embedded Systems Stephen A. Edwards Columbia University Joint work with Olivier Tardieu SHIM:A Deterministic Concurrent Language for Embedded Systems p. 1/30 Definition

More information

JAVA and J2EE UNIT - 4 Multithreaded Programming And Event Handling

JAVA and J2EE UNIT - 4 Multithreaded Programming And Event Handling JAVA and J2EE UNIT - 4 Multithreaded Programming And Event Handling Multithreaded Programming Topics Multi Threaded Programming What are threads? How to make the classes threadable; Extending threads;

More information

SCXML State Chart XML

SCXML State Chart XML SCXML State Chart XML Previously, in this course... Previously, in this course... Running Example all actions omitted wasn t it supposed to help? Previously, in this course... Running Example all actions

More information

A Deterministic Concurrent Language for Embedded Systems

A Deterministic Concurrent Language for Embedded Systems SHIM:A A Deterministic Concurrent Language for Embedded Systems p. 1/28 A Deterministic Concurrent Language for Embedded Systems Stephen A. Edwards Columbia University Joint work with Olivier Tardieu SHIM:A

More information

Research Article Removing Cycles in Esterel Programs

Research Article Removing Cycles in Esterel Programs Hindawi Publishing Corporation EURASIP Journal on Embedded Systems Volume 2007, Article ID 48979, 23 pages doi:10.1155/2007/48979 Research Article Removing Cycles in Esterel Programs Jan Lukoschus and

More information

Clock refinement in imperative synchronous languages

Clock refinement in imperative synchronous languages Gemünde et al. EURASIP Journal on Embedded Systems 2013, 2013:3 REVIEW OpenAccess Clock refinement in imperative synchronous languages Mike Gemünde *, Jens Brandt and Klaus Schneider Abstract The synchronous

More information

Coordination Principles

Coordination Principles Coordination Principles 8/12/07 These principles concern how autonomous entities work together toward a common result. A coordination system is a set of agents interacting within a finite or infinite game

More information

CPSC/ECE 3220 Fall 2017 Exam Give the definition (note: not the roles) for an operating system as stated in the textbook. (2 pts.

CPSC/ECE 3220 Fall 2017 Exam Give the definition (note: not the roles) for an operating system as stated in the textbook. (2 pts. CPSC/ECE 3220 Fall 2017 Exam 1 Name: 1. Give the definition (note: not the roles) for an operating system as stated in the textbook. (2 pts.) Referee / Illusionist / Glue. Circle only one of R, I, or G.

More information

Concurrency and Parallel Computing. Ric Glassey

Concurrency and Parallel Computing. Ric Glassey Concurrency and Parallel Computing Ric Glassey glassey@kth.se Outline Concurrency and Parallel Computing Aim: Introduce the paradigms of concurrency and parallel computing and distinguish between them

More information

Petri Nets ee249 Fall 2000

Petri Nets ee249 Fall 2000 Petri Nets ee249 Fall 2000 Marco Sgroi Most slides borrowed from Luciano Lavagno s lecture ee249 (1998) 1 Models Of Computation for reactive systems Main MOCs: Communicating Finite State Machines Dataflow

More information

Intel Threading Tools

Intel Threading Tools Intel Threading Tools Paul Petersen, Intel -1- INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS,

More information

The SPIN Model Checker

The SPIN Model Checker The SPIN Model Checker Metodi di Verifica del Software Andrea Corradini Lezione 1 2013 Slides liberamente adattate da Logic Model Checking, per gentile concessione di Gerard J. Holzmann http://spinroot.com/spin/doc/course/

More information

Interprocess Communication By: Kaushik Vaghani

Interprocess Communication By: Kaushik Vaghani Interprocess Communication By: Kaushik Vaghani Background Race Condition: A situation where several processes access and manipulate the same data concurrently and the outcome of execution depends on the

More information

Distributed Mutual Exclusion Algorithms

Distributed Mutual Exclusion Algorithms Chapter 9 Distributed Mutual Exclusion Algorithms 9.1 Introduction Mutual exclusion is a fundamental problem in distributed computing systems. Mutual exclusion ensures that concurrent access of processes

More information

Removing Cycles in Esterel Programs

Removing Cycles in Esterel Programs Removing Cycles in Esterel Programs Dissertation zur Erlangung des akademischen Grades Doktor der Naturwissenschaften (Dr. rer. nat.) der Technischen Fakultät der Christian-Albrechts-Universität zu Kiel

More information

A unified machine-checked model for multithreaded Java

A unified machine-checked model for multithreaded Java A unified machine-checked model for multithreaded Java Andre Lochbihler IPD, PROGRAMMING PARADIGMS GROUP, COMPUTER SCIENCE DEPARTMENT KIT - University of the State of Baden-Wuerttemberg and National Research

More information

Consistency in Distributed Systems

Consistency in Distributed Systems Consistency in Distributed Systems Recall the fundamental DS properties DS may be large in scale and widely distributed 1. concurrent execution of components 2. independent failure modes 3. transmission

More information

CalFuzzer: An Extensible Active Testing Framework for Concurrent Programs Pallavi Joshi 1, Mayur Naik 2, Chang-Seo Park 1, and Koushik Sen 1

CalFuzzer: An Extensible Active Testing Framework for Concurrent Programs Pallavi Joshi 1, Mayur Naik 2, Chang-Seo Park 1, and Koushik Sen 1 CalFuzzer: An Extensible Active Testing Framework for Concurrent Programs Pallavi Joshi 1, Mayur Naik 2, Chang-Seo Park 1, and Koushik Sen 1 1 University of California, Berkeley, USA {pallavi,parkcs,ksen}@eecs.berkeley.edu

More information

Advanced C Programming Winter Term 2008/09. Guest Lecture by Markus Thiele

Advanced C Programming Winter Term 2008/09. Guest Lecture by Markus Thiele Advanced C Programming Winter Term 2008/09 Guest Lecture by Markus Thiele Lecture 14: Parallel Programming with OpenMP Motivation: Why parallelize? The free lunch is over. Herb

More information

Lecture 7: Logical Time

Lecture 7: Logical Time Lecture 7: Logical Time 1. Question from reviews a. In protocol, is in- order delivery assumption reasonable? i. TCP provides it b. In protocol, need all participants to be present i. Is this a reasonable

More information

Concurrency, Mutual Exclusion and Synchronization C H A P T E R 5

Concurrency, Mutual Exclusion and Synchronization C H A P T E R 5 Concurrency, Mutual Exclusion and Synchronization C H A P T E R 5 Multiple Processes OS design is concerned with the management of processes and threads: Multiprogramming Multiprocessing Distributed processing

More information

Taming release-acquire consistency

Taming release-acquire consistency Taming release-acquire consistency Ori Lahav Nick Giannarakis Viktor Vafeiadis Max Planck Institute for Software Systems (MPI-SWS) POPL 2016 Weak memory models Weak memory models provide formal sound semantics

More information

Outline. G Honors Operating Systems. Deadlock Avoidance. Review: Deadlock Prevention. Lecture 11: Deadlocks Avoidance, Detection, and Recovery

Outline. G Honors Operating Systems. Deadlock Avoidance. Review: Deadlock Prevention. Lecture 11: Deadlocks Avoidance, Detection, and Recovery Outline G22.3250 Honors Operating Systems Lecture 11: Deadlocks Avoidance, Detection, and Recovery Process deadlocks (contd.) deadlock avoidance deadlock detection deadlock recovery combined approach to

More information

Implementation of Process Networks in Java

Implementation of Process Networks in Java Implementation of Process Networks in Java Richard S, Stevens 1, Marlene Wan, Peggy Laramie, Thomas M. Parks, Edward A. Lee DRAFT: 10 July 1997 Abstract A process network, as described by G. Kahn, is a

More information

Relaxed Memory-Consistency Models

Relaxed Memory-Consistency Models Relaxed Memory-Consistency Models [ 9.1] In small multiprocessors, sequential consistency can be implemented relatively easily. However, this is not true for large multiprocessors. Why? This is not the

More information

9/21/17. Outline. Expression Evaluation and Control Flow. Arithmetic Expressions. Operators. Operators. Notation & Placement

9/21/17. Outline. Expression Evaluation and Control Flow. Arithmetic Expressions. Operators. Operators. Notation & Placement Outline Expression Evaluation and Control Flow In Text: Chapter 6 Notation Operator evaluation order Operand evaluation order Overloaded operators Type conversions Short-circuit evaluation of conditions

More information

Software Engineering using Formal Methods

Software Engineering using Formal Methods Software Engineering using Formal Methods Introduction to Promela Wolfgang Ahrendt & Richard Bubel & Reiner Hähnle & Wojciech Mostowski 31 August 2011 SEFM: Promela /GU 110831 1 / 35 Towards Model Checking

More information

High Performance Computing Course Notes Shared Memory Parallel Programming

High Performance Computing Course Notes Shared Memory Parallel Programming High Performance Computing Course Notes 2009-2010 2010 Shared Memory Parallel Programming Techniques Multiprocessing User space multithreading Operating system-supported (or kernel) multithreading Distributed

More information

Fundamental Algorithms for System Modeling, Analysis, and Optimization

Fundamental Algorithms for System Modeling, Analysis, and Optimization Fundamental Algorithms for System Modeling, Analysis, and Optimization Stavros Tripakis, Edward A. Lee UC Berkeley EECS 144/244 Fall 2014 Copyright 2014, E. A. Lee, J. Roydhowdhury, S. A. Seshia, S. Tripakis

More information

Models of concurrency & synchronization algorithms

Models of concurrency & synchronization algorithms Models of concurrency & synchronization algorithms Lecture 3 of TDA383/DIT390 (Concurrent Programming) Carlo A. Furia Chalmers University of Technology University of Gothenburg SP3 2016/2017 Today s menu

More information

C++ Memory Model Tutorial

C++ Memory Model Tutorial C++ Memory Model Tutorial Wenzhu Man C++ Memory Model Tutorial 1 / 16 Outline 1 Motivation 2 Memory Ordering for Atomic Operations The synchronizes-with and happens-before relationship (not from lecture

More information

CHESS: Analysis and Testing of Concurrent Programs

CHESS: Analysis and Testing of Concurrent Programs CHESS: Analysis and Testing of Concurrent Programs Sebastian Burckhardt, Madan Musuvathi, Shaz Qadeer Microsoft Research Joint work with Tom Ball, Peli de Halleux, and interns Gerard Basler (ETH Zurich),

More information

A Deterministic Concurrent Language for Embedded Systems

A Deterministic Concurrent Language for Embedded Systems A Deterministic Concurrent Language for Embedded Systems Stephen A. Edwards Columbia University Joint work with Olivier Tardieu SHIM:A Deterministic Concurrent Language for Embedded Systems p. 1/38 Definition

More information

Processor speed. Concurrency Structure and Interpretation of Computer Programs. Multiple processors. Processor speed. Mike Phillips <mpp>

Processor speed. Concurrency Structure and Interpretation of Computer Programs. Multiple processors. Processor speed. Mike Phillips <mpp> Processor speed 6.037 - Structure and Interpretation of Computer Programs Mike Phillips Massachusetts Institute of Technology http://en.wikipedia.org/wiki/file:transistor_count_and_moore%27s_law_-

More information

Non-blocking Array-based Algorithms for Stacks and Queues. Niloufar Shafiei

Non-blocking Array-based Algorithms for Stacks and Queues. Niloufar Shafiei Non-blocking Array-based Algorithms for Stacks and Queues Niloufar Shafiei Outline Introduction Concurrent stacks and queues Contributions New algorithms New algorithms using bounded counter values Correctness

More information

Operating Systems (234123) Spring (Homework 3 Wet) Homework 3 Wet

Operating Systems (234123) Spring (Homework 3 Wet) Homework 3 Wet Due date: Monday, 4/06/2012 12:30 noon Teaching assistants in charge: Operating Systems (234123) Spring-2012 Homework 3 Wet Anastasia Braginsky All emails regarding this assignment should be sent only

More information

Deterministic Concurrency: A Clock-Synchronised Shared Memory Approach

Deterministic Concurrency: A Clock-Synchronised Shared Memory Approach Deterministic Concurrency: A Clock-Synchronised Shared Memory Approach Joaquín Aguado 1(B), Michael Mendler 1, Marc Pouzet 2, Partha Roop 3, and Reinhard von Hanxleden 4 1 Otto-Friedrich-Universität Bamberg,

More information

Program Abstractions, Language Paradigms. CS152. Chris Pollett. Aug. 27, 2008.

Program Abstractions, Language Paradigms. CS152. Chris Pollett. Aug. 27, 2008. Program Abstractions, Language Paradigms. CS152. Chris Pollett. Aug. 27, 2008. Outline. Abstractions for telling a computer how to do things. Computational Paradigms. Language Definition, Translation.

More information

Design and Specification of Embedded Systems in Java Using Successive, Formal Refinement

Design and Specification of Embedded Systems in Java Using Successive, Formal Refinement Design and Specification of Embedded Systems in Java Using Successive, Formal Refinement James Shin Young, Josh MacDonald, Michael Shilman, Abdallah Tabbara, Paul Hilfinger, and A. Richard Newton Department

More information

G Programming Languages Spring 2010 Lecture 13. Robert Grimm, New York University

G Programming Languages Spring 2010 Lecture 13. Robert Grimm, New York University G22.2110-001 Programming Languages Spring 2010 Lecture 13 Robert Grimm, New York University 1 Review Last week Exceptions 2 Outline Concurrency Discussion of Final Sources for today s lecture: PLP, 12

More information

Deadlock 1 Chapter 6

Deadlock 1 Chapter 6 Deadlock 1 Chapter 6 2 Deadlock A set of processes is deadlocked when each process in the set is blocked awaiting an event that can only be triggered by another blocked process in the set Permanent blocking

More information

Ch 9: Control flow. Sequencers. Jumps. Jumps

Ch 9: Control flow. Sequencers. Jumps. Jumps Ch 9: Control flow Sequencers We will study a number of alternatives traditional sequencers: sequential conditional iterative jumps, low-level sequencers to transfer control escapes, sequencers to transfer

More information

Jukka Julku Multicore programming: Low-level libraries. Outline. Processes and threads TBB MPI UPC. Examples

Jukka Julku Multicore programming: Low-level libraries. Outline. Processes and threads TBB MPI UPC. Examples Multicore Jukka Julku 19.2.2009 1 2 3 4 5 6 Disclaimer There are several low-level, languages and directive based approaches But no silver bullets This presentation only covers some examples of them is

More information

Lecture 2. The SCADE Language Data Flow Kernel. Daniel Kästner AbsInt GmbH 2012

Lecture 2. The SCADE Language Data Flow Kernel. Daniel Kästner AbsInt GmbH 2012 Lecture 2 The SCADE Language Data Flow Kernel Daniel Kästner AbsInt GmbH 2012 2 Synchronous Programming Two simple ways of implementing reactive systems: Event-driven Foreach input_event

More information

Scalable and Precise Dynamic Datarace Detection for Structured Parallelism

Scalable and Precise Dynamic Datarace Detection for Structured Parallelism Scalable and Precise Dynamic Datarace Detection for Structured Parallelism Raghavan Raman Rice University raghav@rice.edu Jisheng Zhao Rice University jisheng.zhao@rice.edu Vivek Sarkar Rice University

More information

SyncCharts in C. Reinhard von Hanxleden

SyncCharts in C. Reinhard von Hanxleden SyncCharts in C Reinhard von Hanxleden Real-Time and Embedded Systems Group (RTSYS) Department of Computer Science Christian-Albrechts-Universität zu Kiel www.informatik.uni-kiel.de/rtsys EMSOFT 09, Grenoble,

More information

Lecture 16: Recapitulations. Lecture 16: Recapitulations p. 1

Lecture 16: Recapitulations. Lecture 16: Recapitulations p. 1 Lecture 16: Recapitulations Lecture 16: Recapitulations p. 1 Parallel computing and programming in general Parallel computing a form of parallel processing by utilizing multiple computing units concurrently

More information

Part 3: Beyond Reduction

Part 3: Beyond Reduction Lightweight Analyses For Reliable Concurrency Part 3: Beyond Reduction Stephen Freund Williams College joint work with Cormac Flanagan (UCSC), Shaz Qadeer (MSR) Busy Acquire Busy Acquire void busy_acquire()

More information

Operating Systems. Designed and Presented by Dr. Ayman Elshenawy Elsefy

Operating Systems. Designed and Presented by Dr. Ayman Elshenawy Elsefy Operating Systems Designed and Presented by Dr. Ayman Elshenawy Elsefy Dept. of Systems & Computer Eng.. AL-AZHAR University Website : eaymanelshenawy.wordpress.com Email : eaymanelshenawy@yahoo.com Reference

More information

Types for Precise Thread Interference

Types for Precise Thread Interference Types for Precise Thread Interference Jaeheon Yi, Tim Disney, Cormac Flanagan UC Santa Cruz Stephen Freund Williams College October 23, 2011 2 Multiple Threads Single Thread is a non-atomic read-modify-write

More information

Programming Languages for Real-Time Systems. LS 12, TU Dortmund

Programming Languages for Real-Time Systems. LS 12, TU Dortmund Programming Languages for Real-Time Systems Prof. Dr. Jian-Jia Chen LS 12, TU Dortmund 20 June 2016 Prof. Dr. Jian-Jia Chen (LS 12, TU Dortmund) 1 / 41 References Slides are based on Prof. Wang Yi, Prof.

More information