2. (a) Compare the characteristics of a floppy disk and a hard disk. (b) Discuss in detail memory interleaving. [8+7]


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1 Code No: A R09 Set No (a) Explain the purpose of the following registers: i. IR ii. PC iii. MDR iv. MAR. (b) Explain with an example the steps in subtraction of two ndigit unsigned numbers. [8+7] 2. (a) Compare the characteristics of a floppy disk and a hard disk. (b) Discuss in detail memory interleaving. [8+7] 3. (a) Draw the logic diagram of a 2to4 line decoder using NOR gates only. Include an enable input and explain its functioning. (b) What is PAL? Explain the internal structure of PAL. [8+7] 4. (a) Formulate a hardware procedure for detecting an overflow by comparing the sign of the sum with the signs of the augend and addend. The numbers are in signed2 s complement representation. (b) Design an array multiplier that multiplies two 2bit numbers. [8+7] 5. (a) Give note on the registers in keyboard and display interfaces. (b) Explain the sequence of events involved in handshake scheme for an input data transfer. [8+7] 6. Simplify the following functions, and implement them with twoinput NOR gates: (a) F = wx + y z + w yz (b) F(w,x,y,z) = Σ (5,6,9,10). [7+8] 7. (a) What is straightline sequencing? Explain with an example. (b) Consider a computer that has a byteaddressable memory organized in 32bit words according to the littleendian scheme. A program reads ASCII characters entered at a keyboard and stores them in the successive byte locations, starting at location Show the contents of the two memory words at locations 1000 and 1004 after the name Johnson has been entered. [7+8] 8. (a) Define the following terms: 1
2 Code No: A R09 Set No. 2 i. datapath ii. processor clock iii. multiphase clocking. (b) Give the timing diagram of a memory write operation and explain. [6+9] 2
3 Code No: A R09 Set No (a) Draw the truth table of 3 input NAND gate and write the Boolean Equation for a twoinput NAND gate. (b) Simplify the Boolean function: F(W,X,Y,Z) = Σ (1,3,7,11,15) and the don t care conditions d(w,x,y,z) = Σ (0,2,5). [6+9] 2. (a) Perform the following arithmetic operation below with binary numbers and with negative numbers in signed2 s complement representation. Use seven bits to accommodate each number together with its sign. i. (+35) + (+40) ii. (35) + (40). (b) Write the Booth s algorithm for multiplication of signed2 s complement numbers. [8+7] 3. (a) Obtain the 1 s and 2 s complements of the following numbers: i ii iii iv (b) Mention the features of the following: i. Desktop computers ii. Workstations iii. Mainframes iv. Super computers. [8+7] 4. (a) Explain the organization of the control unit to allow conditional branching in the microprogram. (b) Discuss in detail the threebus architecture. [7+8] 5. (a) Illustrate programmedi/o with an example. (b) Draw the input interface circuit and explain. [8+7] 6. (a) Discuss the memory management requirements. (b) Explain the use of an associativemapped TLB. [5+10] 3
4 Code No: A R09 Set No (a) Explain with an example how decoders with enable inputs can be connected to form a larger decoder. (b) Draw a 4bit binary ripple counter and explain its way of functioning. [5+10] 8. (a) How strings are stored in memory? What are the two ways of indicating the length of the string? (b) Write an IA32 routine to pack two BCD digits into a Byte and explain. [7+8] 4
5 Code No: A R09 Set No What is the need for bus arbitration? Explain the two approaches to bus arbitration. [15] 2. (a) What is meant by memory? Briefly explain microcomputer memories. (b) Draw and explain set associative cache organization. [7+8] 3. (a) Differentiate between RISC and CISC. (b) What are weighted codes? Explain with examples. (c) Convert the hexadecimal number F3A7C2 to binary and octal. [6+5+4] 4. (a) Find the complement of the functions F=A BC +A B C and G=A(B C +BC) by taking their duals and complementing each literal. (b) Minimize F(A,B,C,D) = Σ (3,6,8,11,13,14) and don t cares Σ (4,10,15).[8+7] 5. (a) Give the control sequence for a conditional branch instruction and explain. (b) Compare the two approaches for implementing the control unit of a processor. [8+7] 6. (a) Write the algorithm for adding and subtracting numbers in signed2 s complement representation. (b) Show that adding B after the operation A+B +1 restores the original value of A. What should be done with the end carry? [7+8] 7. (a) Design an excess3tobinary decoder using the unused combinations of the code as don tcare conditions. (b) What is meant by combinational PLD? List and describe the major types of combinational PLDs. [9+6] 8. (a) IA32 architecture has a large and flexible set of addressing modes. Justify the statement. (b) Which of the following IA32 instructions would cause the assembler to issue a syntax error message? Why? i. ADD [EAX], [EBX + 4] ii. SUB EAX,[EBX + ESI*4 + 20] iii. MOV 20,EAX [9+6] 5
6 Code No: A R09 Set No Draw the flowchart for multiplication of two fixed point numbers when negative numbers are in signed2 s complement representation and explain with an example. [15] 2. (a) Memory hierarchy design is based on the principle of Locality of Reference. Explain the principle. (b) Explain in detail various cache memory organizations. [5+10] 3. (a) How many address bit are needed to create an address space of 4G? (b) Give a note on the following: i. Condition codes ii. Bigendian and littleendian assignments iii. Straight line sequencing [3+12] 4. (a) What is a bus? Draw the figure to show how functional units are interconnected using a bus in a computer and explain. (b) Perform the subtraction with the following unsigned decimal numbers by taking 10 s complement of the subtrahend. i ii iii iv [7+8] 5. (a) Explain the operation of 3to8 decoder with circuit diagram. (b) Design a 4bit synchronous binary based on JK flipflops. [5+10] 6. (a) With a neat diagram explain the implementation of interrupt priority using individual interruptrequest and acknowledgment lines. (b) Summarize the bus signals of SCSI bus. [8+7] 7. (a) Draw the truth table for a threeinput OR gate. (b) Explain the operation of a JK flipflop using its block diagram and truth table. What are its limitations? [4+11] 8. (a) Explain how a word is fetched from memory. 6
7 Code No: A R09 Set No. 3 (b) Show the control steps for the BranchonNegative instruction for a processor that has the threebus structure. [6+9] 7
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