Input and Output Ports. How do you get data into a computer from the outside?
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1 Input and Output Ports How do you get data into a computer from the outside? SIMPLIFIED INPUT PORT D 7 Any read from address $0000 gets signals from outside H C 2 D a t a D D D4 D3 S i g n a l s F r o m LDAA $00 Puts data from outside into accumulator A. Data from outside looks like a memory location OUT IN L i n e s D2 D O u t s i d e A Tri State Buffer acts like a switch OUT TRI If TRI is active, the switch is closed OUT will be the same as IN IN D0 If TRI is not active, the switch is open OUT will not be driven by IN Some other device can drive OUT Read from 0x0000 OUT IN
2 How do you get data out of computer to the outside? SIMPLIFIED OUTPUT PORT H C 2 D a t a L i n e s D 7 D D D4 D3 D2 D D Q D Q D Q D Q D Q D Q D Q S i g n a l s T o O u t s i d e Any write to address $0 latches data into flip flops, so data goes to external pins MOVB #$AA,$0 puts $AA on the external pins When a port is configured as output and you read from that port, the data you read is the data which was written to that port: MOVB #$AA,$0 LDAA $0 Accumulator A will have $AA after this D 0 D Q Write to 0x000 2
3 Figure - MC9S2DP2B Block Diagram MC9S2DP2B Device User Guide V02.3 VDDR VSSR VREGEN VDD,2 VSS,2 BKGD XFC VDDPLL VSSPLL EXTAL XTAL RESET PE0 PE PE2 PE3 PE4 PE PE PE7 TEST Multiplexed Wide Bus Multiplexed Narrow Bus Internal Logic 2.V VDD,2 VSS,2 PLL 2.V VDDPLL VSSPLL 2K Byte Flash EEPROM 2K Byte RAM 4K Byte EEPROM Single-wire Background Debug Module PTE PLL DDRE PA7 PA PA ADDR ADDR4 ADDR3 DATA DATA4 DATA3 DATA7 DATA DATA XIRQ IRQ R/W LSTRB ECLK MODA MODB NOACC/XCLKS CPU2 Periodic Interrupt COP Watchdog Clock Monitor Breakpoints System Integration Module (SIM) Multiplexed Address/Data Bus DDRA PTA Voltage Regulator Clock and Reset Generation Module PA4 PA3 PA2 PA PA0 ADDR2 ADDR ADDR0 ADDR9 ADDR8 DATA2 DATA DATA0 DATA9 DATA8 DATA4 DATA3 DATA2 DATA DATA0 VDDX VSSX PB7 PB PB ADDR7 ADDR ADDR DATA7 DATA DATA I/O Driver V VDDA VSSA DDRB PTB PB4 PB3 PB2 PB PB0 ADDR4 ADDR3 ADDR2 ADDR ADDR0 DATA4 DATA3 DATA2 DATA DATA0 A/D Converter V & Voltage Regulator Reference Voltage Regulator V & I/O VDDR VSSR ATD0 AN0 AN AN2 AN3 AN4 AN AN AN7 Enhanced Capture Timer SCI0 SCI SPI0 IIC VRH VRL VDDA VSSA AD0 PPAGE MISO MOSI SCK SS BDLC RXB (J80) TXB CAN0 RXCAN TXCAN CAN RXCAN TXCAN CAN2 RXCAN TXCAN CAN3 RXCAN TXCAN CAN4 RXCAN TXCAN SDA SCL PWM0 PWM PWM2 PWM3 PWM PWM4 PWM PWM PWM7 SPI SPI2 MISO MOSI SCK SS MISO MOSI SCK SS PAD00 PAD0 PAD02 PAD03 PAD04 PAD0 PAD0 PAD07 ATD PIX0 PIX PIX2 PIX3 PIX4 PIX ECS IOC0 IOC IOC2 IOC3 IOC4 IOC IOC IOC7 RXD TXD RXD TXD Module to Port Routing KWJ0 KWJ KWJ KWJ7 KWP0 KWP KWP2 KWP3 KWP4 KWP KWP KWP7 KWH0 KWH KWH2 KWH3 KWH4 KWH KWH KWH7 AN0 AN AN2 AN3 AN4 AN AN AN7 VRH VRL VDDA VSSA DDRK DDRT DDRS DDRM DDRJ DDRP DDRH AD PTK PTT PTS PTM PTJ PTP PTH VRH VRL VDDA VSSA PAD08 PAD09 PAD0 PAD PAD2 PAD3 PAD4 PAD PK0 PK PK2 PK3 PK4 PK PK7 PT0 PT PT2 PT3 PT4 PT PT PT7 PS0 PS PS2 PS3 PS4 PS PS PS7 PM0 PM PM2 PM3 PM4 PM PM PM7 PJ0 PJ PJ PJ7 PP0 PP PP2 PP3 PP4 PP PP PP7 PH0 PH PH2 PH3 PH4 PH PH PH7 XADDR4 XADDR XADDR XADDR7 XADDR8 XADDR9 ECS Signals shown in Bold are not available on the 80 Pin Package 2 3
4 Ports on the HC2 How do you get data out of computer to the outside? A Port on the HC2 is device the HC2 uses to control some hardware. Many of the HC2 ports are used to communicate with hardware outside of the HC2. The HC2 ports are accessed by the HC2 by reading and writing memory locations $0000 to $03FF. Some of the ports we will use in this course are PORTA, PORTB and PTH PORTA is accessed by reading and writing address $0000. PORTB is accessed by reading and writing address $000. PTH is accessed by reading and writing address $020. You can connect signals from the outside by connecting wires to pins 39 to 4 (PORTA), 8 to 2 (PORTB), and to pins 32 to 3 and 49 to 2 (PTH). On the MiniDRAGON+ EVB, a seven-segment LED is connected to PTH. When you power up or reset the HC2, PORTA, PORTB and PTH are input ports. You can make any or all bits of PORTA, PORTB and PTH outputs by writing a to the corresponding bits of their Data Direction Registers. The Data Dirction Register for PORTA is located at memory addres $0002. It is called DDRA. To make all bits of PORTA output, write a $FF to DDRA. To make the lower four bits of PORTA output and the upper four bits of PORTA input, write a $0F to DDRA. The Data Dirction Register for PORTB is located at memory addres $0003. It is called DDRB. To make all bits of PORTB output, write a $FF to DDRB. The Data Dirction Register for PTH is located at memory addres $022. It is called DDRH. To make all bits of PTH output, write a $FF to DDRH. 4
5 You can use DBug-2 to easily manipulate the IO ports on the 8HCS2 To make PTH an output, use MM to change the contents of address $022 (DDRH) to an $FF. You can now use MM to change contents of address $020 (PTH), which changes the logic levels on the PTH pins. If the data direction register makes the port an input, you can use MD to display the values on the external pins.
6 Using Port A of the 8HC2 To make a bit of Port A an output port, write a to the corresponding bit of DDRA (address 0x0002). To make a bit of Port A an input port, write a 0 to the corresponding bit of DDRA. On reset, DDRA is set to $00, so Port A is an input port. DDA7 DDA DDA DDA4 DDA3 DDA2 DDA DDA0 $0002 RESET For example, to make bits 3 0 of Port A input, and bits 7 4 output, write a 0xf0 to DDRA. To send data to the output pins, write to PORTA (address 0x0000). When you read from PORTA input pins will return the value of the signals on them (0 => 0V, => V); output pins will return the value written to them. PA7 PA PA PA4 DP3 PA2 PA PA0 $0000 RESET Port B works the same, except DDRB is at address 0x0003 and PORTB is at address 0x000.
7 ;A simple program to make PORTA output and PORTB input, ;then read the signals on PORTB and write these values ;out to PORTA prog: equ $000 PORTA: equ $00 PORTB: equ $0 DDRA: equ $02 DDRB: equ $03 org prog movb #$ff,ddra ; Make PORTA output movb #$00,DDRB ; Make PORTB input ldaa staa swi PORTB PORTA Because DDRA and DDRB are in consecutive address locations, you could make PORTA and output and PORTB and input in one instruction: movw #$ff00,ddra ; FF -> DDRA, 00 -> DDRB 7
8 GOOD PROGRAMMING STYLE. Make programs easy to read and understand. Use comments Do not use tricks 2. Make programs easy to modify Top-down design Structured programming no spaghetti code Self contained subroutines 3. Keep programs short BUT do not sacrifice items and 2 to do so TIPS FOR WRITING PROGRAMS. Think about how data will be stored in memory. Draw a picture 2. Think about how to process data Draw a flowchart 3. Start with big picture. Break into smaller parts until reduced to individual instructions Top-down design 4. Use names instead of numbers 8
9 Another Example of an Assembly Language Program Add the odd numbers in an array of data. The numbers are 8-bit unsigned numbers. The address of the first number is $E000 and the address of the final number is $E0F. Save the result in a variable called answer at address $2000. Start by drawing a picture of the data structure in memory: SUM ODD NUMBERS IN ARRAY FROM 0xE000 TO 0xE0f Treat numbers as 8 bit unsigned numbers 4 8 0xE000 0xE0F 9
10 Start with the big picture SUM ODD 8 BIT NUMBERS IN ARRAY FROM 0xE000 TO 0xE0f START 4 8 0xE000 Save Answer 0xE0F 0
11 Add details to blocks SUM ODD 8 BIT NUMBERS IN ARRAY FROM 0xE000 TO 0xE0f START Addr > Pointer 4 8 0xE000 0 > Sum Save Answer 0xE0F
12 Decide on how to use CPU registers for processing data SUM ODD 8 BIT NUMBERS IN ARRAY FROM 0xE000 TO 0xE0f START Addr > Pointer 4 8 0xE000 0 > Sum Save Answer 0xE0F Pointer: X or Y use X Sum: bit register D or Y No way to add 8 bit number to D Can use ABY to add 8 bit number to Y 2
13 Add more details: Expand another block SUM ODD 8 BIT NUMBERS IN ARRAY FROM 0xE000 TO 0xE0f START X > 4 0xE000 Addr > Pointer Get Num loop: 8 0 > Sum Yes Even? Save Answer Add Num to Sum No even: Inc Pointer 0xE0F Yes More to do? No 3
14 More details: How to tell if number is odd, how to tell when done SUM ODD 8 BIT NUMBERS IN ARRAY FROM 0xE000 TO 0xE0f START Addr > Pointer Get Num loop: X > 4 8 0xE000 0 > Sum Yes Even? Save Answer No Add Num to Sum even: How to test if even? LSB = 0 check LSB of memory Inc Pointer 0xE0F BRCLR 0,X,$0,even Yes More to do? How to check if more to do? If X < 0xE020, more to do. CMPX #$E020 BL0 or BLT loop? No Address in unsigned, use unsigned compare BLO loop 4
15 Convert blocks to assembly code SUM ODD 8 BIT NUMBERS IN ARRAY FROM 0xE000 TO 0xE0f START loop: Addr > Pointer LDX #ARRAY Get Num LDAB 0,X 0 > Sum LDY #0 Yes Even? BRCLR 0,X,$0,even Save Answer No Add Num to Sum ABY even: How to test if even? LSB = 0 check LSB of memory Inc Pointer INX BRCLR 0,X,$0,even Yes More to do? CMPX #ARRAY_END BLO loop How to check if more to do? If X < 0xE020, more to do. No BLO loop X > 4 8 0xE000 ARRAY 0xE0F ARRAY_END
16 Write program ;Program to sum odd numbers in a memory array prog: equ $000 data: equ $2000 array: equ $E000 len: equ $20 org prog ldx #array ; initialize pointer ldy #0 ; initialize sum to 0 loop: ldab 0,x ; get number brclr 0,x,$0,skip ; skip if even aby ; odd - add to sum skip: inx ; point to next entry cpx #(array+len) ; more to process? blo loop ; if so, process sty answer ; done -- save answer swi org data answer: ds.w ; reserve -bit word for answer Important: Comment program so it is easy to understand.
17 The assembler output for the above program Note that the assembler output shows the op codes which the assembler generates for the HC2. For example, the op code for brclr 0,x,$0,skip is 0f prog: equ $ data: equ $2000 e000 array: equ $E len: equ $ org prog 000 ce e0 00 ldx #array ; initialize pointer 003 cd ldy #0 ; initialize sum to 0 00 e 00 loop: ldab 0,x ; get number 008 0f brclr 0,x,$0,skip ; skip if even 00c 9 ed aby ; odd - add to sum 00e 08 skip: inx ; point to next entry 00f 8e e0 20 cpx #(array+len) ; more to process? 02 2 f2 blo loop ; if so, process 04 7d sty answer ; done -- save answer 07 3f swi 2000 org data 2000 answer: ds.w ; reserve -bit word for answer And here is the.s9 file: S C3A E73D0ADA S3000CEE000CD0000E000F000029ED088ECD S0B00E0202F27D20003FE S FC 7
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