Chapter 3: part 3 Binary Subtraction

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1 Chapter 3: part 3 Binary Subtraction Iterative combinational circuits Binary adders Half and full adders Ripple carry and carry lookahead adders Binary subtraction Binary adder-subtractors Signed binary numbers Signed binary addition and subtraction Overflow Other Arithmetic Functions Chapter 4 1

2 Unsigned Subtraction Algorithm: Subtract the subtrahend N from the minuend M If no end borrow occurs, then M N, and the result is a non-negative number and correct. If an end borrow occurs, then N > M and the difference M N + 2 n is subtracted from 2 n, and a minus sign is appended to the result ( ) 0011 Examples: Chapter 4 2

3 Unsigned Subtraction (continued) The subtraction, 2 n N, is taking the 2 s complement of N To do both unsigned addition and unsigned A subtraction requires: Quite complex! Goal: Shared simpler logic for both addition and subtraction Introduce complements as an approach Binary adder Subtract/Add S Borrow Complement 0 1 Quadruple 2-to-1 multiplexer B Binary subtractor Selective 2's complementer Result Chapter 4 3

4 Complements Two complements: Diminished Radix Complement of N (r 1) s complement for radix r 1 s complement for radix 2 Defined as (r n 1) Ν Radix Complement r s complement for radix r 2 s complement in binary Defined as r n N Subtraction is done by adding the complement of the subtrahend If the result is negative, takes its 2 s complement Chapter 4 4

5 Binary 1's Complement For r = 2, N = , n = 8 (8 digits): (r n 1) = = or The 1's complement of is then: Since the 2 n 1 factor consists of all 1's and since 1 0 = 1 and 1 1 = 0, the one's complement is obtained by complementing each individual bit (bitwise NOT). Chapter 4 5

6 Binary 2's Complement For r = 2, N = , n = 8 (8 digits), we have: (r n ) = or The 2's complement of is then: Note the result is the 1's complement plus 1, a fact that can be used in designing hardware Chapter 4 6

7 Subtraction with 2 s Complement For n-digit, unsigned numbers M and N, find M N in base 2: Add the 2's complement of the subtrahend N to the minuend M: M + (2 n N) = M N + 2 n If M > N, the sum produces end carry r n which is discarded; from above, M N remains. If M < N, the sum does not produce an end carry and, from above, is equal to 2 n ( N M ), the 2's complement of ( N M ). To obtain the result (N M), take the 2's complement of the sum and place a to its left. Chapter 4 7

8 Important Observation The complement of the complement restores the number to its original value. This is true for both 1 s complement and 2 s complement. Chapter 4 8

9 Unsigned 2 s Complement Subtraction Example 1 Find s comp The carry of 1 indicates that no correction of the result is required. Chapter 4 9

10 Unsigned 2 s Complement Subtraction Example 2 Find s comp The carry of 0 indicates that a correction of the result is required. Result = ( ) 2 s comp Chapter 4 10

11 Signed Integers Positive numbers and zero can be represented by unsigned n-digit, radix r numbers. We need a representation for negative numbers. To represent a sign (+ or ) we need exactly one more bit of information (1 binary digit gives 2 1 = 2 elements which is exactly what is needed). Since computers use binary numbers, by convention, the most significant bit is interpreted as a sign bit: s a n 2 a 2 a 1 a 0 where: s = 0 for Positive numbers s = 1 for Negative numbers and a i = 0 or 1 represent the magnitude in some form. Chapter 4 11

12 Signed Integer Representations Signed-Magnitude the number consists of a magnitude and a symbol (0 for +, 1 for -). Signed-Complement a negative number is represented by its complement. There are two possibilities here: Signed 1's Complement Uses 1's Complement Arithmetic Signed 2's Complement Uses 2's Complement Arithmetic Chapter 4 12

13 Signed Integer Representation Example r =2, n=3 Number Sign - Mag. 1's Comp. 2's Comp Chapter 4 13

14 Corresponding positive number? The two's complement of a negative number is the corresponding positive value. For example, inverting the bits of 5 ( ) gives: And adding one gives the final value: (5) Chapter 4 14

15 Signed-Complement Arithmetic Addition: 1. Add the numbers including the sign bits, discarding a carry out of the sign bits (2's Complement) 2. If the sign bits were the same for both numbers and the sign of the result is different, an overflow has occurred. 3. The sign of the result is computed in step 1. Subtraction: Form the 2 s complement of the number you are subtracting and follow the rules for addition. Chapter 4 15

16 Signed 2 s Complement Examples Example 1: Example 2: Chapter 4 16

17 2 s Complement Adder/Subtractor Subtraction can be done by addition of the 2's Complement. 1. Complement each bit (1's Complement.) 2. Add 1 to the result. The circuit shown computes A + B and A B: For S = 1, subtract, the 2 s complement B 3 of B is formed by using XORs to form the 1 s comp and adding the 1 applied to C 0. For S = 0, add, B is C 3 passed through unchanged C 4 S 3 A 3 B 2 A 2 B 1 A 1 B 0 A 0 C 2 C 1 C 0 FA FA FA FA S 2 S 1 S 0 S Chapter 4 17

18 Overflow Detection Overflow occurs if n + 1 bits are required to contain the result from an n-bit addition or subtraction Overflow can occur for: Addition of two operands with the same sign Subtraction of operands with different signs Signed number overflow cases with correct result sign Detection can be performed by examining the result signs which should match the signs of the top operand Chapter 4 18

19 Overflow Detection Signed number cases with carries C n and C n 1 shown for correct result signs: Signed number cases with carries shown for erroneous result signs (indicating overflow): Simplest way to implement overflow V = C n + C n 1 Chapter 4 19

20 Overflow Example (1) Carries: Chapter 4 20

21 Overflow Example (2) Carries: A simple logic that provides overflow detection is shown in Figure 4-8 (see next slide) Chapter 4 21

22 Figure 4-8 Chapter 4 22

23 Class Exercises (1) Perform the indicated subtraction with the following unsigned binary numbers by taking the 2s complement of the subtrahend: (please see slide 9) a) b) Chapter 4 23

24 Class Exercises (2) Perform the arithmetic operations (+36) + (-24) and (-35) (-24) in binary using signed 2s complement representation for negative numbers. (see slide 17) Chapter 4 24

25 Other Arithmetic Functions Convenient to design the functional blocks by contraction - removal of redundancy from circuit to which input fixing has been applied Functions Incrementing Decrementing Multiplication by Constant Zero Fill and Extension Chapter 4 25

26 Design by Contraction Contraction is a technique for simplifying the logic in a functional block to implement a different function The new function must be realizable from the original function by applying rudimentary functions to its inputs Contraction is treated here only for application of 0s and 1s (not for X and X) After application of 0s and 1s, equations or the logic diagram are simplified by using rules given on page 168 of the text. Chapter 4 26

27 Design by Contraction Example Contraction of a ripple carry adder to incrementer for n = 3 Set B = 001 C 3 5 X X X A A 1 A C 1 3 C S 2 S 1 S 0 (a) A 2 A 1 A 0 S 2 S 1 S 0 (b) The middle cell can be repeated to make an incrementer with n > 3. Chapter 4 27

28 Discussion Can we make the three cells identical? How? Chapter 4 28

29 Incrementing & Decrementing Incrementing Adding a fixed value to an arithmetic variable Fixed value is often 1, called counting (up) Examples: A + 1, B + 4 Functional block is called incrementer Decrementing Subtracting a fixed value from an arithmetic variable Fixed value is often 1, called counting (down) Examples: A 1, B 4 Functional block is called decrementer Chapter 4 29

30 Multiplication by a Constant Multiplication of B(3:0) by 101 See text Figure 4-10 (a) for contraction B 3 B 2 B 1 B B 3 B 2 B 1 B 0 Carry output 4-bit Adder Sum C 6 C 5 C 4 C 3 C 2 C 1 C 0 Chapter 4 30

31 Zero Fill Zero fill - filling an m-bit operand with 0s to become an n-bit operand with n > m Filling usually is applied to the MSB end of the operand, but can also be done on the LSB end Example: filled to 16 bits MSB end: LSB end: Chapter 4 31

32 Extension Extension - increase in the number of bits at the MSB end of an operand by using a complement representation Copies the MSB of the operand into the new positions Positive operand example extended to 16 bits: Negative operand example extended to 16 bits: Chapter 4 32

33 Extension Example (107 in decimal) ( how much in 2 s complement?) Chapter 4 33

34 Weekly Exercise (a) and (b) 4-5 (a) and (b) (a) and (c) Chapter 4 34

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