MULTIMEDIA COLLEGE JALAN GURNEY KIRI KUALA LUMPUR
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1 STUDENT IDENTIFICATION NO MULTIMEDIA COLLEGE JALAN GURNEY KIRI KUALA LUMPUR SECOND SEMESTER FINAL EXAMINATION, 2013/2014 SESSION ITC2223 COMPUTER ORGANIZATION & ARCHITECTURE DSEW-E-F 1/13 18 FEBRUARY AM AM (2 Hours) INSTRUCTION TO STUDENT 1. This Examination paper has TEN (10) printed pages. 2. This question paper consists of THREE (3) sections. Section A : Answer ALL questions. Section B : Answer ALL questions. Section C : Answer ALL questions. 3. Please write all your answers in the Answer Booklet provided.
2 SECTION A : OBJECTIVE QUESTIONS (20 MARKS) INSTRUCTION : ANSWER ALL QUESTIONS. 1. What are the symbols used to represent digits in the binary number system? A. 0, 1 B. 0, 1, 2 C. 0 through 9 D. 1, 2 2. The output of an AND gate is FALSE. A. all the time B. when any input is FALSE C. when any input is TRUE D. when all inputs are TRUE 3. What is the binary value equivalent of the decimal number 368? A B C D The decimal equivalent of hexadecimal number 1A53 is A B C D SFCS Page 2 of 10
3 5. How many unique symbols are used in the decimal number system? A. One B. Nine C. Ten D. Unlimited 6. The hexadecimal number A0 has the decimal value equivalent to. A. 80 B. 256 C. 100 D s complement representation of decimal number of -17 by using 8 bit representation is. A B C D A multiplexer has. A. one input and several outputs B. one input and one output C. several inputs and several outputs D. several inputs and one output SFCS Page 3 of 10
4 9. A logic circuit that can store one bit of information is a. A. flip-flop B. counter C. gate D. code converter 10. The output of an AND gate with three inputs, X, Y, and Z, is TRUE when. A. X = 1, Y = 1, Z = 0 B. X = 0, Y = 0, Z = 0 C. X = 1, Y = 1, Z = 1 D. X = 1, Y = 0, Z = What does the small bubble on the output of the NAND gate logic symbol mean? A. Open collector output. B. Tristate. C. The output is inverted. D. None of the above. 12. Logically, the output of a NOR gate would have the same Boolean expression as a(n): A. NAND gate immediately followed by an inverter B. OR gate immediately followed by an inverter C. AND gate immediately followed by an inverter D. NOR gate immediately followed by an inverter SFCS Page 4 of 10
5 13. How many input combinations would a truth table has for a six-input AND gate? A. 32 B. 48 C. 64 D Which of the following is in the SOP form? A. AB + CD + E B. PQ(R + S) C. (A + B)(C + D + E) D. (X+Y) ( X+Y+Z) 15. What is the 2 s complement of the number ? A B C D Below is the truth table for a NOR gate. What is the value of x and y? INPUT OUTPUT A B C 0 0 x 0 1 y A. x =1, y = 0 B. x =1, y = 1 C. x =0, y = 0 D. x =0, y = 1 SFCS Page 5 of 10
6 17. Which of the memory is volatile memory? A. ROM B. RAM C. PROM D. EEPROM 18. In a JK Flip-Flop, toggle means. A. Set Q = 1 and Q = 0. B. Set Q = 0 and Q = 1. C. Change the output to the opposite state. D. No change in output. 19. A full adder logic circuit will have. A. two inputs and one output B. three inputs and three outputs C. two inputs and two outputs D. three inputs and two outputs 20. Based on the following instruction, determine the order of execution cycle for machine instruction in basic computer? I. Read the effective address from memory if the instruction has an indirect address II. Execute the instruction III. Fetch an instruction from memory IV. Decode the instruction A. II, III, IV, I B. I, II, III, IV C. III, IV, I, II D. IV, III, I, II SFCS Page 6 of 10
7 SECTION B : TRUE OR FALSE QUESTIONS (10 MARKS) INSTRUCTION : ANSWER ALL QUESTIONS. 1. With an OR gate, the output is TRUE only when both inputs are TRUE. 2. Four bits equal one byte. 3. An inverter performs a NOT operation. 4. R3 R6 show the system has R3 as source register and R6 as destination register. 5. This is an example of a SOP expression: X = ( A + B ) ( C + D ) 6. The decimal number system consists of the digits from 0 to Static RAM is a faster and more dense memory than DRAM 8. In a Boolean equation the use of the + symbol represents the AND function. 9. The number of control lines for a 8-to-1 multiplexer is three. 10. EPROM contents can be erased by exposing it to Ultraviolet rays. SFCS Page 7 of 10
8 SECTION C : STRUCTURE QUESTIONS (70 MARKS) INSTRUCTION : ANSWER ALL QUESTIONS. Question 1 a) Give the definition of the following terms: i. Bit ii. Byte (2 marks) b) Convert the following numbers to the number of other bases respectively: No. Decimal Binary Hexadecimal i ii iii. 6FDA (No marks will be awarded for this question unless you show your working) (18 marks) SFCS Page 8 of 10
9 Question 2 a) Draw the logic diagram for the following Boolean expressions: (A+C) (B +C ) (5 marks) b) Based on the circuit shown below, answer the following questions: A B Y C i. Write the Boolean expression for the output Y. (5 marks) ii. Derive the truth table for Y. Question 3 (10 marks) a) Apply DeMorgan s theorem to the following equations: i. ii. b) Perform the following operation in 8-bit 2 s complement: (4 marks) i ii (6 marks) SFCS Page 9 of 10
10 Question 4 Based on the truth table shown below: Input A B C Y a) Draw the appropriate loops on the K-Map b) Write the simplified Boolean expression. Question 5 (5 marks) (5 marks) a) Briefly explain the following term of logic micro operations: i. Set (Preset) Microoperation ii. Clear (Reset) Microoperation (4 marks) b) Assume R1= , solve the following operation: i. Logical shift right twice. ii. Arithmetic shift left once. (6 marks) End of Page. SFCS Page 10 of 10
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