Lectures 11 & 12: Synchronous Sequential Circuits Minimization

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Warren Doyle
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1 Lectures & 2: Synchronous Sequential Circuits Minimization. This week I noted that our seven-state edge detector machine on the left side below could be simplified to a five-state machine on the right. What is the formal procedure for doing this? S S S S i S S S S S S i S S Original State Transition Diagram Minimized State Transition Diagram.. We start with the following definitions... Two states S i and S j are equivalent if and only if for every possible input sequence, the same output sequence will be produced regardless of whether S i or Sj is the initial state...2. A successor to state S i is a state that it transitions to based on its input (not a sequence), e.g. S has S and S as its successors. We can differentiate successors by prefacing the word with the input, e.g. S is the - successor of S, and S is the -successor of S. We refer to all of the immediate successors of a state as its k- successors...3. A block is a subset of states that may be equivalent...4. A partition is a set of blocks where the states in each block are definitely not equivalent to the states in the other blocks..2. Partition minimization procedure..2.. Start with all states in one partition, and all are in the same block, P, e.g. (S i, S, S, S, S, S, S ) Create P 2 by dividing the states in P into blocks that have the same outputs. From our definition of equivalent, states that have different outputs cannot be equivalent. Here, P 2 = (S i, S, S, S, S ) (S, S ).2.3. We create P 3 from P 2 by looking at the k-successors of each state. Those states of a block that have k- successors that are in different blocks from others in the block must be placed in new blocks grouped by shared k-successors The -successors for the (S i, S, S, S, S ) block of P 2 are S, S, S, S, S, respectively, so it will have to be divided into those that stay in the block, and those that move to the (S, S ) of P 2, i.e., (S i, S, S ) and (S, S ). The -successors for (S i, S, S ) are S, S, S, respectively, so it will be divided into (S i) and (S, S ). The -succesors for (S, S ) are S, S, so it will not need to be divided. So the first block of P 2 will be divided into the three blocks (S i), (S, S ) and (S, S ) in P The -successors for the (S, S ) block of P 2 are S, S, respectively, which are in different blocks from each other in P 2, so it will have to be divided into two separate blocks (S ), and (S ) So P 3 = (S i)(s, S )(S, S )(S )(S ) All succeeding partitions look at each multiple element block of the previous partition to see if the k- successors of its elements lead to the same blocks of the previous partition. If not, the block must be further divided. If any block splits, then we must continue to another step of partitioning. If no block splits, then we are done For P 4, the -successors of (S, S ) are both block (S ), so that will not cause the block to split. The - successors are both (S, S ), so there is no need to separate the block further during this partitioning step For P 4, the -successors of (S, S ) are both block (S, S ), so that will not cause the block to split. The - successors are both (S ), so there is no need to separate the block further during this partitioning step Since no block split, the final minimized partition is P 3 = (S i)(s, S )(S, S )(S )(S ), which matches the five-state transition diagram. 2. Combining equivalent states we get the state table on the right.

2 Next State Output x = x = z Next State Output i x = x = z i Minimized State Table Original State Table 2.. Choice of Flip-Flops and Derivation of Next-State and Output Expressions 2... For example we will keep things simple, and choose to use DFF Moore Model Assign binary codes to each state. Since we have five states, we will need three DFF to represent the possible states. We will have A, B, and C as the present state of the corresponding flip-flops Binary Input Next State Output Code A B C x A B C z i i Create K-Map for each flip-flop based on input and present state. A d d d d d d A = Bx B d d d d d d B = x Use derivations from these K-maps to design initial combinational circuit Create a K-Map based on flip-flops to determine the output combinational circuit. z C z = C + A BC C d d d d d d C = B x + A + B C

3 2..3. Will the above circuit fulfill our expectations for our transition diagram? No! There is no way to set the initial state. We need to be able to clear all of the flip-flops before starting. D flip-flops can come with asynchronous preset and clears. We will not pursue this issue any further. 3. Now let s walk through designing a synchronous sequential circuit for a continuous binary coded decimal, BCD. This circuit will take four bits, indicate whether they are a valid BCD, then take four more bits with the first bit being the least significant. We will build this using the Mealy model. If the four bits are a valid BCD, i.e., between and 9, then circuit will output, else. 3.. The original state transition diagram is simpler than our edge detector because there are no loops. Left branches are for inputs of zero, and right branches are for inputs of one. / / S S S S S S S S S S S S S S S i 3.2. Apply the Partitioning Minimization Procedure to reduce the number of states in a Mealy Model Except for state i, we will refer to the states simply by their bit patterns Since this is a Mealy Model, states do not have output values. The k-successors for a state are the output value created by the combination of the state and the possible inputs P = (i,,,,,,,,,,,,,, ) P 2 = (i,,,,,, ) (, ) (,,,,, ) The first block all have k-successors of /, /. The second block all have /, /. The last block all have /, / Note the reason we do not have a fourth block based on the other possible k-successor combination, /, /, is because there are no states that have that combination P 3 = (i,, ) (, ) (, ) (, ) (,,,,, ) The first block all have k-successors in the first block of P (, ) have -successors in (, ), and -sucessors in (,,,,, ) (, ) have both of their k-successors in (,,,,, ) (, ) have the single state, i, as their k-successor so we can presume that that block will never split, and ignore it until the end of the procedure.

4 */ Similarly, (,,,,, ) all have a single state, i, as their k-successor, so that block will never split too P 4 = (i) () () (, ) (, ) (, ) (,,,,, ) (i,, ) of P 3 must split because each of its elements have its k-successors in a different block of P 3 from the other two elements. i leads to (i,, ), leads to (, ), and leads to (, ) There is no need for another partition because all elements in each block of P 4 lead to identical blocks of P We let * stand for either a or at a given position, and ~(*) = (,,,,, ) in our notation. The transition state diagram would be: S i S * S * S ~(*) S * S * Next State Output x = x = x = x = i * * * * * * * ~(*) * ~(*) ~(*) * i i ~(*) i i State Table 3.4. Since there are six states we will need three flip flops, A, B, C Now assign state binary codes State binary codes can be assigned randomly, but careful assignments may reduce the combinational logic Rules of thumb for state binary code assignments Try to assign adjacent (Hamming distance of one) code words to a state and the state that follows it If two present states have the same next state, assign those present states adjacent code words A K-Map will help Since the initial state will be re-initialized each four bits, it should be all zeroes so that we can use the Clear pin for the flip-flops Next place * next to the i since * is the successor state for i. Now place *, and * adjacent to *. This leaves * and ~(*). * needs to be adjacent to i and *, and there is one place for it. We would like ~* adjacent to *, *, and i, but that is not possible. Which is why these are called rules of thumb, not fixed laws. The ~* can be placed adjacent to * and * though. i * * C * * ~(*) 3.6. Use the binary codes to create a state-assigned table Binary Input Next State Output Code A B C x A B C z i i * * * * * * * * ~(*) ~(*) 3.7. Create K-Map for each flip-flop based on input and present state in the state-assigned table.

5 A d d d d d A = AC + A Bx z B d d d d d B = C +A Bx C d d d d d C = BC x +AC + A BC 3.7 Use derivations from the K-maps to design initial combinational circuit. 3.8 Create a K-Map based on flip-flops and, since this is a Mealy model, the input, to determine the output combinational circuit. d d d d z = C + A B +Bx

EECS150 - Digital Design Lecture 20 - Finite State Machines Revisited

EECS150 - Digital Design Lecture 20 - Finite State Machines Revisited April 2, 2009 John Wawrzynek Spring 2009 EECS150 - Lec20-fsm Page 1 Finite State Machines (FSMs) FSM circuits are a type of sequential