CSE A215 Assembly Language Programming for Engineers

Transcription

1 CSE A215 Assembly Language Programming for Engineers Lecture 7 MIPS vs. ARM (COD Chapter 2 and Exam #1 Review) October 12, 2012 Sam Siewert

2 Comparison of MIPS32 and ARM Instruction Formats and Addressing Sam Siewert 2

3 MIPS Instruction Format Three Simple Formats Register Operation Code, Rt & Rs Source Registers, Rd Destination Register, Function Variation on Opcode (Shift Amount Used to Isolate Bitfields or multiply/divide) Immediate Apply Opcode to Rs with Rt+offset Jump 26 bit address to branch to Addressing Modes Immediate, Register, Base, PCrelative, Pseudoindirect Sam Siewert 3

4 MIPS Register File bit General Purpose Registers with Conventions Summarized on Ref. Card and page 121 in COD Register Fill and Spill As Needed for Execution Context Sam Siewert 4

5 Use MIPS Reference Card Maps ASM Mnemonic to Instruction Format, Operation Operation defined by opcode, function for R & FR format For ASM Quick Reference and Semantics - See P. 78 Examples of Assembler source and Decode of Opcode, Format with Function in R/FR Many variations of Operations for R/FR instruction format Defined by the additional function bits along with opcode Note Floating Point Has Additional FMT and FT fields as Well RISC Opcode Field Always Same MS bits [CISC often has many variations on Opcode field sizes] Basic Instructions Formats (R, I, J) and Floating Point (FR, FI) For GP Register Names, Provides Numbers and Use Watch out for Sign Extension Where 16-bit Immediate is Assumed to Expand to larger values with same sign as Msbit Does Not Provide Addressing Modes (See P ) Sam Siewert 5

6 MIPS Addressing Modes Immediate Dest Register, Src Register and Constant Valued Operand Used for Arithmetic with Small Values E.g. addiu, add immediate unsigned, [I format] addiu $s1, $s2, 0xFFFF Register Two Src Registers and Dest Register Most Often Used for Full-Word Arithmetic and Logical Operations E.g. addu, add unsigned, [R format] addu $s1, $s2, $s3, s.t. $s1 = $s2 + $s3 E.g. jr, jump to addr in register, [R format] jr $ra, jump to return-address Base Two Src Registers and an Offset Often Used for Array Access E.g. lw, load word, [I format] lw $s1, 8($s2), load contents of $s1 at memory address pointed to by $s2+8 E.g. sw, store word, [I format] sw $s1, 8($s2), store contents of $s1at memory address pointed to by $s2+8 PC Relative Two Src Registers and PC offset Most Often Used for Loop Conditions and If-then-else E.g. beq, branch if equal, [I format] beq $s1, $s2, 0xFF Loop test, if($s1 == $s2) go to PC+4+0xFF Sam Siewert 6

7 ARM Instruction Format Much More Complex Sam Siewert 7

8 ARM Register File ARM bit GP Registers Banked by Processor Mode System & User normal mode FIQ fast interrupt and exception handling IRQ normal interrupt handling Sam Siewert 8

9 MIPS vs. ARM Assembly Similar for Load/Store and Basic Arithmetic Sam Siewert 9

10 MIPS Instruction Formats Arithmetic I or R format, Immediate and Register Addressing I format for smaller numbers, uses one less register (available for other uses) R format for 32-bit full size words Data Transfer (Load/Store) I format, Base Addressing Very Convenient for Loading and Storing Array Elements Common Case in C Code Logical - I or R format, Register Addressing I format for Zero Extended Immediates ori, addi with $zero often used to transfer contents from one register to another Conditional Branch I or R format, Register or PC-Relative Addressing Jump J or R format, Immediate or Register Addressing Function calls with Jump and Link Switch Jump Tables and Return from Function with Jump Register Sam Siewert 10

11 MIPS Arithmetic Examples MIPS ASM code: Assmue g, h, f are global data in.myvars C code: #include <stdlib.h> int g, h, f;.text.global _start _start: lw $t2,.myvars /* load address of g in $t2 */ lw $t3,.myvars+4 /* load 5679=0xDDDD in $t3 */ sw $t3, 0($t2) /* store 0xDDDD in $t2->g */ lw $t2,.myvars+8 /* load address of h in $t2 */ lw $t3,.myvars+12 /* load 4369=0x1111 in $t3 */ sw $t3, 0($t2) /* store 0x1111 in $t2->h */ lw $t3,.myvars /* load address of g in $t3 */ lw $t2, 0($t3) /* load contents of g in $t2 */ lw $t3,.myvars+8 /* load address of h in $t3 */ lw $t3, 0($t3) /* load contents of h in $t3 */ add $t2, $t2, $t3 /* $t2 = g + h */ lw $t3,.myvars+16 /* load address of f in $t3 */ sw $t2, 0($t3) /* store (g + h) in $t2 in f */ int main(void) { g=0x0000dddd; h=0x ; f = g + h; Assume exit(1) is called with ASM } exit(1); Sam Siewert 11

12 ARM Arithmetic Example (Beagle xm) ARM ASM code:.myvars:.word g /*.myvars + 0 */.word 5679 /*.myvars + 4 */.word h /*.myvars + 8 */.word 4369 /*.myvars + 12 */.word f /*.myvars + 16 */.comm g,4,4 /* storage for g, 4 bytes aligned */.comm h,4,4 /* storage for h, 4 bytes aligned */.comm f,4,4 /* storage for f, 4 bytes aligned */.text.global _start _start: ldr r2,.myvars /* load address of g into r2 */ ldr r3,.myvars+4 /* load 5679=0xDDDD into r3 */ str r3, [r2, #0] /* store 0xDDDD in r2->g */ ldr r2,.myvars+8 /* load address of h into r2 */ ldr r3,.myvars+12 /* load 4369=0x1111 into r3 */ str r3, [r2, #0] /* store 0x1111 in r2->h */ ldr r3,.myvars /* load address of g into r3 */ ldr r2, [r3, #0] /* load contents of g into r2 */ ldr r3,.myvars+8 /* load address of h into r3 */ ldr r3, [r3, #0] /* load contents of h into r3 */ add r2, r2, r3 /* r2 = g + h */ ldr r3,.myvars+16 /* load address of f into r3 */ str r2, [r3, #0] /* store (g + h) in r2 into f */ mov r0, $0 /* exit() call */ mov r7, $1 swi $0 C code: #include <stdlib.h> int g, h, f; int main(void) { g=0x0000dddd; h=0x ; f = g + h; exit(1); Sam Siewert 12 }

13 Exam # 1 - Outline Where to Focus Sam Siewert 13

14 Exam Format 1 or 2 Questions from COD Ch Questions from Appendix C and Logic Design for ALU 2+ Questions for COD Ch Questions for COD Ch. 3 8 Questions Total Some True/False (1 or 2) Some Multiple Choice (1 or 2) Some Short Answer, Pseudo-Code (C or MIPS ASM), Diagram, Logic Table (no more than 4) Full Class Period to Complete Can Use MIPS Ref Card, Copy of COD P. 78, and COD Pages , as well as Calculator/Smart-Phone for Checking Hex/Decimal Math Closed Book Sam Siewert 14

15 COD Chapter 1 Basic Computer Organization Processor with Internal Control/Data Paths Interface to Memory on Local Bus Separate I/O Bus Interface Application Software System Software Hardware Tools for Generating Machine Code HW / Operating_System / Application Stack and HW to SW Interface C code compile ASM asseble machine code ASM is 1:1 ASM instruction to machine instruction C code is 1:n, where one C statement becomes 1 or more ASM instructions (a block of ASM) Basic Computer Efficiency (Throughput) Measure of CPI (Clocks Per Intsruction) or IPC (Instructions Per Clock) Sam Siewert 15

16 Appendix C Logic Design How to Construct an ALU Arithmetic Logic Unit Control Signals Register Selection, Execution Unit Selection, Clocking (State Machine), and Overall Pipeline Synchronization Data Path Register File and Latches R-S Flip Flops D Flip Flops JK Flip Flops Combinational Logic Design Truth Tables Logic Schematics Decoders Multiplexors Layers of Logic (2 Layer PLA) DeMorgan s Laws PLAs and Product of Sums Form Clocked State Machines Input, Output, State Transitions ALU as a State Machine Sam Siewert 16

17 COD Chapter 2 Basic Instruction Formats (See Ref Card) I Immediate R Register J Jump FR Floating Point Register FI Floating Point Immediate MIPS Register File (Compare to ARM Register File) MIPS Use and Optimization for Function Calls (Save, Temp, Arguments, Return Values, Return Address, Stack and Frame Pointers) ARM Use and Optimization for Execution Contexts (Banking) MIPS ASM (See P. 78) Basic Blocks - Arithmetic, Load/Store, Logical If-then-else and Looping Conditional Branch Jumping Switch Statements, Function Call Return, Goto MIPS Addressing Modes (See P ) Immediate Jump Register and 16-bit Arithmetic and Logic Applied to Registers Register Primarily Used for Arithmetic and Logic from Load/Store Data Base Primarily Used for Array Access PC-Relative Primarily Used for Branching in Loops (Psuedoindirect Ingore for now) Sam Siewert 17

18 Chapter 3 COD Addition and Subtraction (Carry and Overflow) Multiplication (Overflow, Slow and Fast Method) Division (Hard to Speed up Either Slow or Variable Clocks for SRT Guessing Look-up Optimization) Floating Point Format and Revisit to Addition/Subtraction Sign Bit Biased Exponent (Why Biased?) Fraction (a.k.a Mantissa) Float = (-1) S x F x 2 E Addition/Subtraction: Must Be Scaled as Needed with Matching Exponents, Add the Significands, Normalize, Check for Over/Underflow, Round, Normalize Floating Point Multiplication/Division Multiplication: Add Exponents, Subtract Bias, Multiply Mantissas, Normalize Division: Subtract Exponents, Subtract Bias, Divide Mantissas, Normalize Sam Siewert 18

19 MIPS vs ARM Comparison of Register Files Comparison of Pipelines (5 Stage) ARM Fetch, Decode, Execute, Data Access, Write-Back MIPS Fetch, Decode, Execute, Memory Access, Write-Back Analysis of ASM Code from Either for Load/Store and Basic Arithmetic/Logic Operations ARM has No Division Operation! Why? Sam Siewert 19