Virtual Memory: Systems

Transcription

1 Virtual Memory: Systems 5-23: Introduction to Computer Systems 8 th Lecture, March 28, 27 Instructor: Franz Franchetti & Seth Copen Goldstein

2 Recap: Hmmm, How Does This Work?! Process Process 2 Process n 2

3 VM as a Tool for Memory Management Simplifying memory allocation Sharing code and data among processes Virtual Address Space for Process : VP VP 2... Address translation PP 2 Physical Address Space (DRAM) N- Virtual Address Space for Process 2: VP VP 2... PP 6 PP 8... (e.g., read-only library code) N- M- 3

4 Review: Virtual Memory & Physical Memory Virtual address Valid PTE PTE 7 Physical page number or disk address null null Memory resident page table (DRAM) Physical memory (DRAM) VP VP 2 VP 7 VP 4 Virtual memory (disk) VP VP 2 VP 3 VP 4 PP PP 3 VP 6 VP 7 A page table contains page table entries (PTEs) that map virtual pages to physical pages. 4

5 Translating with a k-level Page Table Having multiple levels greatly reduces page table size Page table base register (part of the process context) n- VPN VIRTUAL ADDRESS VPN 2... VPN k p- VPO the Level page table a Level 2 page table a Level k page table PPN m- PPN p- PPO PHYSICAL ADDRESS 5

6 Translation Lookaside Buffer (TLB) A small cache of page table entries with fast access by MMU TLB 2 VPN PTE 3 CPU VA MMU PA 4 Cache/ Memory Data 5 Typically, a TLB hit eliminates the k memory accesses required to do a page table lookup. 6

7 Set Associative Cache: Read E = 2 e lines per set Locate set Check if any line in set has matching tag Yes + line valid: hit Locate data starting at offset Address of word: t bits s bits b bits S = 2 s sets CT tag CI index CO offset data begins at this offset v tag 2 B- valid bit B = 2 b bytes per cache block (the data) 7

8 Review of Symbols Basic Parameters N = 2 n : Number of addresses in virtual address space M = 2 m : Number of addresses in physical address space P = 2 p : Page size (bytes) Components of the virtual address (VA) TLBI: TLB index TLBT: TLB tag VPO: Virtual page offset VPN: Virtual page number Components of the physical address (PA) PPO: Physical page offset (same as VPO) PPN: Physical page number CO: Byte offset within cache line CI: Cache index CT: Cache tag (bits per field for our simple example) 8

9 Today Simple memory system example Case study: Core i7/linux memory system Memory mapping 9

10 Simple Memory System Example Addressing 4-bit virtual addresses 2-bit physical address Page size = 64 bytes VPN Virtual Page Number VPO Virtual Page Offset PPN Physical Page Number PPO Physical Page Offset

11 Simple Memory System TLB 6 entries 4-way associative TLBT TLBI VPN VPO VPN = b = xd Translation Lookaside Buffer (TLB) Set Tag PPN Valid Tag PPN Valid Tag PPN Valid Tag PPN Valid 3 9 D D 2 4 A D A 34 2

12 Simple Memory System Page Table Only showing the first 6 entries (out of 256) VPN PPN Valid VPN PPN Valid A B 4 C 5 6 D 2D xd x2d 6 E 7 F D 3

13 Simple Memory System Cache 6 lines, 4-byte block size Physically addressed Direct mapped V[b] = V[x369] P[b] = P[xB69] = x5 CT CI CO 9 PPN PPO Idx Tag Valid B B B2 B3 Idx Tag Valid B B B2 B A D 2 B A 2D 93 5 DA 3B 3 36 B B D 8F 9 C 2 5 D F D D E B D3 7 6 C2 DF 3 F 4 4

14 Address Translation Example Idx Tag Virtual Address: x3d B D TLBT TLBI A 2D B B Valid B D 36 B 6D VPN 72 B2 23 8F B3 Idx Tag Valid B B A 9 F D D 6 VPO 6 3 E B 7 VPN 6 xf TLBI x3 C2 TLBT DF x3 3 TLB Hit? F Y 4 Page Fault? N PPN: xd C 2 B2 5 DA B3 89 3B 5 D3 Physical Address Translation Lookaside Buffer (TLB) CT CI CO Set Tag PPN Valid Tag PPN Valid Tag PPN Valid Tag PPN Set Tag PPN Valid Tag PPN Valid Tag PPN Valid Tag PPN D D D 2 4 A 3 2D 2 4 A 2 2 PPN 8 6 PPO D A CO 7 CI x5 CT 3 xd D Hit? Y A Byte: 34 x36 2 Valid Valid 6

15 Address Translation Example: TLB/Cache Miss Idx Tag Virtual Address: x D TLBT TLBI B A 2D B B 32 Valid 43 5 D 36 B 99 VPN B 6D 72 B2 23 8F B3 Idx Tag Valid B B A 9 F D D 6 VPO 6 3 E B 7 VPN 6 x TLBI C2 TLBT DF x 3 TLB Hit? F N 4 Page Fault? N PPN: x28 C 2 B2 5 DA B3 89 3B 5 D3 Physical Address CT CI CO PPN PPO CO CI x8 CT x28 Hit? N Byte: Mem Page table VPN PPN Valid 7

16 Virtual Memory Exam Question 5 4 TLBT TLBI x7e85 x x4c Exam: (solution) x7e85 = x x7e85 x9585 CI = x2 CT = xf 8

17 Today Simple memory system example Case study: Core i7/linux memory system Memory mapping 9

18 Intel Core i7 Memory System Processor package Core x4 Registers Instruction fetch MMU (addr translation) L d-cache 32 KB, 8-way L i-cache 32 KB, 8-way L d-tlb 64 entries, 4-way L i-tlb 28 entries, 4-way L2 unified cache 256 KB, 8-way L3 unified cache 8 MB, 6-way (shared by all cores) L2 unified TLB 52 entries, 4-way QuickPath interconnect GB/s each DDR3 Memory controller 3 x 64 GB/s 32 GB/s total (shared by all cores) To other cores To I/O bridge Main memory 2

19 End-to-end Core i7 Address Translation VPN TLB miss CPU 36 2 VPO 32 4 TLBT TLBI Virtual address (VA)... TLB hit 32/64 Result L hit L d-cache (64 sets, 8 lines/set)... L2, L3, and main memory L miss L TLB (6 sets, 4 entries/set) CR3 9 9 VPN VPN2 PTE 9 9 VPN3 VPN4 PTE PTE PTE 4 2 PPN PPO Physical address (PA) CT CI CO Page tables 2

20 Core i7 Level -3 Page Table Entries 63 XD 62 Unused Page table physical base address Unused G PS A CD WT U/S R/W P= Available for OS (page table location on disk) P= Each entry references a 4K child page table. Significant fields: P: Child page table present in physical memory () or not (). R/W: Read-only or read-write access access permission for all reachable pages. U/S: user or supervisor (kernel) mode access permission for all reachable pages. WT: Write-through or write-back cache policy for the child page table. A: Reference bit (set by MMU on reads and writes, cleared by software). PS: Page size either 4 KB or 4 MB (defined for Level PTEs only). Page table physical base address: 4 most significant bits of physical page table address (forces page tables to be 4KB aligned) XD: Disable or enable instruction fetches from all pages reachable from this PTE. 22

21 Core i7 Level 4 Page Table Entries 63 XD 62 Unused Page physical base address Unused G D A CD WT U/S R/W P= Available for OS (page location on disk) P= Each entry references a 4K child page. Significant fields: P: Child page is present in memory () or not () R/W: Read-only or read-write access permission for child page U/S: User or supervisor mode access WT: Write-through or write-back cache policy for this page A: Reference bit (set by MMU on reads and writes, cleared by software) D: Dirty bit (set by MMU on writes, cleared by software) Page physical base address: 4 most significant bits of physical page address (forces pages to be 4KB aligned) XD: Disable or enable instruction fetches from this page. 23

22 Core i7 Page Table Translation 9 VPN 9 VPN 2 9 VPN 3 VPN Virtual VPO address CR3 Physical address of L PT 4 / L PT Page global directory L PTE 4 / L2 PT Page upper directory L2 PTE 4 / L3 PT Page middle directory L3 PTE 4 / L4 PT Page table L4 PTE 2 / Offset into physical and virtual page 52 GB region per entry GB region per entry 2 MB region per entry 4 KB region per entry Physical address of page 4 / PPN 4 2 Physical PPO address 24

23 Cute Trick for Speeding Up L Access CT Tag Check Physical address (PA) CT CI CO PPN PPO Virtual address (VA) Address Translation VPN Observation Bits that determine CI identical in virtual and physical address Can index into cache while address translation taking place Generally we hit in TLB, so PPN bits (CT bits) available next Virtually indexed, physically tagged Cache carefully sized to make this possible VPO 36 2 No Change CI L Cache 25

24 Virtual Address Space of a Linux Process Different for each process Identical for each process %rsp Process-specific data structs (ptables, task and mm structs, kernel stack) Physical memory Kernel code and data User stack Kernel virtual memory brk x4 Memory mapped region for shared libraries Runtime heap (malloc) Uninitialized data (.bss) Initialized data (.data) Program text (.text) Process virtual memory 26

25 Linux Organizes VM as Collection of Areas Process virtual memory vm_area_struct task_struct mm_struct vm_end mm pgd vm_start vm_prot mmap vm_flags Shared libraries vm_next pgd: Page global directory address Points to L page table vm_prot: Read/write permissions for this area vm_flags Pages shared with other processes or private to this process vm_end vm_start vm_prot vm_flags vm_next vm_end vm_start vm_prot vm_flags vm_next Data Text Each process has own task_struct, etc 27

26 Linux Page Fault Handling vm_area_struct Process virtual memory vm_end vm_start vm_prot vm_flags vm_next vm_end vm_start vm_prot vm_flags shared libraries data read 3 read Segmentation fault: accessing a non-existing page Normal page fault vm_next vm_end vm_start vm_prot vm_flags vm_next text 2 write Protection exception: e.g., violating permission by writing to a read-only page (Linux reports as Segmentation fault) 28

27 Today Simple memory system example Case study: Core i7/linux memory system Memory mapping 29

28 Memory Mapping VM areas initialized by associating them with disk objects. Called memory mapping Area can be backed by (i.e., get its initial values from) : Regular file on disk (e.g., an executable object file) Initial page bytes come from a section of a file Anonymous file (e.g., nothing) First fault will allocate a physical page full of 's (demand-zero page) Once the page is written to (dirtied), it is like any other page Dirty pages are copied back and forth between memory and a special swap file. 3

29 Review: Memory Management & Protection Code and data can be isolated or shared among processes Virtual Address Space for Process : VP VP 2... Address translation PP 2 Physical Address Space (DRAM) N- Virtual Address Space for Process 2: VP VP 2... PP 6 PP 8... (e.g., read-only library code) N- M- 3

30 Sharing Revisited: Shared Objects Process virtual memory Physical memory Process 2 virtual memory Process maps the shared object (on disk). Shared object 32

31 Sharing Revisited: Shared Objects Process virtual memory Physical memory Process 2 virtual memory Process 2 maps the same shared object. Notice how the virtual addresses can be different. Shared object 33

32 Sharing Revisited: Private Copy-on-write (COW) Objects Process virtual memory Physical memory Process 2 virtual memory Private copy-on-write area Two processes mapping a private copy-on-write (COW) object Area flagged as private copy-onwrite PTEs in private areas are flagged as read-only Private copy-on-write object 34

33 Sharing Revisited: Private Copy-on-write (COW) Objects Process virtual memory Physical memory Copy-on-write Private copy-on-write object Process 2 virtual memory Write to private copy-on-write page Instruction writing to private page triggers protection fault. Handler creates new R/W page. Instruction restarts upon handler return. Copying deferred as long as possible! 35

34 The fork Function Revisited VM and memory mapping explain how fork provides private address space for each process. To create virtual address for new process: Create exact copies of current mm_struct, vm_area_struct, and page tables. Flag each page in both processes as read-only Flag each vm_area_struct in both processes as private COW On return, each process has exact copy of virtual memory. Subsequent writes create new pages using COW mechanism. 36

35 The execve Function Revisited User stack Private, demand-zero To load and run a new program a.out in the current process using execve: libc.so.data.text Memory mapped region for shared libraries Shared, file-backed Free vm_area_struct s and page tables for old areas a.out.data.text Runtime heap (via malloc) Uninitialized data (.bss) Initialized data (.data) Program text (.text) Private, demand-zero Private, demand-zero Private, file-backed Create vm_area_struct s and page tables for new areas Programs and initialized data backed by object files..bss and stack backed by anonymous files. Set PC to entry point in.text Linux will fault in code and data pages as needed. 37

36 User-Level Memory Mapping void *mmap(void *start, int len, int prot, int flags, int fd, int offset) Map len bytes starting at offset offset of the file specified by file description fd, preferably at address start start: may be for pick an address prot: PROT_READ, PROT_WRITE, PROT_EXEC,... flags: MAP_ANON, MAP_PRIVATE, MAP_SHARED,... Return a pointer to start of mapped area (may not be start) 38

37 User-Level Memory Mapping void *mmap(void *start, int len, int prot, int flags, int fd, int offset) len bytes len bytes start (or address chosen by kernel) offset (bytes) Disk file specified by file descriptor fd Process virtual memory 39

38 Example: Using mmap to Copy Files Copying a file to stdout without transferring data to user space #include "csapp.h" void mmapcopy(int fd, int size) { } /* Ptr to memory mapped area */ char *bufp; bufp = mmap(null, size, PROT_READ, MAP_PRIVATE, fd, ); write(, bufp, size); return; mmapcopy.c /* mmapcopy driver */ int main(int argc, char **argv) { struct stat stat; int fd; } /* Check for required cmd line arg */ if (argc!= 2) { printf("usage: %s <filename>\n", argv[]); exit(); } /* Copy input file to stdout */ fd = Open(argv[], O_RDONLY, ); fstat(fd, &stat); mmapcopy(fd, stat.st_size); exit(); mmapcopy.c 4

39 Today: Virtual Memory Systems Simple memory system example Case study: Core i7/linux memory system Memory mapping Next Lecture Dynamic Memory Allocation 4