A graphical method of simplifying logic

Size: px
Start display at page:

Download "A graphical method of simplifying logic"

Transcription

1 4-5 Karnaugh Map Method A graphical method of simplifying logic equations or truth tables. Also called a K map. Theoretically can be used for any number of input variables, but practically limited to 5 or 6 variables Karnaugh Map Method The truth table values are placed in the K map as shown in figure Adjacent K map square differ in only one variable both horizontally and vertically. The pattern from top to bottom and left to right must be in the form AB, AB, AB, AB A SOP expression can be obtained by ORing all squares that contain a

2 Karnaugh maps and truth tables for (a) two, (b) three, and (c) four variables. The K map shows the output value for each input combination same as truth table. The K map squares are labeled so that horizontally adjacent squares differ only in one variable. Think of the table as top being wrapped around to touch the bottom, same for left and right columns. Top-to-bottom labeling: AB, AB, AB, AB, same for left to-right. SoP by ORing squares that has a Karnaugh Map Method - Looping Looping adjacent groups of 2, 4, or 8 1s will result in further simplification. When the largest possible groups have been looped, only the common terms are placed in the final expression. Looping may also be wrapped between top, bottom, and sides

3 Examples of looping pairs of adjacent two 1s (pairs). Looping: combining the squares that contain 1s to simplify the circuit. Looping Groups of Two: Figure (a) two terms has A in both normal and complement form while B & C remain unchanged, X = BC. Same principle applies to figure (b), ( c), and (d). Looping a pair of adjacent 1s in a K map eliminates the variable that appears in complemented and un-complemented form. 113 Examples of looping groups of fours 1s (quads). Looping Groups of Four: a group of four squares adjacent containing 1s. Figure (a) four terms has 1 adjacent vertically, when grouped, the resultant contains only the variable that do not change, in this case x=c. Same principle applies to figure (b), ( c), (d), and (e). Looping a quad of adjacent 1s in a K map eliminates the two variables that appear in both complemented and un-complemented form

4 Examples of looping groups of eight 1s (octets). Looping Groups of eight: a group of eight squares adjacent containing 1s. Figure (a) eight terms has 1, when grouped, the resultant contains only the variable that do not change, in this case x=b. Same principle applies to figure (b), ( c), (d), and (e). Looping an octet of adjacent 1s in a K map eliminates the three variables that appear in both complemented and un-complemented form Karnaugh Map Method Complete K map simplification process When a variable appears in both complemented and un- complemented form within a loop, that variable is eliminated from the expression. Variables that are the same for all squares of the loop must appear in the final expression. A larger loop of 1s eliminates more variables, loop of two eliminates 1, loop of 4 eliminates 2, loop of 8 eliminates 3 variables. K-Map process to simplify a Boolean expression: Construct the K map, place 1s as indicated in the truth table. Loop 1s that are not adjacent to any other 1s. Loop 1s that are in pairs, only adjacent to only one other 1. Loop 1s in octets even if they have already been looped. Loop quads that have one or more 1s not already looped. Loop any pairs necessary to include 1 st not already looped. Form the OR sum of terms generated by each loop

5 Examples 4-10 to 4-12 Assuming K map was obtained from problem truth table Figure (a) Square 4, group of 11, 15, group of 6,7,10,11. Figure (b): (3,7), (5,6,9,10), (5,6,7,8) Figure (c): (9,10), (2,6), (7,8), (11,15) 117 The same K map with two equally good solutions. Both expressions are of the same complexity, so neither is better than the other 118 5

Combinational Logic Circuits

Combinational Logic Circuits Chapter 3 Combinational Logic Circuits 12 Hours 24 Marks 3.1 Standard representation for logical functions Boolean expressions / logic expressions / logical functions are expressed in terms of logical

More information

A B AB CD Objectives:

A B AB CD Objectives: Objectives:. Four variables maps. 2. Simplification using prime implicants. 3. "on t care" conditions. 4. Summary.. Four variables Karnaugh maps Minterms A A m m m3 m2 A B C m4 C A B C m2 m8 C C m5 C m3

More information

Module -7. Karnaugh Maps

Module -7. Karnaugh Maps 1 Module -7 Karnaugh Maps 1. Introduction 2. Canonical and Standard forms 2.1 Minterms 2.2 Maxterms 2.3 Canonical Sum of Product or Sum-of-Minterms (SOM) 2.4 Canonical product of sum or Product-of-Maxterms(POM)

More information

Chapter 2. Boolean Expressions:

Chapter 2. Boolean Expressions: Chapter 2 Boolean Expressions: A Boolean expression or a function is an expression which consists of binary variables joined by the Boolean connectives AND and OR along with NOT operation. Any Boolean

More information

Points Addressed in this Lecture. Standard form of Boolean Expressions. Lecture 4: Logic Simplication & Karnaugh Map

Points Addressed in this Lecture. Standard form of Boolean Expressions. Lecture 4: Logic Simplication & Karnaugh Map Points Addressed in this Lecture Lecture 4: Logic Simplication & Karnaugh Map Professor Peter Cheung Department of EEE, Imperial College London Standard form of Boolean Expressions Sum-of-Products (SOP),

More information

To write Boolean functions in their standard Min and Max terms format. To simplify Boolean expressions using Karnaugh Map.

To write Boolean functions in their standard Min and Max terms format. To simplify Boolean expressions using Karnaugh Map. 3.1 Objectives To write Boolean functions in their standard Min and Max terms format. To simplify Boolean expressions using. 3.2 Sum of Products & Product of Sums Any Boolean expression can be simplified

More information

3.3 Hardware Karnaugh Maps

3.3 Hardware Karnaugh Maps 2P P = P = 3.3 Hardware UIntroduction A Karnaugh map is a graphical method of Boolean logic expression reduction. A Boolean expression can be reduced to its simplest form through the 4 simple steps involved

More information

Chapter 2 Combinational Logic Circuits

Chapter 2 Combinational Logic Circuits Logic and Computer Design Fundamentals Chapter 2 Combinational Logic Circuits Part 2 Circuit Optimization Overview Part Gate Circuits and Boolean Equations Binary Logic and Gates Boolean Algebra Standard

More information

CHAPTER-2 STRUCTURE OF BOOLEAN FUNCTION USING GATES, K-Map and Quine-McCluskey

CHAPTER-2 STRUCTURE OF BOOLEAN FUNCTION USING GATES, K-Map and Quine-McCluskey CHAPTER-2 STRUCTURE OF BOOLEAN FUNCTION USING GATES, K-Map and Quine-McCluskey 2. Introduction Logic gates are connected together to produce a specified output for certain specified combinations of input

More information

ENGIN 112 Intro to Electrical and Computer Engineering

ENGIN 112 Intro to Electrical and Computer Engineering ENGIN 2 Intro to Electrical and Computer Engineering Lecture 8 Minimization with Karnaugh Maps Overview K-maps: an alternate approach to representing oolean functions K-map representation can be used to

More information

Boolean Analysis of Logic Circuits

Boolean Analysis of Logic Circuits Course: B.Sc. Applied Physical Science (Computer Science) Year & Sem.: IInd Year, Sem - IIIrd Subject: Computer Science Paper No.: IX Paper Title: Computer System Architecture Lecture No.: 7 Lecture Title:

More information

Unit-IV Boolean Algebra

Unit-IV Boolean Algebra Unit-IV Boolean Algebra Boolean Algebra Chapter: 08 Truth table: Truth table is a table, which represents all the possible values of logical variables/statements along with all the possible results of

More information

DKT 122/3 DIGITAL SYSTEM 1

DKT 122/3 DIGITAL SYSTEM 1 Company LOGO DKT 122/3 DIGITAL SYSTEM 1 BOOLEAN ALGEBRA (PART 2) Boolean Algebra Contents Boolean Operations & Expression Laws & Rules of Boolean algebra DeMorgan s Theorems Boolean analysis of logic circuits

More information

Date Performed: Marks Obtained: /10. Group Members (ID):. Experiment # 04. Boolean Expression Simplification and Implementation

Date Performed: Marks Obtained: /10. Group Members (ID):. Experiment # 04. Boolean Expression Simplification and Implementation Name: Instructor: Engr. Date Performed: Marks Obtained: /10 Group Members (ID):. Checked By: Date: Experiment # 04 Boolean Expression Simplification and Implementation OBJECTIVES: To understand the utilization

More information

Simplification of Boolean Functions

Simplification of Boolean Functions COM111 Introduction to Computer Engineering (Fall 2006-2007) NOTES 5 -- page 1 of 5 Introduction Simplification of Boolean Functions You already know one method for simplifying Boolean expressions: Boolean

More information

EEE130 Digital Electronics I Lecture #4_1

EEE130 Digital Electronics I Lecture #4_1 EEE130 Digital Electronics I Lecture #4_1 - Boolean Algebra and Logic Simplification - By Dr. Shahrel A. Suandi 4-6 Standard Forms of Boolean Expressions There are two standard forms: Sum-of-products form

More information

Summary. Boolean Addition

Summary. Boolean Addition Summary Boolean Addition In Boolean algebra, a variable is a symbol used to represent an action, a condition, or data. A single variable can only have a value of or 0. The complement represents the inverse

More information

Experiment 3: Logic Simplification

Experiment 3: Logic Simplification Module: Logic Design Name:... University no:.. Group no:. Lab Partner Name: Mr. Mohamed El-Saied Experiment : Logic Simplification Objective: How to implement and verify the operation of the logical functions

More information

Digital Logic Design (3)

Digital Logic Design (3) Digital Logic Design (3) ENGG1015 1 st Semester, 2010 Dr. Kenneth Wong Dr. Hayden So Department of Electrical and Electronic Engineering Last lecture ll logic functions can be represented as (1) truth

More information

4 KARNAUGH MAP MINIMIZATION

4 KARNAUGH MAP MINIMIZATION 4 KARNAUGH MAP MINIMIZATION A Karnaugh map provides a systematic method for simplifying Boolean expressions and, if properly used, will produce the simplest SOP or POS expression possible, known as the

More information

Karnaugh Map (K-Map) Karnaugh Map. Karnaugh Map Examples. Ch. 2.4 Ch. 2.5 Simplification using K-map

Karnaugh Map (K-Map) Karnaugh Map. Karnaugh Map Examples. Ch. 2.4 Ch. 2.5 Simplification using K-map Karnaugh Map (K-Map) Ch. 2.4 Ch. 2.5 Simplification using K-map A graphical map method to simplify Boolean function up to 6 variables A diagram made up of squares Each square represents one minterm (or

More information

LSN 4 Boolean Algebra & Logic Simplification. ECT 224 Digital Computer Fundamentals. Department of Engineering Technology

LSN 4 Boolean Algebra & Logic Simplification. ECT 224 Digital Computer Fundamentals. Department of Engineering Technology LSN 4 Boolean Algebra & Logic Simplification Department of Engineering Technology LSN 4 Key Terms Variable: a symbol used to represent a logic quantity Compliment: the inverse of a variable Literal: a

More information

Experiment 4 Boolean Functions Implementation

Experiment 4 Boolean Functions Implementation Experiment 4 Boolean Functions Implementation Introduction: Generally you will find that the basic logic functions AND, OR, NAND, NOR, and NOT are not sufficient to implement complex digital logic functions.

More information

Chapter 3. Gate-Level Minimization. Outlines

Chapter 3. Gate-Level Minimization. Outlines Chapter 3 Gate-Level Minimization Introduction The Map Method Four-Variable Map Five-Variable Map Outlines Product of Sums Simplification Don t-care Conditions NAND and NOR Implementation Other Two-Level

More information

Combinational Logic Circuits Part III -Theoretical Foundations

Combinational Logic Circuits Part III -Theoretical Foundations Combinational Logic Circuits Part III -Theoretical Foundations Overview Simplifying Boolean Functions Algebraic Manipulation Karnaugh Map Manipulation (simplifying functions of 2, 3, 4 variables) Systematic

More information

Simplification of Boolean Functions

Simplification of Boolean Functions Simplification of Boolean Functions Contents: Why simplification? The Map Method Two, Three, Four and Five variable Maps. Simplification of two, three, four and five variable Boolean function by Map method.

More information

SEE1223: Digital Electronics

SEE1223: Digital Electronics SEE223: Digital Electronics 3 Combinational Logic Design Zulkifil Md Yusof Dept. of Microelectronics and Computer Engineering The aculty of Electrical Engineering Universiti Teknologi Malaysia Karnaugh

More information

Review: Standard forms of expressions

Review: Standard forms of expressions Karnaugh maps Last time we saw applications of Boolean logic to circuit design. The basic Boolean operations are AND, OR and NOT. These operations can be combined to form complex expressions, which can

More information

Combinational Circuits Digital Logic (Materials taken primarily from:

Combinational Circuits Digital Logic (Materials taken primarily from: Combinational Circuits Digital Logic (Materials taken primarily from: http://www.facstaff.bucknell.edu/mastascu/elessonshtml/eeindex.html http://www.cs.princeton.edu/~cos126 ) Digital Systems What is a

More information

Ch. 5 : Boolean Algebra &

Ch. 5 : Boolean Algebra & Ch. 5 : Boolean Algebra & Reduction elektronik@fisika.ui.ac.id Objectives Should able to: Write Boolean equations for combinational logic applications. Utilize Boolean algebra laws and rules for simplifying

More information

X Y Z F=X+Y+Z

X Y Z F=X+Y+Z This circuit is used to obtain the compliment of a value. If X = 0, then X = 1. The truth table for NOT gate is : X X 0 1 1 0 2. OR gate : The OR gate has two or more input signals but only one output

More information

Bawar Abid Abdalla. Assistant Lecturer Software Engineering Department Koya University

Bawar Abid Abdalla. Assistant Lecturer Software Engineering Department Koya University Logic Design First Stage Lecture No.6 Boolean Algebra Bawar Abid Abdalla Assistant Lecturer Software Engineering Department Koya University Outlines Boolean Operations Laws of Boolean Algebra Rules of

More information

UNIT-4 BOOLEAN LOGIC. NOT Operator Operates on single variable. It gives the complement value of variable.

UNIT-4 BOOLEAN LOGIC. NOT Operator Operates on single variable. It gives the complement value of variable. UNIT-4 BOOLEAN LOGIC Boolean algebra is an algebra that deals with Boolean values((true and FALSE). Everyday we have to make logic decisions: Should I carry the book or not?, Should I watch TV or not?

More information

Assignment (3-6) Boolean Algebra and Logic Simplification - General Questions

Assignment (3-6) Boolean Algebra and Logic Simplification - General Questions Assignment (3-6) Boolean Algebra and Logic Simplification - General Questions 1. Convert the following SOP expression to an equivalent POS expression. 2. Determine the values of A, B, C, and D that make

More information

Gate Level Minimization

Gate Level Minimization Gate Level Minimization By Dr. M. Hebaishy Digital Logic Design Ch- Simplifying Boolean Equations Example : Y = AB + AB Example 2: = B (A + A) T8 = B () T5 = B T Y = A(AB + ABC) = A (AB ( + C ) ) T8 =

More information

Chapter 3. Boolean Algebra and Digital Logic

Chapter 3. Boolean Algebra and Digital Logic Chapter 3 Boolean Algebra and Digital Logic Chapter 3 Objectives Understand the relationship between Boolean logic and digital computer circuits. Learn how to design simple logic circuits. Understand how

More information

Chapter 6. Logic Design Optimization Chapter 6

Chapter 6. Logic Design Optimization Chapter 6 Chapter 6 Logic Design Optimization Chapter 6 Optimization The second part of our design process. Optimization criteria: Performance Size Power Two-level Optimization Manipulating a function until it is

More information

Digital Logic Lecture 7 Gate Level Minimization

Digital Logic Lecture 7 Gate Level Minimization Digital Logic Lecture 7 Gate Level Minimization By Ghada Al-Mashaqbeh The Hashemite University Computer Engineering Department Outline Introduction. K-map principles. Simplification using K-maps. Don t-care

More information

Gate Level Minimization Map Method

Gate Level Minimization Map Method Gate Level Minimization Map Method Complexity of hardware implementation is directly related to the complexity of the algebraic expression Truth table representation of a function is unique Algebraically

More information

Chapter 2 Combinational Logic Circuits

Chapter 2 Combinational Logic Circuits Logic and Computer Design Fundamentals Chapter 2 Combinational Logic Circuits Part 2 Circuit Optimization Charles Kime & Thomas Kaminski 2008 Pearson Education, Inc. (Hyperlinks are active in View Show

More information

Chapter 2 Combinational

Chapter 2 Combinational Computer Engineering 1 (ECE290) Chapter 2 Combinational Logic Circuits Part 2 Circuit Optimization HOANG Trang 2008 Pearson Education, Inc. Overview Part 1 Gate Circuits and Boolean Equations Binary Logic

More information

IT 201 Digital System Design Module II Notes

IT 201 Digital System Design Module II Notes IT 201 Digital System Design Module II Notes BOOLEAN OPERATIONS AND EXPRESSIONS Variable, complement, and literal are terms used in Boolean algebra. A variable is a symbol used to represent a logical quantity.

More information

BOOLEAN ALGEBRA. Logic circuit: 1. From logic circuit to Boolean expression. Derive the Boolean expression for the following circuits.

BOOLEAN ALGEBRA. Logic circuit: 1. From logic circuit to Boolean expression. Derive the Boolean expression for the following circuits. COURSE / CODE DIGITAL SYSTEMS FUNDAMENTAL (ECE 421) DIGITAL ELECTRONICS FUNDAMENTAL (ECE 422) BOOLEAN ALGEBRA Boolean Logic Boolean logic is a complete system for logical operations. It is used in countless

More information

CprE 281: Digital Logic

CprE 281: Digital Logic CprE 28: Digital Logic Instructor: Alexander Stoytchev http://www.ece.iastate.edu/~alexs/classes/ Minimization CprE 28: Digital Logic Iowa State University, Ames, IA Copyright Alexander Stoytchev Administrative

More information

Specifying logic functions

Specifying logic functions CSE4: Components and Design Techniques for Digital Systems Specifying logic functions Instructor: Mohsen Imani Slides from: Prof.Tajana Simunic and Dr.Pietro Mercati We have seen various concepts: Last

More information

MODULE 5 - COMBINATIONAL LOGIC

MODULE 5 - COMBINATIONAL LOGIC Introduction to Digital Electronics Module 5: Combinational Logic 1 MODULE 5 - COMBINATIONAL LOGIC OVERVIEW: For any given combination of input binary bits or variables, the logic will have a specific

More information

ENGIN 112. Intro to Electrical and Computer Engineering

ENGIN 112. Intro to Electrical and Computer Engineering ENIN 2 Intro to Electrical and Computer Engineering Lecture 6 More Boolean Algebra ENIN2 L6: More Boolean Algebra September 5, 23 A B Overview Epressing Boolean functions Relationships between algebraic

More information

Boolean Function Simplification

Boolean Function Simplification Universit of Wisconsin - Madison ECE/Comp Sci 352 Digital Sstems Fundamentals Charles R. Kime Section Fall 200 Chapter 2 Combinational Logic Circuits Part 5 Charles Kime & Thomas Kaminski Boolean Function

More information

2.6 BOOLEAN FUNCTIONS

2.6 BOOLEAN FUNCTIONS 2.6 BOOLEAN FUNCTIONS Binary variables have two values, either 0 or 1. A Boolean function is an expression formed with binary variables, the two binary operators AND and OR, one unary operator NOT, parentheses

More information

S1 Teknik Telekomunikasi Fakultas Teknik Elektro FEH2H3 2016/2017

S1 Teknik Telekomunikasi Fakultas Teknik Elektro FEH2H3 2016/2017 S1 Teknik Telekomunikasi Fakultas Teknik Elektro FEH2H3 2016/2017 Karnaugh Map Karnaugh maps Last time we saw applications of Boolean logic to circuit design. The basic Boolean operations are AND, OR and

More information

Combinational Digital Design. Laboratory Manual. Experiment #3. Boolean Algebra Continued

Combinational Digital Design. Laboratory Manual. Experiment #3. Boolean Algebra Continued The Islamic University of Gaza Engineering Faculty Department of Computer Engineering Fall 2017 ECOM 2013 Khaleel I. Shaheen Combinational Digital Design Laboratory Manual Experiment #3 Boolean Algebra

More information

CSCI 220: Computer Architecture I Instructor: Pranava K. Jha. Simplification of Boolean Functions using a Karnaugh Map

CSCI 220: Computer Architecture I Instructor: Pranava K. Jha. Simplification of Boolean Functions using a Karnaugh Map CSCI 22: Computer Architecture I Instructor: Pranava K. Jha Simplification of Boolean Functions using a Karnaugh Map Q.. Plot the following Boolean function on a Karnaugh map: f(a, b, c, d) = m(, 2, 4,

More information

CS470: Computer Architecture. AMD Quad Core

CS470: Computer Architecture. AMD Quad Core CS470: Computer Architecture Yashwant K. Malaiya, Professor malaiya@cs.colostate.edu AMD Quad Core 1 Architecture Layers Building blocks Gates, flip-flops Functional bocks: Combinational, Sequential Instruction

More information

Literal Cost F = BD + A B C + A C D F = BD + A B C + A BD + AB C F = (A + B)(A + D)(B + C + D )( B + C + D) L = 10

Literal Cost F = BD + A B C + A C D F = BD + A B C + A BD + AB C F = (A + B)(A + D)(B + C + D )( B + C + D) L = 10 Circuit Optimization Goal: To obtain the simplest implementation for a given function Optimization is a more formal approach to simplification that is performed using a specific procedure or algorithm

More information

Outcomes. Unit 9. Logic Function Synthesis KARNAUGH MAPS. Implementing Combinational Functions with Karnaugh Maps

Outcomes. Unit 9. Logic Function Synthesis KARNAUGH MAPS. Implementing Combinational Functions with Karnaugh Maps .. Outcomes Unit I can use Karnaugh maps to synthesize combinational functions with several outputs I can determine the appropriate size and contents of a memory to implement any logic function (i.e. truth

More information

Chapter 3 Simplification of Boolean functions

Chapter 3 Simplification of Boolean functions 3.1 Introduction Chapter 3 Simplification of Boolean functions In this chapter, we are going to discuss several methods for simplifying the Boolean function. What is the need for simplifying the Boolean

More information

Homework. Update on website issue Reading: Chapter 7 Homework: All exercises at end of Chapter 7 Due 9/26

Homework. Update on website issue Reading: Chapter 7 Homework: All exercises at end of Chapter 7 Due 9/26 Homework Update on website issue Reading: hapter 7 Homework: All exercises at end of hapter 7 Due 9/26 opyright c 22 28 UMaine omputer Science Department / 2 OS 4: Foundations of omputer Science Karnaugh

More information

UNIT II. Circuit minimization

UNIT II. Circuit minimization UNIT II Circuit minimization The complexity of the digital logic gates that implement a Boolean function is directly related to the complexity of the algebraic expression from which the function is implemented.

More information

Chapter 2 Part 5 Combinational Logic Circuits

Chapter 2 Part 5 Combinational Logic Circuits Universit of Wisconsin - Madison ECE/Comp Sci 352 Digital Sstems Fundamentals Kewal K. Saluja and Yu Hen Hu Spring 2002 Chapter 2 Part 5 Combinational Logic Circuits Originals b: Charles R. Kime and Tom

More information

SYNERGY INSTITUTE OF ENGINEERING & TECHNOLOGY,DHENKANAL LECTURE NOTES ON DIGITAL ELECTRONICS CIRCUIT(SUBJECT CODE:PCEC4202)

SYNERGY INSTITUTE OF ENGINEERING & TECHNOLOGY,DHENKANAL LECTURE NOTES ON DIGITAL ELECTRONICS CIRCUIT(SUBJECT CODE:PCEC4202) Lecture No:5 Boolean Expressions and Definitions Boolean Algebra Boolean Algebra is used to analyze and simplify the digital (logic) circuits. It uses only the binary numbers i.e. 0 and 1. It is also called

More information

Slide Set 5. for ENEL 353 Fall Steve Norman, PhD, PEng. Electrical & Computer Engineering Schulich School of Engineering University of Calgary

Slide Set 5. for ENEL 353 Fall Steve Norman, PhD, PEng. Electrical & Computer Engineering Schulich School of Engineering University of Calgary Slide Set 5 for ENEL 353 Fall 207 Steve Norman, PhD, PEng Electrical & Computer Engineering Schulich School of Engineering University of Calgary Fall Term, 207 SN s ENEL 353 Fall 207 Slide Set 5 slide

More information

University of Technology

University of Technology University of Technology Lecturer: Dr. Sinan Majid Course Title: microprocessors 4 th year Lecture 5 & 6 Minimization with Karnaugh Maps Karnaugh maps lternate way of representing oolean function ll rows

More information

Gate-Level Minimization. BME208 Logic Circuits Yalçın İŞLER

Gate-Level Minimization. BME208 Logic Circuits Yalçın İŞLER Gate-Level Minimization BME28 Logic Circuits Yalçın İŞLER islerya@yahoo.com http://me.islerya.com Complexity of Digital Circuits Directly related to the complexity of the algebraic expression we use to

More information

Combinational Logic Circuits

Combinational Logic Circuits Chapter 2 Combinational Logic Circuits J.J. Shann (Slightly trimmed by C.P. Chung) Chapter Overview 2-1 Binary Logic and Gates 2-2 Boolean Algebra 2-3 Standard Forms 2-4 Two-Level Circuit Optimization

More information

Digital Logic Design (CEN-120) (3+1)

Digital Logic Design (CEN-120) (3+1) Digital Logic Design (CEN-120) (3+1) ASSISTANT PROFESSOR Engr. Syed Rizwan Ali, MS(CAAD)UK, PDG(CS)UK, PGD(PM)IR, BS(CE)PK HEC Certified Master Trainer (MT-FPDP) PEC Certified Professional Engineer (COM/2531)

More information

Philadelphia University Faculty of Information Technology Department of Computer Science. Computer Logic Design. By Dareen Hamoudeh.

Philadelphia University Faculty of Information Technology Department of Computer Science. Computer Logic Design. By Dareen Hamoudeh. Philadelphia University Faculty of Information Technology Department of Computer Science Computer Logic Design By Dareen Hamoudeh Dareen Hamoudeh 1 Canonical Forms (Standard Forms of Expression) Minterms

More information

Bawar Abid Abdalla. Assistant Lecturer Software Engineering Department Koya University

Bawar Abid Abdalla. Assistant Lecturer Software Engineering Department Koya University Logic Design First Stage Lecture No.5 Boolean Algebra Bawar Abid Abdalla Assistant Lecturer Software Engineering Department Koya University Boolean Operations Laws of Boolean Algebra Rules of Boolean Algebra

More information

5. Minimizing Circuits

5. Minimizing Circuits 5. MINIMIZING CIRCUITS 46 5. Minimizing Circuits 5.. Minimizing Circuits. A circuit is minimized if it is a sum-of-products that uses the least number of products of literals and each product contains

More information

Switching Theory And Logic Design UNIT-II GATE LEVEL MINIMIZATION

Switching Theory And Logic Design UNIT-II GATE LEVEL MINIMIZATION Switching Theory And Logic Design UNIT-II GATE LEVEL MINIMIZATION Two-variable k-map: A two-variable k-map can have 2 2 =4 possible combinations of the input variables A and B. Each of these combinations,

More information

Simplification of two-level combinational logic

Simplification of two-level combinational logic ombinational logic optimization! lternate representations of oolean functions " cubes " karnaugh maps! Simplification " two-level simplification " exploiting don t cares " algorithm for simplification

More information

Learning Objectives: Topic Karnaugh Maps. At the end of this topic you will be able to;

Learning Objectives: Topic Karnaugh Maps. At the end of this topic you will be able to; Topic.2.3 Karnaugh Maps Learning Objectives: t the end of this topic you will be able to; Draw a Karnaugh map for a logic system with up to four inputs and use it to minimise the number of gates required;

More information

Computer Engineering Chapter 3 Boolean Algebra

Computer Engineering Chapter 3 Boolean Algebra Computer Engineering Chapter 3 Boolean Algebra Hiroaki Kobayashi 5/30/2011 Ver. 06102011 5/30/2011 Computer Engineering 1 Agenda in Chapter 3 What is Boolean Algebra Basic Boolean/Logical Operations (Operators)

More information

Combinational Logic Worksheet

Combinational Logic Worksheet Combinational Logic Worksheet Concept Inventory: Truth tables sum-of-products equations implementation using NOT/AND/OR Demorgan s Law, implementation using NAND/NOR Simplification, truth tables w/ don

More information

Lecture 5. Chapter 2: Sections 4-7

Lecture 5. Chapter 2: Sections 4-7 Lecture 5 Chapter 2: Sections 4-7 Outline Boolean Functions What are Canonical Forms? Minterms and Maxterms Index Representation of Minterms and Maxterms Sum-of-Minterm (SOM) Representations Product-of-Maxterm

More information

Chapter 3 Boolean Algebra

Chapter 3 Boolean Algebra Computer Engineering Chapter 3 Boolean Algebra Hiroaki Kobayashi 5/19/2008 5/19/2008 1 Agenda in Chapter 3 What is Boolean Algebra Basic Boolean/Logical Operations (Operators) Truth Table to Describe Logical

More information

9/10/2016. ECE 120: Introduction to Computing. The Domain of a Boolean Function is a Hypercube. List All Implicants for One Variable A

9/10/2016. ECE 120: Introduction to Computing. The Domain of a Boolean Function is a Hypercube. List All Implicants for One Variable A University of Illinois at Urbana-Champaign Dept. of Electrical and Computer Engineering ECE 120: Introduction to Computing To Simplify, Write Function as a Sum of Prime Implicants One way to simplify a

More information

Gate-Level Minimization

Gate-Level Minimization MEC520 디지털공학 Gate-Level Minimization Jee-Hwan Ryu School of Mechanical Engineering Gate-Level Minimization-The Map Method Truth table is unique Many different algebraic expression Boolean expressions may

More information

Programmable Logic Devices. Programmable Read Only Memory (PROM) Example

Programmable Logic Devices. Programmable Read Only Memory (PROM) Example Programmable Logic Devices Programmable Logic Devices (PLDs) are the integrated circuits. They contain an array of AND gates & another array of OR gates. There are three kinds of PLDs based on the type

More information

1. Boolean algebra. [6] 2. Constructing a circuit. [4] 3. Number representation [4] 4. Adders [4] 5. ALU [2] 6. Software [4]

1. Boolean algebra. [6] 2. Constructing a circuit. [4] 3. Number representation [4] 4. Adders [4] 5. ALU [2] 6. Software [4] Family Name:.......................... Other Names:.......................... ID Number:.......................... ENGR101: Test 4 May 2009 Instructions Time allowed: 45 minutes. There are 45 marks in

More information

Synthesis of combinational logic

Synthesis of combinational logic Page 1 of 14 Synthesis of combinational logic indicates problems that have been selected for discussion in section, time permitting. Problem 1. A certain function F has the following truth table: A B C

More information

Get Free notes at Module-I One s Complement: Complement all the bits.i.e. makes all 1s as 0s and all 0s as 1s Two s Complement: One s complement+1 SIGNED BINARY NUMBERS Positive integers (including zero)

More information

PART 1. Simplification Using Boolean Algebra

PART 1. Simplification Using Boolean Algebra Name EET 1131 Lab #5 Logic Simplification Techniques OBJECTIVES: Upon completing this lab, you ll be able to: 1) Obtain the experimental truth table of a logic circuit. 2) Use Boolean algebra to simplify

More information

Properties of a Function s Graph

Properties of a Function s Graph Section 3.2 Properties of a Function s Graph Objective 1: Determining the Intercepts of a Function An intercept of a function is a point on the graph of a function where the graph either crosses or touches

More information

QUESTION BANK FOR TEST

QUESTION BANK FOR TEST CSCI 2121 Computer Organization and Assembly Language PRACTICE QUESTION BANK FOR TEST 1 Note: This represents a sample set. Please study all the topics from the lecture notes. Question 1. Multiple Choice

More information

Programmable Logic Devices

Programmable Logic Devices Programmable Logic Devices Programmable Logic Devices Fig. (1) General structure of PLDs Programmable Logic Device (PLD): is an integrated circuit with internal logic gates and/or connections that can

More information

User s Manual. Ronwaldo A. Collado Diosdado Y. Tejoso Jr. CMSC 130 Logistic Design and Digital Computer Circuits Second Semester, A. Y.

User s Manual. Ronwaldo A. Collado Diosdado Y. Tejoso Jr. CMSC 130 Logistic Design and Digital Computer Circuits Second Semester, A. Y. The Quine-McCluskey Method, also known as the Tabulation Method is a specific step-by-step method that is ensured to generate a simplified standard-form expression for a function. Ronwaldo A. Collado Diosdado

More information

Gate-Level Minimization

Gate-Level Minimization Gate-Level Minimization ( 范倫達 ), Ph. D. Department of Computer Science National Chiao Tung University Taiwan, R.O.C. Fall, 2011 ldvan@cs.nctu.edu.tw http://www.cs.nctu.edu.tw/~ldvan/ Outlines The Map Method

More information

ELCT201: DIGITAL LOGIC DESIGN

ELCT201: DIGITAL LOGIC DESIGN ELCT201: DIGITAL LOGIC DESIGN Dr. Eng. Haitham Omran, haitham.omran@guc.edu.eg Dr. Eng. Wassim Alexan, wassim.joseph@guc.edu.eg Lecture 3 Following the slides of Dr. Ahmed H. Madian محرم 1439 ه Winter

More information

Synthesis 1. 1 Figures in this chapter taken from S. H. Gerez, Algorithms for VLSI Design Automation, Wiley, Typeset by FoilTEX 1

Synthesis 1. 1 Figures in this chapter taken from S. H. Gerez, Algorithms for VLSI Design Automation, Wiley, Typeset by FoilTEX 1 Synthesis 1 1 Figures in this chapter taken from S. H. Gerez, Algorithms for VLSI Design Automation, Wiley, 1998. Typeset by FoilTEX 1 Introduction Logic synthesis is automatic generation of circuitry

More information

ELCT201: DIGITAL LOGIC DESIGN

ELCT201: DIGITAL LOGIC DESIGN ELCT201: DIGITAL LOGIC DESIGN Dr. Eng. Haitham Omran, haitham.omran@guc.edu.eg Dr. Eng. Wassim Alexan, wassim.joseph@guc.edu.eg Lecture 3 Following the slides of Dr. Ahmed H. Madian ذو الحجة 1438 ه Winter

More information

Definitions. 03 Logic networks Boolean algebra. Boolean set: B 0,

Definitions. 03 Logic networks Boolean algebra. Boolean set: B 0, 3. Boolean algebra 3 Logic networks 3. Boolean algebra Definitions Boolean functions Properties Canonical forms Synthesis and minimization alessandro bogliolo isti information science and technology institute

More information

Circuit analysis summary

Circuit analysis summary Boolean Algebra Circuit analysis summary After finding the circuit inputs and outputs, you can come up with either an expression or a truth table to describe what the circuit does. You can easily convert

More information

Section 001. Read this before starting!

Section 001. Read this before starting! Points missed: Student's Name: Total score: / points East Tennessee State University Department of Computer and Information Sciences CSCI 25 (Tarnoff) Computer Organization TEST 2 for Fall Semester, 25

More information

Menu. Algebraic Simplification - Boolean Algebra EEL3701 EEL3701. MSOP, MPOS, Simplification

Menu. Algebraic Simplification - Boolean Algebra EEL3701 EEL3701. MSOP, MPOS, Simplification Menu Minterms & Maxterms SOP & POS MSOP & MPOS Simplification using the theorems/laws/axioms Look into my... 1 Definitions (Review) Algebraic Simplification - Boolean Algebra Minterms (written as m i ):

More information

CMPE223/CMSE222 Digital Logic

CMPE223/CMSE222 Digital Logic CMPE223/CMSE222 Digital Logic Optimized Implementation of Logic Functions: Strategy for Minimization, Minimum Product-of-Sums Forms, Incompletely Specified Functions Terminology For a given term, each

More information

DIGITAL CIRCUIT LOGIC UNIT 5: KARNAUGH MAPS (K-MAPS)

DIGITAL CIRCUIT LOGIC UNIT 5: KARNAUGH MAPS (K-MAPS) DIGITAL CIRCUIT LOGIC UNIT 5: KARNAUGH MAPS (K-MAPS) 1 Learning Objectives 1. Given a function (completely or incompletely specified) of three to five variables, plot it on a Karnaugh map. The function

More information

ENGINEERS ACADEMY. 7. Given Boolean theorem. (a) A B A C B C A B A C. (b) AB AC BC AB BC. (c) AB AC BC A B A C B C.

ENGINEERS ACADEMY. 7. Given Boolean theorem. (a) A B A C B C A B A C. (b) AB AC BC AB BC. (c) AB AC BC A B A C B C. Digital Electronics Boolean Function QUESTION BANK. The Boolean equation Y = C + C + C can be simplified to (a) (c) A (B + C) (b) AC (d) C. The Boolean equation Y = (A + B) (A + B) can be simplified to

More information

DIGITAL CIRCUIT LOGIC UNIT 7: MULTI-LEVEL GATE CIRCUITS NAND AND NOR GATES

DIGITAL CIRCUIT LOGIC UNIT 7: MULTI-LEVEL GATE CIRCUITS NAND AND NOR GATES DIGITAL CIRCUIT LOGIC UNIT 7: MULTI-LEVEL GATE CIRCUITS NAND AND NOR GATES 1 iclicker Question 13 Considering the K-Map, f can be simplified as (2 minutes): A) f = b c + a b c B) f = ab d + a b d AB CD

More information

TWO-LEVEL COMBINATIONAL LOGIC

TWO-LEVEL COMBINATIONAL LOGIC TWO-LEVEL COMBINATIONAL LOGIC OVERVIEW Canonical forms To-level simplification Boolean cubes Karnaugh maps Quine-McClusky (Tabulation) Method Don't care terms Canonical and Standard Forms Minterms and

More information

PROGRAMMABLE LOGIC DEVICES

PROGRAMMABLE LOGIC DEVICES PROGRAMMABLE LOGIC DEVICES Programmable logic devices (PLDs) are used for designing logic circuits. PLDs can be configured by the user to perform specific functions. The different types of PLDs available

More information