STMicroelectronics. STxP70-4 assembler. User manual Rev A. October

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1 STMicroelectronics STxP70-4 assembler User manual Rev A October

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3 User manual STxP70-4 assembler Introduction The STxP70-4 version of the assembler is based upon the GNU assembler gas. Most of the features of gas are also included in the STxP70-4 assembler. A number of modifications have been made, however, to support specific features of the STxP70 core. These modifications are described in this chapter. For more background information concerning gas, see the document Using as, published by the Free Software Foundation. For details about the STxP70-4 instruction set, see the STxP70-4 core and instruction set architecture reference manual ( ) October Rev A 1/14

4 Contents STxP70-4 assembler Contents Introduction Preface Document identification and control Documentation suite Conventions used in this guide Invoking the assembler from the command line Command line options Assembler syntax for STxP70-4 core Register names Bundle syntax STxP70-4 encoding length conventions Using shortest instructions STxP70-4 encoding length directives Code relaxation Revision history / Rev A

5 STxP70-4 assembler Preface Preface This document is part of the documentation suite detailed below. Comments on this or other manuals in the documentation suite should be made by contacting your local STMicroelectronics sales office or distributor. Document identification and control Each book in the documentation suite carries a unique ADCS identifier of the form: ADCS nnnnnnnx where, nnnnnnn is the document number, and x is the revision. Whenever making comments on a document, the complete identification ADCS nnnnnnnx should be quoted. Documentation suite STxP70 compiler user manual (ADCS ) This manual describes the C compiler for STMicroelectronics STxP70 cores. STxP70 assembler user manual (ADCS ) This manual describes the assembler for STMicroelectronics STxP70-3 cores. STxP70-4 assembler user manual (ADCS ) This manual describes the assembler for STMicroelectronics STxP70-4 cores. STxP70 professional toolset user manual (ADCS ) This document explains the toolset architecture and provides information about how to develop and debug applications running on STxP70 systems. STxP70 utilities reference manual (ADCS ) This document provides, in a single volume, command line reference for each of the generic and STxP70-3 and STxP70-4 utilities provided with the STxP70 Toolset that are not documented elsewhere. For each utility, the manual provides the command line synopsis, a brief description of the utility, the complete list of options that are available, and its return value. Building STxP70 libraries application note (ADCS ) This document explains how to produce a set of standard libraries for the STxP70 compilation tools optimized for the user s specific purposes Rev A 3/14

6 Preface STxP70-4 assembler Conventions used in this guide General notation The notation in this document uses the following conventions: sample code, keyboard input and file names, variables, code variables and code comments, equations and math, screens, windows, dialog boxes and tool names, instructions. Software notation Syntax definitions are presented in a modified Backus-Naur Form (BNF). Terminal strings of the language, that is those not built up by rules of the language, are printed in teletype font. For example, void. Nonterminal strings of the language, that is those built up by rules of the language, are printed in italic teletype font. For example, name. If a nonterminal string of the language starts with a nonitalicized part, it is equivalent to the same nonterminal string without that nonitalicized part. For example, vspace-name. Each phrase definition is built up using a double colon and an equals sign to separate the two sides ( ::= ). Alternatives are separated by vertical bars ( ). Optional sequences are enclosed in square brackets ( [ and ] ). Items which may be repeated appear in braces ( { and } ). 4/ Rev A

7 STxP70-4 assembler Invoking the assembler from the command line 1 Invoking the assembler from the command line There are three ways to invoke the assembler for the STxP70-4 architecture from the command line. Use the stxp70cc compiler driver with the -c option. Every file with a.s suffix is processed by the assembler. stxp70cc -mcore=stxp70v4 -c <files> Use the stxp70-as command as follows: stxp70-as -mcore=stxp70v4 [<options>] <file> where <file> refers to the assembly file to be processed by stxp70-as. <options> are any of the standard GNU assembler options or any of the options described in Chapter 2: Command line options. Use the STxP70-v4 assembler (stxp70v4-as) directly: stxp70v4-as [<options>] <file> where <file> refers to the assembly file to be processed. <options> are any of the standard GNU assembler options or any of the options described in Chapter 2: Command line options Rev A 5/14

8 Command line options STxP70-4 assembler 2 Command line options The STxP70-4 assembler supports the following options in addition to standard GNU assembler ones: -donot-emit-all-relocs Deactivate the emission of all relocations. The emission of all relocations is required by the Binary Optimizer to work correctly. This option shall not be used at higher optimization levels than O1. By default, all relocations are emitted. -double=[32 64] Specify how double precision floating point values are handled. This is either IEEE-754 singled precision (-double=32) or IEEE-754 double precision (-double=64). This information is written to the object file as part of the ELF flag; this enables the linker to check conformity of floating point management over the whole application. -Mextension=ext_name[,...] List the extension to be used at assembly time. When this switch is specified, the assembler looks for the extension shared object containing the parser and encoder of the specified extension. -Mextension-info -Mextrcdir=<dir> -corecfg=<val> -corecfg1=<val> Display a list of the extensions activated at assembly time with their versioning and identifying special key. Specify the directory where the assembler must look for extension definitions. Specify the CORE_CFG value to be used and written in object file. CORE_CFG defines the STxP70 core configuration. This configuration contains information about the features implemented in the silicon. It therefore prevents the assembler from using certain instructions that are not valid for a specific configuration. Specify the CORE_CFG1 value to be used and writen in object file. CORE_CFG1 defines the STxP70 core configuration. This configuration contains information about the features implemented in the silicon. It therefore prevents the assembler from using certain instructions that are not valid for a specific configuration. 6/ Rev A

9 STxP70-4 assembler Command line options -noconfiginobj -bundle Instruct the assembler not to emit the CORE_CFG and CORE_CFG1 values in the object file. This makes the object file compatible with any other STxP70 object file. This option should be used carefully as it deactivates certain link-time consistency checks of object files. In particular, this option must be used only when building library object files with minimal STxP70 core configuration. Activate bundling mode of STxP70-4 architecture. Using this option makes it mandatory for the assembly file to use the ;; separator between bundles. -norelaxation Deactivate the relaxation mode at assembler level. By default, the assembler always selects the shortest encoding length for instructions. If this feature is deactivated, the assembler using the longest available encoding length for each instruction, usually 48 bits. -force-encoding=[ ] Enable the specified encoding at assembler level. When this option is set the assembler uses the specified encoding variant (16-, 32- or 48-bit) of each instruction. If the specified encoding variant does not exist, the assembler generates a syntax error. -v4-strict Enable strict assembly syntax. When this is used even in non-bundling mode, the ;; separator is required between every two instructions. Omitting the ;; separator will generate a syntax error Rev A 7/14

10 Assembler syntax for STxP70-4 core STxP70-4 assembler 3 Assembler syntax for STxP70-4 core Block comments are delimited by /* and */. End of line comments may be introduced with either # or //. Instructions consist of an optional leading guard, followed by whitespace, then an opcode or macro name followed by whitespace and an optional comma-separated list of operands: [guard] opcode macro_name [operand{,operand}] guard opcode macro_name operand This takes the form Gn? where n is the number of a guard register in the range 0 to 7. Guard registers 0 to 6 contain a boolean value; this value determines if the instruction should be executed or not. If an instruction is prefixed by G7, then it is always executed. If a guard is not given, then the assembler assumes G7 as default. An STxP70 instruction mnemonic. The name of a previously defined multi-line macro. One of the following: register name memory reference expression (a combination of operators, constants and identifiers) If the instruction accepts more than one operand, they are separated by commas. All instructions must be separated by a newline or semicolon. 3.1 Register names General purpose registers are named R0 to R31. Loop registers are named L0 and L1. The STxP70 architecture is configurable. The following specific configurations directly affect the accessible registers: 16 register configuration The STxP70 core only manages R0 to R15. The remaining registers are not accessible. No hardware loop configuration L0 and L1 are not accessible. As a special feature, SP is also supported as a synonym for R15, and GP is supported as a synonym for R13. Additional registers may be added by user-defined extensions. 8/ Rev A

11 STxP70-4 assembler Assembler syntax for STxP70-4 core 3.2 Bundle syntax In addition to the STxP70 core assembler syntax, the STxP70-4 architecture introduces bundling capabilities. Bundling allows two variable length instructions to be bundled together and executed in parallel. In the assembler source code, bundles are separated by double semi-colons ;;. This separator must be specified either on a line by itself or at the end of a line. The following examples show usage of the ;; separator: Example 1 g7? addu R0, R1, R2 g7? move R3, R4 ;; Example 2 g7? addu R0, R1, R2 g7? move R3, R4 ;; Example 3 g7? addu R0, R1, R2 ; g7? move R3, R4 ;; Rev A 9/14

12 STxP70-4 encoding length conventions STxP70-4 assembler 4 STxP70-4 encoding length conventions See the STxP70-4 core and instruction set architecture reference manual ( ) for a complete list of instructions and descriptions of their semantics. By default, the STxP70-4 assembler looks for the shortest instruction. However, it is possible to control the encoding length used. 4.1 Using shortest instructions The STxP70-4 instruction set provides 16-, 32- and 48-bit versions of some of the most commonly used opcodes. These instructions can significantly reduce code size. Where possible, the assembler automatically translates instructions into the equivalent shortest valid instruction. This translation can be disabled by using specific directives (see Chapter 5: STxP70-4 encoding length directives), or by using the -force-encoding or -norelaxation command-line options (see Chapter 2: Command line options on page 6). STMicroelectronics recommend not to attempt to force the shortest instructions explicitly through directives. The assembler automatically selects the shortest valid instructions wherever possible. 10/ Rev A

13 STxP70-4 assembler STxP70-4 encoding length directives 5 STxP70-4 encoding length directives By default, the STxP70-4 assembler always tries to encode the shortest version of an instruction in order to save code size. This is also known as relaxation at assembler level (see Chapter 6: Code relaxation). However, when it is essential to select a particular version of an instruction, three directives are provided:.is16.is32.is48 Force the assembler to select 16-bit encoding version for following instruction. For example:.is16 g7? addu R0, R0, R2 Force the assembler to select 32-bit encoding version for following instruction. For example:.is32 g1? addu R0, R1, R2 Force the assembler to select 48-bit encoding version for following instruction. For example:.is48 g6? addu R0, R1, R2 Note: If the requested size variant is not available, the assembler will choose the shortest one. These directives apply to instructions only. They do not apply to built-in macros or user-defined macros Rev A 11/14

14 Code relaxation STxP70-4 assembler 6 Code relaxation When an instruction operand is unknown at assembly time, the assembler selects the largest possible encoding for the particular instruction (usually the 48-bit encoding). Then, at the linking stage, it is the responsibility of the linker, to select the shortest version of the instruction. This process is known as code relaxation. Relaxation is typically performed for branch instructions because the distance of the branch target is unknown at assembly-time. This is also the case for data address reference, because data location is also unknown at assembly time. 12/ Rev A

15 STxP70-4 assembler Revision history 7 Revision history Table 1. Document revision history Date Revision Changes 26-Oct-2009 A Initial release Rev A 13/14

16 STxP70-4 assembler Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ( ST ) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER S OWN RISK. Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 14/ Rev A

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