ECE468 Computer Organization & Architecture. The Design Process & ALU Design

Transcription

1 ECE6 Computer Organization & Architecture The Design Process & Design The Design Process "To Design Is To Represent" Design activity yields description/representation of an object -- Traditional craftsman does not distinguish between the conceptualization and the artifact -- Separation comes about because of complexity -- The concept is captured in one or more representation languages -- This process IS design Design Begins With Requirements -- Functional Capabilities: what it will do -- Performance Characteristics: Speed, Power, Area, Cost,...

2 Design Process (cont.) Design Finishes As Assembly -- Design understood in terms of components and how they have been assembled Datapath CPU Regs Shifter Control -- Top Down decomposition of complex functions (behaviors) into more primitive functions Nand Gate -- bottom-up composition of primitive building blocks into more complex assemblies Design is a "creative process," not a simple method Design Refinement Informal System Requirement Initial Specification Intermediate Specification refinement increasing level of detail Final Architectural Description Intermediate Specification of Implementation Final Internal Specification Physical Implementation

3 Design as Search Problem A Strategy Strategy 2 SubProb SubProb2 SubProb3 BB BB2 BB3 BBn Design involves educated guesses and verification -- Given the goals, how should these be prioritized? -- Given alternative design pieces, which should be selected? -- Given design space of components & assemblies, which part will yield the best solution? Feasible (good) choices vs. Optimal choices Design as Representation (example) () Functional Specification "VHDL Behavior" Inputs: 2 x 6 bit operands- A, B; bit carry input- Cin. Outputs: x 6 bit result- S; bit carry output- Co. Operations: PASS, ADD (A plus B plus Cin), SUB (A minus B minus Cin), AND, XOR, OR, COMPARE (equality) Performance: left unspecified for now! (2) Block Diagram "VHDL Entity" Understand the data and control flows 6 6 A B M Co Cin S 6 3 mode/function

4 Elements of the Design Process Divide and Conquer Formulate a solution in terms of simpler components. Design each of the components (subproblems) Generate and Test Given a collection of building blocks, look for ways of putting them together that meets requirement Successive Refinement Solve "most" of the problem (i.e., ignore some constraints or special cases), examine and correct shortcomings. Formulate High-Level Alternatives Articulate many strategies to "keep in mind" while pursuing any one approach. Work on the Things you Know How to Do The unknown will become obvious as you make progress. Summary of the Design Process Hierarchical Design to manage complexity Top Down vs. Bottom Up vs. Successive Refinement Importance of Design Representations: Block Diagrams Decomposition into Bit Slices Truth Tables, K-Maps Circuit Diagrams top down bottom up mux design meets at TT Other Descriptions: state diagrams, timing diagrams, reg xfer,... Optimization Criteria: Gate Count [Package Count] Area Logic Levels Fan-in/Fan-out Delay Power Pin Out Cost Design time

5 Introduction to Binary Numbers Consider a -bit binary number Decimal Binary 2 3 Decimal Binary Examples: = = Two s Complement Representation 2 s complement representation of negative numbers Bitwise inverse and add The MSB is always for negative number => sign bit Biggest -bit Binary Number: 7 Smallest -bit Binary Number: - Decimal Binary Decimal Bitwise Inverse - 2 s Complement Illegal Positive Number!

6 Two s Complement Arithmetic Decimal Binary Decimal s Complement Examples: 7-6 = 7 + (- 6) = 3-5 = 3 + (- 5) = Functional Specification of the op 3 A N Zero B N N Result Overflow Control Lines (op) Function And Or Add Subtract Set-on-less-than

7 A One Bit This -bit will perform AND, OR, and ADD A Mux Result B -bit Full Adder A One-bit Full Adder This is also called a (3, 2) adder Half Adder: No nor A B -bit Full Adder C Truth Table: Inputs Outputs A B Sum Comments + + = + + = + + = + + = + + = + + = + + = + + =

8 Logic Equation for Inputs Outputs A B Sum Comments + + = + + = + + = + + = + + = + + = + + = + + = = (!A & B & ) (A &!B & ) (A & B &!) (A & B & ) = B & A & A & B Logic Equation for Sum Inputs Outputs A B Sum Comments + + = + + = + + = + + = + + = + + = + + = + + = Sum = (!A &!B & ) (!A & B &!) (A &!B &!) (A & B & )

9 Logic Equation for Sum (continue) Sum = (!A &!B & ) (!A & B &!) (A &!B &!) (A & B & ) Sum = A XOR B XOR Truth Table for XOR: X Y X XOR Y Logic Diagrams for and Sum = B & A & A & B A B Sum = A XOR B XOR A B Sum

10 A -bit -bit -bit A B -bit Full Adder Mux Result A B A B A2 B2 A3 B3 -bit Result -bit Result 2 -bit Result bit Result3 3 How About Subtraction? Keep in mind the followings: (A - B) is the that as: A + (-B) 2 s Complement: Take the inverse of every bit and add Bit-wise inverse of B is!b: A +!B + = A + (!B + ) = A + (-B) = A - B Subtract B!B Sel 2x Mux A Zero Result

11 Overflow Decimal Binary Decimal s Complement Examples: = but = - 9 but Overflow Detection Overflow: the result is too large (or too small) to represent properly Example: - < = -bit binary number <= 7 When adding operands with different signs, overflow cannot occur! Overflow occurs when adding: 2 positive numbers and the sum is negative 2 negative numbers and the sum is positive Homework exercise: Prove you can detect overflow by: Carry into MSB! = Carry out of MSB

12 Overflow Detection Logic Carry into MSB! = Carry out of MSB For a N-bit : Overflow = [N - ] XOR [N - ] A B A B A2 B2 A3 B3 -bit Result -bit Result 2 3 -bit -bit 3 Result2 Result3 X Y X XOR Y Overflow Zero Detection Logic Zero Detection Logic is just a one BIG NOR gate Any non-zero input to the NOR gate will cause its output to be zero A B A B A2 B2 A3 B3 -bit Result Result -bit 2 Result2 -bit 3 2 -bit 3 Result3 Zero

13 The Disadvantage of Ripple Carry The adder we just built is called a Ripple Carry Adder The carry bit may have to propagate from LSB to MSB Worst case delay for a N-bit adder: 2N-gate delay A B A B A2 B2 A3 B3 -bit Result -bit Result 2 -bit Result bit Result3 A B 3 Carry Select Header Consider building a -bit Simple: connects two -bit s in series A[3:] B[3:] A[7:] B[7:] Result[3:] Result[7:]

14 Carry Select Header (Continue) Consider building a -bit Expensive but faster: uses three -bit s A[7:] B[7:] C X[7:] A[7:] B[7:] A[3:] B[3:] Y[7:] C 2 to MUX C Sel C Sel 2 to MUX Result[3:] Result[7:] The Theory Behind Carry Lookahead B A B A Cin2 Cout -bit Cin Cout -bit Cin Recalled: = (B & ) (A & ) (A & B) Cin2 = Cout = (B & Cin) (A & Cin) (A & B) Cin = Cout = (B & Cin) (A & Cin) (A & B) Substituting Cin into Cin2: Cin2 = (A & A & B) (A & A & Cin) (A & B & Cin) (B & A & B) (B & A & Cin) (B & A & Cin) (A & B) Cin2 Now define two new terms: Generate Carry at Bit i Propagate Carry via Bit i gi = Ai & Bi pi = Ai or Bi

15 The Theory Behind Carry Lookahead (Continue) Using the two new terms we just defined: Generate Carry at Bit i Propagate Carry via Bit i We can rewrite: Cin = g (p & Cin) gi = Ai & Bi pi = Ai or Bi Cin2 = g (p & g) (p & p & Cin) Cin3 = g2 (p2 & g) (p2 & p & g) (p2 & p & p & Cin) Carry going into bit 3 is if We generate a carry at bit 2 (g2) Or we generate a carry at bit (g) and bit 2 allows it to propagate (p2 & g) Or we generate a carry at bit (g) and bit as well as bit 2 allows it to propagate (p2 & p & g) Or we have a carry input at bit (Cin) and bit,, and 2 all allow it to propagate (p2 & p & p & Cin) A Partial Carry Lookahead Adder It is very expensive to build a full carry lookahead adder Just imagine the length of the equation for Cin3 Common practices: Connects several N-bit Lookahead Adders to form a big adder Example: connects four -bit carry lookahead adders to form a 32-bit partial carry lookahead adder A[3:2] B[3:2] A[23:6] B[23:6] A[5:] B[5:] A[7:] B[7:] -bit Carry Lookahead Adder C2 -bit Carry Lookahead Adder C6 -bit Carry Lookahead Adder C -bit Carry Lookahead Adder C Result[3:2] Result[23:6] Result[5:] Result[7:]

16 Summary An Overview of the Design Process Design is an iterative process-- successive refinement Do NOT wait until you know everything before you start An Introduction to Binary Arithmetics If you use 2 s complement representation, subtract is easy. Design Designing a Simple -bit Other Construction Techniques More information from Chapter of the textbook