Introduction to Computers - Chapter 4

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1 Introduction to Computers - Chapter 4 Since the invention of the transistor and the first digital computer of the 1940s, computers have been increasing in complexity and performance; however, their overall design has remained the same Computers perform a series of instructions, called a program, exactly without fail with no regard for their consequences This program is usually coded into memory where each number is a special code or instruction for the computer to process Computers have found their way into many aspects of our lives; we see them everywhere and they aid us in making our lives much easier 1

2 How Do Computers Think? Computers do not think! A programmer generates a series of instructions in which the computer executes without fail If a computer fails its task, it is generally the programmers fault We assume, as programmers, that the computer will execute those instructions; there should be no hardware faults The term Garbage In Garbage Out refers to how a computer can fail if it is not given proper information; perhaps, it is the programmer who failed in instructing the computer on what is valid 2

3 How Do Computers Think? Computers use memory to store instructions and data Types of instructions: Arithmetic Decision-Making Conditional jumps or branches Unconditional jumps or branches Most instructions consist of two pieces of information: the action to be taken (opcode) and some secondary value used for that action (operand) add 1 action is add, value to add is 1 jump 10 action is jump, jump to address 10 Instructions are executed in sequence Sequence can be changed if a branch or a jump instruction is used 3

4 How Many Kinds of Computers are There? A computer is any circuit which is designed based on the principles of a computer architecture see later Although computers vary in size, speed and cost, generally they are all the same Your digital watch uses a very simple computer whereas a calculator may use one that is slightly more complex due to the arithmetic required (unlike your watch) Your desktop/laptop computer is a very generalized computer designed to do many things, but nothing particularly well In contrast, an IPOD is designed only to play music and videos; consider how much CPU power your desktop/laptop needs to play a video We shall concentrate on microcomputers for the remainder of this course 4

5 Basic Computer Structure Although computers can be very different, they all have the same 5 components: Memory unit Arithmetic Logic Unit (ALU) Input unit Output unit Control unit The control unit directs the actions of all the other units (master of all) 5

6 Basic Computer Structure Memory Unit Stores groups of bits (words or possibly bytes), which represent instruction code or data The action of reading or writing (6) and where (7) is dictated by the control unit Data can be read (8,4) or sent (2,9) anywhere We can easily move memory to and from any other unit 6

7 Basic Computer Structure Arithmetic Logic Unit Performs arithmetic and logic operations on up to two operands (via 2 or 3) Output can be sent back to memory to be fed-back to the controller or ALU Most of the results of the ALU are stored in the Accumulator 7

8 Basic Computer Structure Input Unit Devices which transfer information from the outside world into the computer Keyboard, ADCs Output Unit Devices to transfer information to Monitor, DACs Input/Output Modems, Network, CDROM, Hard disc, Tape, etc 8

9 Basic Computer Structure Control Unit Directs the operation of all other parts by providing timing and control signals Fetches an instruction by setting an address on the memory unit (7) and reading it (6) and sends it to (11) and is then decoded to determine the operation to be executed Control unit then generates signals to execute that operation Control unit s function is to fetch, decode, and execute instructions that are in memory 9

10 Basic Computer Structure ALU and control unit are usually combined into a central processing unit (CPU) (A) below shows a simplified computer diagram (B) shows a microcomputer diagram CPU and Micro-Processing Unit are synonymous with each other When the CPU is a single IC, it is referred to as a MPU When a MPU is connected to memory and I/O, it becomes a microcomputer 10

11 Microprocessors MPU contains the circuits to perform the functions of a CPU MPUs are produced by many manufacturers They are mostly the same, but each has a unique set of characteristics Word size (8/16/32/64) Number of instructions (CISC, RISC) Number of control signals available (# of pins) Amount of memory which it can address Too many MPUs to cover; we will concentrate on the Freescale (formally Motorola) 68HC11 Microcontroller It is essentially a MPU with memory and I/O internally - a microcontroller Can operate with very little external circuits (mostly power) 11

12 Computer Words A fundamental unit of information in a computer is the word Although it is made up of several bits, the computer treats the word as a single unit and stores each word in a specific memory location Typical word sizes are (in bits): 8, 16, 32, 64 The 68HC11 has an 8 bit word size Words can store several pieces of information, such as: Binary data Coded data Instruction codes Addresses 12

13 Binary Data We are already aware of how numbers can be stored in binary Unsigned Signed 2 s Compliment Differentiate combined words Example Two 8-bit words, 12 (16) and 34 (16), can be combined: 1234 (16) where 12 is the high-order word and 34 is the low-order word On a LSB system (little endian), the 34 would be stored first (least significant) followed by the 12 On a MSB system (big endian), the 12 would be stored first (most significant) followed by the 34 13

14 Coded Data Decimal data can be encoded in a friendlier format known as Binary Coded Decimal (BCD) to avoid conversion between base 2 and 10 Example: 1234 (10) is encoded as 1234 (16) English text can be encoded using American Standard Code for Information Interchange (ASCII) A is 65, B is 66,, Z is 90 a is 97, b is 98,, z is is 48, 1 is 49, Usually 7 bits, allows for parity Words are combined to generate human words Unicode (16-bit) and Universal Character Set (16/32-bit) Offers a set of character symbols for many written languages More bits/character required during transmission and coding 14

15 Instruction Words Program instructions consist of an op-code and operand in either a combined or separated word Figure below shows an example of a combined system with a 20-bit word 4 bits are used to describe the op-code (16 possible) 16 bits are used for the operand address (65536 possible) 15

16 Instruction Words 68HC11 Uses a separate word instruction system Has two accumulators, A and B (both 8 bit) Each accumulator is treated equally; same functional instruction for each 16

17 Instruction Words 68HC11 Single-byte instructions contain only 1 8-bit op-code and no operands Does not require extra information; no additional data access Example: ASLA Accumulator shift left A 17

18 Instruction Words 68HC11 Two-byte instructions contain 1 8-bit op-code and 1 8-bit operand; stored in that order Operand contains immediate data or indirect address Example: LDAA #124 Load Accumulator A with immediate value of 124 decimal 18

19 Instruction Words 68HC11 Three-byte instructions contain 1 8-bit op-code and 2 8-bit operands; stored in that order Operand contains large data or full address Example: ADDA $C123 Add contents at memory address $C123 with that of Accumulator A (store in accumulator A ) 19

20 Instruction Words 68HC11 Is based on a seasoned MPU with many additions over time Utilizes a prebyte which, precedes the op-code, to indicate operations are intended for an extended register Y Some other MPUs do this when newer instructions are introduced in later models 20

21 Instruction Words 68HC11 Program tells computer what to do step-bystep For the 68HC11, programs will consist of as many as one, two, and three byte instructions which are stored in an orderly fashion Programs can be in RAM or ROM MPU fetches, decodes and executes these instructions from memory one at a time beginning at some prescribed starting point 21

22 Instruction Words Since an instruction can use more than one word, the MPU may perform many fetches before it can execute the instruction MPU always decodes the op-code to determine what to do next, i.e. fetch more, or execute MPU keeps executing instructions until power is removed Time required to execute an instruction depends on the instruction type as it is based on the series of events necessary to complete the operation 22

23 Simplified 68HC11 Take a more detailed look at a MPU Uses a simplified version of the 68HC11 No I/O, only one register (Accumulator) Will add more components as needed Data register DR Internal address bus Internal data bus ALU 68HC11 MPU DAR Data address register Accumulator A PC Program counter IR Instruction register Address latch / buffer Data buffer Address bus Memory Program R/W Data Data bus Instruction decoder TCL To all other MPU elements Timing and control logic.. R/W Control bus Legend: = data (8 lines) = address (16 lines) = control 23

24 Simplified 68HC11 Buses Two separate internal buses (which can extend externally, plus control bus) Address bus is 16-bits and contains the memory address the MPU wants to read from or write to Data bus is 8-bits bi-directional and carries data and instruction code Control bus is a grouping of all timing and control signals needed to synchronize the operations of the MPU; only consider R/W Data register DR Internal address bus Internal data bus ALU 68HC11 MPU DAR Data address register To all other MPU elements Accumulator A PC Program counter IR Instruction register Instruction decoder Timing and control logic TCL Address latch / buffer.. Data buffer R/W Address bus Memory Program R/W Data Data bus Control bus Legend: = data (8 lines) = address (16 lines) = control 24

25 Simplified 68HC11 MPU Registers Combined Controller and ALU Includes registers that are used to store intermediate information These registers serve as dedicated internal memory Program Counter (PC) Indicates the memory address of the current instruction Is later incremented to setup for the next FETCH Data register DR Internal address bus Internal data bus ALU 68HC11 MPU DAR Data address register To all other MPU elements Accumulator A PC Program counter IR Instruction register Instruction decoder Timing and control logic TCL Address latch / buffer.. Data buffer R/W Address bus Memory Program R/W Data Data bus Control bus Legend: = data (8 lines) = address (16 lines) = control 25

26 Simplified 68HC11 MPU Registers Data Address Register (DAR) Provides an instruction code address to the memory unit during a FETCH operation (read) or an EXECUTE operation (read/write) For example: STAA store accumulator A into memory address Z; Z would be placed in the DAR Data register DR Internal address bus Internal data bus ALU 68HC11 MPU DAR Data address register To all other MPU elements Accumulator A PC Program counter IR Instruction register Instruction decoder Timing and control logic TCL Address latch / buffer.. Data buffer R/W Address bus Memory Program R/W Data Data bus Control bus Legend: = data (8 lines) = address (16 lines) = control 26

27 Simplified 68HC11 MPU Registers Instruction Register (IR) Holds the current instruction being processed Value is obtained from memory Timing and Control Logic (TCL) Signals the components to perform the current instruction Basically is state-machine with an internal microcode or microprogram, which contains the steps for executing all variations of instructions Can not generally be modified Data register DR Internal address bus Internal data bus ALU 68HC11 MPU DAR Data address register To all other MPU elements Accumulator A PC Program counter IR Instruction register Instruction decoder Timing and control logic TCL Address latch / buffer.. Data buffer R/W Address bus Memory Program R/W Data Data bus Control bus Legend: = data (8 lines) = address (16 lines) = control 27

28 Simplified 68HC11 MPU Registers Accumulator (A) and Data Register (DR) Holds the current operands that the ALU operates on Loaded from memory Results of ALU operation are generally transferred to the accumulator Only the accumulator can write to memory, not the DR Data register DR Internal address bus Internal data bus ALU 68HC11 MPU DAR Data address register To all other MPU elements Accumulator A PC Program counter IR Instruction register Instruction decoder Timing and control logic TCL Address latch / buffer.. Data buffer R/W Address bus Memory Program R/W Data Data bus Control bus Legend: = data (8 lines) = address (16 lines) = control 28

29 Executing a Program Now we are ready to observe how the various 68HC11 MPU registers and circuits work to execute a program We will begin with a very small program so that we can understand how the MPU works Every MPU has a specific set of instructions, known as the instruction set Examine a few of the 68HC11 instructions These are only some of the variations of the instructions available 29

30 Some 68HC11 Instructions Operation Mnemonic Op code Description Load Accumulator A LDAA $B6 Accumulator A is loaded with data from memory location (2 byte operand) Store Accumulator A STAA $B7 Contents of Accumulator A is stored in memory location (2 byte operand) Add to Accumulator A ADDA $BB The data in the memory location (2 byte operand) is added to Accumulator A Subtract from Accumulator A SUBA $B0 The data in the memory location (2 byte operand) is subtracted from Accumulator A Wait for Interrupt WAI $3E Halt execution of CPU and wait for an interrupt Jump JMP $7E Jump to memory address (2 byte operand) Branch if Equal to Zero BEQ $27 If the ZERO flag is true, add 1 byte operand to PC 30

31 Sample Program Assume PC is initially set to $C000 Assume code is already located at $C000-$C009 This program will add the contents of $C100 to $C101 and store it at $C102 Memory Address $C000 $C001 $C002 $C003 $C004 $C005 $C006 $C007 $C008 Contents Mnemonic Description $B6 $C1 $00 $BB $C1 $01 $B7 $C1 $02 LDAA ADDA STAA LOAD Accumulator A from $C100 ADD contents of $C101 to Accumulator A STORE contents of Accumulator A to $C102 $C009 $3E WAI Wait for an interrupt 31

32 Program Execution 1. Fetch op-code for LDAA TCL places [PC] = $C000 onto the address bus, R/W=1 for read operation $B6 at $C000 is placed onto data bus and is loaded into IR; [M] [IR] 2. Increment the PC Get ready for the next instruction [PC]+1 [PC] 3. Decode op-code Instruction decoder decodes opcode MPU (C000) PC (B6) IR R/W Address bus Data bus (C000) Memory (B6) 32

33 Program Execution 4. Fetch operand address (high-order) Place PC on address bus, set R/W=1 Place memory (C1) into DAR high [M] [DAR high ] 5. Increment PC [PC]+1 [PC] 6. Fetch operand address (low-order) Place PC on address bus, set R/W=1 Place memory (00) into DAR low [M] [DAR low ] 7. Increment PC [PC]+1 [PC] MPU (C000) PC (B6) IR R/W Address bus Data bus (C000) Memory (B6) 33

34 Program Execution 8. Execute LDAA DAR is placed on address bus, R/W=1 Data bus goes to Accumulator A [M] [A] 9. Fetch op-code for ADDA Places [PC] = $C003 onto the address bus, R/W=1 $BB at $C003 is placed onto data bus and is loaded into IR; [M] [IR] 10. Increment PC [PC]+1 [PC] MPU (C100) DAR (X) A R/W Address bus Data bus (C100) Memory (X) 34

35 Program Execution 11. Decode op-code Instruction decoder decodes op-code 12. Fetch operand address (high-order) Place PC on address bus, set R/W=1 Place memory (C1) into DAR high [M] [DAR high ] 13. Increment PC [PC]+1 [PC] 14. Fetch operand address (low-order) Place PC on address bus, set R/W=1 Place memory (01) into DAR low [M] [DAR low ] 35

36 Program Execution 15. Increment PC [PC]+1 [PC] 16. Execute ADDA DAR is placed on address bus, R/W=1 Data bus goes to ALU to add to Accumulator A [M]+[A] [A] 17. Fetch op-code for STAA Places [PC] = $C006 onto the address bus, R/W=1 $B7 at $C006 is placed onto data bus and is loaded into IR; [M] [IR] 18. Increment PC [PC]+1 [PC] 19. Decode op-code Instruction decoder decodes op-code 36

37 Program Execution 20. Fetch operand address (high-order) Place PC on address bus, set R/W=1 Place memory (C1) into DAR high [M] [DAR high ] 21. Increment PC [PC]+1 [PC] 22. Fetch operand address (low-order) Place PC on address bus, set R/W=1 Place memory (02) into DAR low [M] [DAR low ] 23. Increment PC [PC]+1 [PC] 37

38 Program Execution 24. Execute STAA DAR is placed on address bus Accumulator A is placed on data bus, R/W=0 [A] [M] 25. Fetch op-code for WAI Places [PC] = $C009 onto the address bus, R/W=1 $3E at $C009 is placed onto data bus and is loaded into IR; [M] [IR] 26. Increment PC [PC]+1 [PC] 27. Decode op-code Instruction decoder decodes op-code 28. Execute WAI Place MPU to sleep until interrupt occurs 38

39 The JuMP Instruction Instructions are generally executed one step at a time PC is incremented after every memory access Most programs use loops JMP facilitates the implementation of loops Acts like the infamous GOTO statement Once instruction is decoded, the 2-byte operand is loaded from memory directly to the PC The next instruction will be read from the new value of the PC 39

40 The Branch Instruction JuMP instruction alters the PC directly Requires 3 bytes for the op-code and operand Branch instructions modify the PC by adding to or subtracting from its current value 2 byte op-code and operand (operand is only 1 byte) Branches are usually applied to conditions BEQ Branch if Equal BLT Branch if Less Than Operand is a signed binary value, which is added to the PC using 2 s complement arithmetic PC value before addition is at the next op-code Example: $C203 BEQ $C219 = $27 $14 40

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