# Digital Circuits ECS 371

Size: px
Start display at page:

Download "Digital Circuits ECS 371"

Transcription

1 Digital Circuits ECS 37 Dr. Prapun Suksompong Lecture 7 Office Hours: KD 36-7 Monday 9:-:3, :3-3:3 Tuesday :3-:3

2 Announcement HW2 posted on the course web site Chapter 4: Write down all the steps that you have done to obtain your answers. Due date: July 9, 29 (Thursday) Please submit your HW to the instructor 3 minutes EFORE your class starts. Late submission will NOT be accepted. Earlier submission is possible. There are two HW boxes in the EC department (6 th floor) for ECS 37. (One for CS. Another one for IT.) 2

3 Announcement Score and solution for HW posted on the course web site. Reading Assignment Chapter 4: 4.to 4-9 The textbook contains much more explanation than what I can talk about in class. Reading it will help you understand our material from another perspective. Today, we will use Handout for lecture 7 (new one) Handout for lecture 5-6 (old one) 3

4 Our Goals Ultimate goals:. Analyze digital circuits. 2. Design digital circuits to do something useful.. Analyze digital circuit: Given a digital circuit, find out what it does. One way to achieve this goal is to look at the truth table. 4

5 Example: Analyzing Logic Circuit. Suppose we are given a digital circuit. 2. Analyze it via the truth table A X X A A It may be useful to find a oolean expression first Interpretation: This is a circuit that checks whether A =. Output X = if A and are not the same. Output X = if A is the same as. We can apply the same technique to more complicated circuits. Sometimes, we may be able to simplify the circuit by simplifying its oolean expression.

6 Our Goals 6 Ultimate goals:. Analyze digital circuits. 2. Design digital circuits to do something useful.. Analyze digital circuit: 2. Design digital circuits: Given a task, build a SIMPLE digital circuit that perform the specified task. A recipe: Directly determine a oolean expression corresponding to the task or start with a truth table and then turn it into a oolean expression. Simplify the expression. Many examples last week. (One in next slide.) Construct a circuit from the simplified expression.

7 Example A C X X AC AC AC AC AC AC AC AC AC AC AC AC AC AC AC AC AC AC AC AC AC AC Direct construction of a circuit from this equation will be complicated. Simplification 7 Construction of an equivalent circuit from this equation is simpler. X AC

8 Example: Designing Logic Circuit. Suppose we want to build a circuit that perform a one-bit addition A S S C out 3. Can we turn this truth table into a simple circuit? S 2. We can summarize its task by a truth table. Inputs Outputs A C out S 8 A C out

9 Example: Designing Logic Circuit (2) 9. Suppose we want to build a circuit that perform a one-bit addition with input carry 2. We can summarize its task by a truth table. 3. Can we turn this truth table into oolean expression? Outputs Inputs A C out S C in How?

10 Truth Table oolean Expression? How can we turn a truth table into oolean expression? Let s first study the relationship between truth table and oolean expression. It is easier to convert a oolean expression into a truth table. There are some forms of oolean expressions that are easily converted into their corresponding truth tables. Sum-of-products form Product-of-sums form

11 Product Term A single literal or a product of two or more literals. Example: Caution: A C AC A A C D A C A C is not a product term. Q : When does A C? A C A: IFF,,,, So, it is very easy to construct a truth table for X A C X A C

12 2 Sum Term A single literal or a sum of two or more literals. Example: Caution: A C A C A A C D A C A C is not a sum term. Q : When does A C? It might be easier to ask: Q : When does A C? A C A: IFF,,,, Q : When does A C? A C A: IFF,,,, It is easy to construct a truth table for X A C A C X

13 Again. It is easy to find the case when a product term =. A C A C iff,,,, 2. It is easy to find the case when a sum term =. A C iff A,, C,, 3

14 Sum-of-Product (SOP) Form A product term or a sum of product terms Example: A AC A C AC CDE Example: Develop a truth table for X A AC 4 Observe that when a product term does not contain all variables, it corresponds to multiple s in the output column of the truth table. This is because the missing variable does not affect the product term and hence can be or. A C X Observe that when a product term contains all the variables, it corresponds to a unique in the output column of the truth table.

15 Nonstandard product term 5 Observe these! Standard SOP (Canonical Sum) Each product term contains all variables. Example: A AC AC AC AC is not a standard SOP expression. is a standard SOP expression. Minterm: A product term in a standard SOP expression. Example: AC AC AC contains 3 minterms A minterm is equal to for only one combination of variable values. A minterm corresponds to a unique in the output column of the truth table. A minterm corresponds to a unique row of the truth table. A canonical sum is a sum of minterms.

16 Remember these: SOP = Sum of products Standard SOP = Canonical sum Minterm = A product term in canonical sum 6

17 Domain Domain of an expression: Set of variables contained in the expression. Example: Domain of A AC is A,, C. So, a standard SOP expression is one in which all the variables in the domain appear in each product term in the expression. Alternative definition for a standard SOP expression. 7

18 Row Number of the Truth Table Row # A C X Think of these as one unsigned binary number. The corresponding decimal value is the row #. 8

19 Minterm/Row Number & Truth Table Row # A C Minterm A C A C 2 A C 3 A C 4 A C 5 A C 6 A C 7 A C Summary: Each row of the truth table corresponds to. A combination of input (A,,C). 2. A row #. 3. A minterm. 9

20 2 inary Representation Example: Consider a canonical sum: = IFF (A,,C,D) = (,,,) ACD ACD (of minterm and of any oolean expression) ACD ACD A,, C, D 5,6 = IFF (A,,C,D) = (,,,) Row # 5 Row # 6 X ACD ACD This is called a minterm list A C D X It means the sum of minterms 5,6 with variable A,, C, D

21 Canonical Sum and Minterm List Example: Convert AC A into canonical sum. Hint : X X X Y Y Example: Convert AC A into a minterm list. X Y X Y Any logic function/expression can be expressed as a canonical sum (which is equivalent to a minterm list). 2

22 Truth Table oolean Expression (A Revisit!) Add all the minterms corresponding to a in the output column of the truth table. A C X X A C A C A C A C A C Alternatively, we may write X A,, C,3,4,6,7 22

23 Minimization (A Revisit!) The process that results in an expression containing the fewest possible terms with the fewest possible variables. We have done some minimization using oolean algebra. The expression can then be implemented with fewer logic gates. 23

24 Karnaugh Map A C C A CD C A Row # A C A The small number inside each cell is the corresponding row number in the truth table, assuming that the truth table inputs are labeled alphabetically from left to right (e.g. A,, C) and the rows are numbered in binary counting order. D 5 4 Row # A C D

25 Karnaugh Map: asic Layout Similar to a truth table. Present all of the possible values of input variables and the resulting output for each value. Instead of being organized into columns and rows, it is an array of cells. The number of cells in a K-map, as well as the number of rows in a truth table, is equal to the total number of possible input variable combinations (which is the same as the total number of minterms). The cells are arranged in a way so that simplification of a given expression is simply a matter of properly grouping the cells. Used for simplifying oolean expressions to their minimum form. C C A C CD A 25 A A D

26 Example: Truth Table v.s. K-map Input Columns A C X X A AC A A C C Output Column 26 It can be difficult (especially for large K-map) to remember which cell in K-map corresponds to a particular row in the truth table. We also want to get the K-map directly from oolean expression without writing down truth table first.

27 The 2-variable Karnaugh Map (2x2 K-Map) Domain A, We will study K-maps for logic functions of 2, 3, and 4 variables Each row of the truth table corresponds to one minterm. Input Columns Each cell of the K-map corresponds to one minterm. 27 A X Minterm A A A A Output Column A Use these to find the corresponding minterm for each cell.

28 The 3-variable Karnaugh Map Domain A,, C 28

29 The 4-variable Karnaugh Map Domain A,, C, D 29

30 Mapping (Canonical Sum) Map the following expression on an appropriate Karnaugh map AC AC AC AC A C C ACD AC D ACD ACD AC D ACD AC D CD C A A A 3 D

### Bawar Abid Abdalla. Assistant Lecturer Software Engineering Department Koya University

Logic Design First Stage Lecture No.6 Boolean Algebra Bawar Abid Abdalla Assistant Lecturer Software Engineering Department Koya University Outlines Boolean Operations Laws of Boolean Algebra Rules of

More information

### CprE 281: Digital Logic

CprE 28: Digital Logic Instructor: Alexander Stoytchev http://www.ece.iastate.edu/~alexs/classes/ Minimization CprE 28: Digital Logic Iowa State University, Ames, IA Copyright Alexander Stoytchev Administrative

More information

### EEE130 Digital Electronics I Lecture #4_1

EEE130 Digital Electronics I Lecture #4_1 - Boolean Algebra and Logic Simplification - By Dr. Shahrel A. Suandi 4-6 Standard Forms of Boolean Expressions There are two standard forms: Sum-of-products form

More information

### Boolean Analysis of Logic Circuits

Course: B.Sc. Applied Physical Science (Computer Science) Year & Sem.: IInd Year, Sem - IIIrd Subject: Computer Science Paper No.: IX Paper Title: Computer System Architecture Lecture No.: 7 Lecture Title:

More information

### Digital Logic Design (3)

Digital Logic Design (3) ENGG1015 1 st Semester, 2010 Dr. Kenneth Wong Dr. Hayden So Department of Electrical and Electronic Engineering Last lecture ll logic functions can be represented as (1) truth

More information

### University of Technology

University of Technology Lecturer: Dr. Sinan Majid Course Title: microprocessors 4 th year Lecture 5 & 6 Minimization with Karnaugh Maps Karnaugh maps lternate way of representing oolean function ll rows

More information

### Slide Set 5. for ENEL 353 Fall Steve Norman, PhD, PEng. Electrical & Computer Engineering Schulich School of Engineering University of Calgary

Slide Set 5 for ENEL 353 Fall 207 Steve Norman, PhD, PEng Electrical & Computer Engineering Schulich School of Engineering University of Calgary Fall Term, 207 SN s ENEL 353 Fall 207 Slide Set 5 slide

More information

### Points Addressed in this Lecture. Standard form of Boolean Expressions. Lecture 4: Logic Simplication & Karnaugh Map

Points Addressed in this Lecture Lecture 4: Logic Simplication & Karnaugh Map Professor Peter Cheung Department of EEE, Imperial College London Standard form of Boolean Expressions Sum-of-Products (SOP),

More information

### LSN 4 Boolean Algebra & Logic Simplification. ECT 224 Digital Computer Fundamentals. Department of Engineering Technology

LSN 4 Boolean Algebra & Logic Simplification Department of Engineering Technology LSN 4 Key Terms Variable: a symbol used to represent a logic quantity Compliment: the inverse of a variable Literal: a

More information

### Announcements. Chapter 2 - Part 1 1

Announcements If you haven t shown the grader your proof of prerequisite, please do so by 11:59 pm on 09/05/2018 (Wednesday). I will drop students that do not show us the prerequisite proof after this

More information

### 2.6 BOOLEAN FUNCTIONS

2.6 BOOLEAN FUNCTIONS Binary variables have two values, either 0 or 1. A Boolean function is an expression formed with binary variables, the two binary operators AND and OR, one unary operator NOT, parentheses

More information

### Digital Logic Lecture 7 Gate Level Minimization

Digital Logic Lecture 7 Gate Level Minimization By Ghada Al-Mashaqbeh The Hashemite University Computer Engineering Department Outline Introduction. K-map principles. Simplification using K-maps. Don t-care

More information

### Lecture 7 Logic Simplification

Lecture 7 Logic Simplification Simplification Using oolean lgebra simplified oolean expression uses the fewest gates possible to implement a given expression. +(+)+(+) Simplification Using oolean lgebra

More information

### Date Performed: Marks Obtained: /10. Group Members (ID):. Experiment # 04. Boolean Expression Simplification and Implementation

Name: Instructor: Engr. Date Performed: Marks Obtained: /10 Group Members (ID):. Checked By: Date: Experiment # 04 Boolean Expression Simplification and Implementation OBJECTIVES: To understand the utilization

More information

### Specifying logic functions

CSE4: Components and Design Techniques for Digital Systems Specifying logic functions Instructor: Mohsen Imani Slides from: Prof.Tajana Simunic and Dr.Pietro Mercati We have seen various concepts: Last

More information

### Simplification of Boolean Functions

COM111 Introduction to Computer Engineering (Fall 2006-2007) NOTES 5 -- page 1 of 5 Introduction Simplification of Boolean Functions You already know one method for simplifying Boolean expressions: Boolean

More information

### ENGIN 112 Intro to Electrical and Computer Engineering

ENGIN 2 Intro to Electrical and Computer Engineering Lecture 8 Minimization with Karnaugh Maps Overview K-maps: an alternate approach to representing oolean functions K-map representation can be used to

More information

### IT 201 Digital System Design Module II Notes

IT 201 Digital System Design Module II Notes BOOLEAN OPERATIONS AND EXPRESSIONS Variable, complement, and literal are terms used in Boolean algebra. A variable is a symbol used to represent a logical quantity.

More information

### Module -7. Karnaugh Maps

1 Module -7 Karnaugh Maps 1. Introduction 2. Canonical and Standard forms 2.1 Minterms 2.2 Maxterms 2.3 Canonical Sum of Product or Sum-of-Minterms (SOM) 2.4 Canonical product of sum or Product-of-Maxterms(POM)

More information

### Combinational Logic Circuits

Chapter 3 Combinational Logic Circuits 12 Hours 24 Marks 3.1 Standard representation for logical functions Boolean expressions / logic expressions / logical functions are expressed in terms of logical

More information

### Chapter 2 Combinational Logic Circuits

Logic and Computer Design Fundamentals Chapter 2 Combinational Logic Circuits Part 2 Circuit Optimization Overview Part Gate Circuits and Boolean Equations Binary Logic and Gates Boolean Algebra Standard

More information

### Lecture 22: Implementing Combinational Logic

8 Lecture 22: Implementing ombinational Logic S 5 L22 James. Hoe Dept of EE, MU April 9, 25 Today s Goal: Design some combinational logic circuits Announcements: Read Rizzoni 2.4 and 2.5 HW 8 due today

More information

### ENGIN 112. Intro to Electrical and Computer Engineering

ENIN 2 Intro to Electrical and Computer Engineering Lecture 6 More Boolean Algebra ENIN2 L6: More Boolean Algebra September 5, 23 A B Overview Epressing Boolean functions Relationships between algebraic

More information

### 2/8/2017. SOP Form Gives Good Performance. ECE 120: Introduction to Computing. K-Maps Can Identify Single-Gate Functions

University of Illinois at Urbana-Champaign Dept. of Electrical and Computer Engineering ECE 120: Introduction to Computing Two-Level Logic SOP Form Gives Good Performance s you know, one can use a K-map

More information

### CHAPTER-2 STRUCTURE OF BOOLEAN FUNCTION USING GATES, K-Map and Quine-McCluskey

CHAPTER-2 STRUCTURE OF BOOLEAN FUNCTION USING GATES, K-Map and Quine-McCluskey 2. Introduction Logic gates are connected together to produce a specified output for certain specified combinations of input

More information

### (Refer Slide Time 6:48)

Digital Circuits and Systems Prof. S. Srinivasan Department of Electrical Engineering Indian Institute of Technology Madras Lecture - 8 Karnaugh Map Minimization using Maxterms We have been taking about

More information

### Basic circuit analysis and design. Circuit analysis. Write algebraic expressions or make a truth table

Basic circuit analysis and design Circuit analysis Circuit analysis involves figuring out what some circuit does. Every circuit computes some function, which can be described with Boolean expressions or

More information

### Objectives: 1. Design procedure. 2. Fundamental circuits. 1. Design procedure

Objectives: 1. Design procedure. 2. undamental circuits. 1. Design procedure Design procedure has five steps: o Specification. o ormulation. o Optimization. o Technology mapping. o Verification. Specification:

More information

### Experiment 4 Boolean Functions Implementation

Experiment 4 Boolean Functions Implementation Introduction: Generally you will find that the basic logic functions AND, OR, NAND, NOR, and NOT are not sufficient to implement complex digital logic functions.

More information

### Summary. Boolean Addition

Summary Boolean Addition In Boolean algebra, a variable is a symbol used to represent an action, a condition, or data. A single variable can only have a value of or 0. The complement represents the inverse

More information

### Slides for Lecture 15

Slides for Lecture 5 ENEL 353: Digital Circuits Fall 203 Term Steve Norman, PhD, PEng Electrical & Computer Engineering Schulich School of Engineering University of Calgary October, 203 ENEL 353 F3 Section

More information

### Chapter 2 Combinational Logic Circuits

Logic and Computer Design Fundamentals Chapter 2 Combinational Logic Circuits Part 2 Circuit Optimization Charles Kime & Thomas Kaminski 2008 Pearson Education, Inc. (Hyperlinks are active in View Show

More information

### ELCT201: DIGITAL LOGIC DESIGN

ELCT201: DIGITAL LOGIC DESIGN Dr. Eng. Haitham Omran, haitham.omran@guc.edu.eg Dr. Eng. Wassim Alexan, wassim.joseph@guc.edu.eg Lecture 3 Following the slides of Dr. Ahmed H. Madian ذو الحجة 1438 ه Winter

More information

### Learning Objectives: Topic Karnaugh Maps. At the end of this topic you will be able to;

Topic.2.3 Karnaugh Maps Learning Objectives: t the end of this topic you will be able to; Draw a Karnaugh map for a logic system with up to four inputs and use it to minimise the number of gates required;

More information

### Combinational Logic Circuits Part III -Theoretical Foundations

Combinational Logic Circuits Part III -Theoretical Foundations Overview Simplifying Boolean Functions Algebraic Manipulation Karnaugh Map Manipulation (simplifying functions of 2, 3, 4 variables) Systematic

More information

### A B AB CD Objectives:

Objectives:. Four variables maps. 2. Simplification using prime implicants. 3. "on t care" conditions. 4. Summary.. Four variables Karnaugh maps Minterms A A m m m3 m2 A B C m4 C A B C m2 m8 C C m5 C m3

More information

### DKT 122/3 DIGITAL SYSTEM 1

Company LOGO DKT 122/3 DIGITAL SYSTEM 1 BOOLEAN ALGEBRA (PART 2) Boolean Algebra Contents Boolean Operations & Expression Laws & Rules of Boolean algebra DeMorgan s Theorems Boolean analysis of logic circuits

More information

### Chapter 2. Boolean Expressions:

Chapter 2 Boolean Expressions: A Boolean expression or a function is an expression which consists of binary variables joined by the Boolean connectives AND and OR along with NOT operation. Any Boolean

More information

### Midterm Exam Review. CS 2420 :: Fall 2016 Molly O'Neil

Midterm Exam Review CS 2420 :: Fall 2016 Molly O'Neil Midterm Exam Thursday, October 20 In class, pencil & paper exam Closed book, closed notes, no cell phones or calculators, clean desk 20% of your final

More information

### ece5745-pla-notes.txt

ece5745-pla-notes.txt ========================================================================== Follow up on PAL/PROM/PLA Activity ==========================================================================

More information

### Digital Logic Design (CEN-120) (3+1)

Digital Logic Design (CEN-120) (3+1) ASSISTANT PROFESSOR Engr. Syed Rizwan Ali, MS(CAAD)UK, PDG(CS)UK, PGD(PM)IR, BS(CE)PK HEC Certified Master Trainer (MT-FPDP) PEC Certified Professional Engineer (COM/2531)

More information

### Karnaugh Map (K-Map) Karnaugh Map. Karnaugh Map Examples. Ch. 2.4 Ch. 2.5 Simplification using K-map

Karnaugh Map (K-Map) Ch. 2.4 Ch. 2.5 Simplification using K-map A graphical map method to simplify Boolean function up to 6 variables A diagram made up of squares Each square represents one minterm (or

More information

### 4 KARNAUGH MAP MINIMIZATION

4 KARNAUGH MAP MINIMIZATION A Karnaugh map provides a systematic method for simplifying Boolean expressions and, if properly used, will produce the simplest SOP or POS expression possible, known as the

More information

### Computer Organization and Levels of Abstraction

Computer Organization and Levels of Abstraction Announcements PS8 Due today PS9 Due July 22 Sound Lab tonight bring machines and headphones! Binary Search Today Review of binary floating point notation

More information

### (Refer Slide Time 3:31)

Digital Circuits and Systems Prof. S. Srinivasan Department of Electrical Engineering Indian Institute of Technology Madras Lecture - 5 Logic Simplification In the last lecture we talked about logic functions

More information

### Combinational Circuits Digital Logic (Materials taken primarily from:

Combinational Circuits Digital Logic (Materials taken primarily from: http://www.facstaff.bucknell.edu/mastascu/elessonshtml/eeindex.html http://www.cs.princeton.edu/~cos126 ) Digital Systems What is a

More information

### Gate Level Minimization Map Method

Gate Level Minimization Map Method Complexity of hardware implementation is directly related to the complexity of the algebraic expression Truth table representation of a function is unique Algebraically

More information

### Review: Standard forms of expressions

Karnaugh maps Last time we saw applications of Boolean logic to circuit design. The basic Boolean operations are AND, OR and NOT. These operations can be combined to form complex expressions, which can

More information

### ENEL 353: Digital Circuits Midterm Examination

NAME: SECTION: L01: Norm Bartley, ST 143 L02: Steve Norman, ST 145 When you start the test, please repeat your name and section, and add your U of C ID number at the bottom of the last page. Instructions:

More information

### Assignment (3-6) Boolean Algebra and Logic Simplification - General Questions

Assignment (3-6) Boolean Algebra and Logic Simplification - General Questions 1. Convert the following SOP expression to an equivalent POS expression. 2. Determine the values of A, B, C, and D that make

More information

Get Free notes at Module-I One s Complement: Complement all the bits.i.e. makes all 1s as 0s and all 0s as 1s Two s Complement: One s complement+1 SIGNED BINARY NUMBERS Positive integers (including zero)

More information

### CS8803: Advanced Digital Design for Embedded Hardware

CS883: Advanced Digital Design for Embedded Hardware Lecture 2: Boolean Algebra, Gate Network, and Combinational Blocks Instructor: Sung Kyu Lim (limsk@ece.gatech.edu) Website: http://users.ece.gatech.edu/limsk/course/cs883

More information

### Chapter 2 Part 4 Combinational Logic Circuits

University of Wisconsin - Madison EE/omp Sci 352 Digital Systems undamentals Kewal K. Saluja and Yu Hen Hu Spring 2002 hapter 2 Part 4 ombinational Logic ircuits Originals by: harles R. Kime and Tom Kamisnski

More information

### Simplification of Boolean Functions

Simplification of Boolean Functions Contents: Why simplification? The Map Method Two, Three, Four and Five variable Maps. Simplification of two, three, four and five variable Boolean function by Map method.

More information

### Logic Design (Part 2) Combinational Logic Circuits (Chapter 3)

Digital Logic Circuits Logic Design (Part ) Combinational Logic Circuits (Chapter 3) ² We saw how we can build the simple logic gates using transistors ² Use these gates as building blocks to build more

More information

### Circuit analysis summary

Boolean Algebra Circuit analysis summary After finding the circuit inputs and outputs, you can come up with either an expression or a truth table to describe what the circuit does. You can easily convert

More information

### ELCT201: DIGITAL LOGIC DESIGN

ELCT201: DIGITAL LOGIC DESIGN Dr. Eng. Haitham Omran, haitham.omran@guc.edu.eg Dr. Eng. Wassim Alexan, wassim.joseph@guc.edu.eg Lecture 3 Following the slides of Dr. Ahmed H. Madian محرم 1439 ه Winter

More information

### Lecture 3: Binary Subtraction, Switching Algebra, Gates, and Algebraic Expressions

EE210: Switching Systems Lecture 3: Binary Subtraction, Switching Algebra, Gates, and Algebraic Expressions Prof. YingLi Tian Feb. 5/7, 2019 Department of Electrical Engineering The City College of New

More information

### Standard Boolean Forms

Standard Boolean Forms In this section, we develop the idea of standard forms of Boolean expressions. In part, these forms are based on some standard Boolean simplification rules. Standard forms are either

More information

### Chapter 2 Combinational

Computer Engineering 1 (ECE290) Chapter 2 Combinational Logic Circuits Part 2 Circuit Optimization HOANG Trang 2008 Pearson Education, Inc. Overview Part 1 Gate Circuits and Boolean Equations Binary Logic

More information

### S1 Teknik Telekomunikasi Fakultas Teknik Elektro FEH2H3 2016/2017

S1 Teknik Telekomunikasi Fakultas Teknik Elektro FEH2H3 2016/2017 Karnaugh Map Karnaugh maps Last time we saw applications of Boolean logic to circuit design. The basic Boolean operations are AND, OR and

More information

### (Refer Slide Time 5:19)

Digital Circuits and Systems Prof. S. Srinivasan Department of Electrical Engineering Indian Institute of Technology, Madras Lecture - 7 Logic Minimization using Karnaugh Maps In the last lecture we introduced

More information

### Digital Fundamentals

Digital Fundamentals Tenth Edition Floyd Chapter 3 Modified by Yuttapong Jiraraksopakun Floyd, Digital Fundamentals, th 28 Pearson Education ENE, KMUTT ed 29 The Inverter Summary The inverter performs

More information

### 5. Minimizing Circuits

5. MINIMIZING CIRCUITS 46 5. Minimizing Circuits 5.. Minimizing Circuits. A circuit is minimized if it is a sum-of-products that uses the least number of products of literals and each product contains

More information

### CSCI 220: Computer Architecture I Instructor: Pranava K. Jha. Simplification of Boolean Functions using a Karnaugh Map

CSCI 22: Computer Architecture I Instructor: Pranava K. Jha Simplification of Boolean Functions using a Karnaugh Map Q.. Plot the following Boolean function on a Karnaugh map: f(a, b, c, d) = m(, 2, 4,

More information

### ECE380 Digital Logic

ECE38 Digital Logic Optimized Implementation of Logic Functions: Strategy for Minimization, Minimum Product-of-Sums Forms, Incompletely Specified Functions Dr. D. J. Jackson Lecture 8- Terminology For

More information

### (Refer Slide Time: 1:43)

(Refer Slide Time: 1:43) Digital Circuits and Systems Prof. S. Srinivasan Department of Electrical Engineering Indian Institute of Technology, Madras Lecture - 27 Pattern Detector So, we talked about Moore

More information

### UNIT II. Circuit minimization

UNIT II Circuit minimization The complexity of the digital logic gates that implement a Boolean function is directly related to the complexity of the algebraic expression from which the function is implemented.

More information

### Chapter 3 Simplification of Boolean functions

3.1 Introduction Chapter 3 Simplification of Boolean functions In this chapter, we are going to discuss several methods for simplifying the Boolean function. What is the need for simplifying the Boolean

More information

### Chapter 2: Combinational Systems

Uchechukwu Ofoegbu Chapter 2: Combinational Systems Temple University Adapted from Alan Marcovitz s Introduction to Logic and Computer Design Riddle Four switches can be turned on or off. One is the switch

More information

### Introduction. The Quine-McCluskey Method Handout 5 January 24, CSEE E6861y Prof. Steven Nowick

CSEE E6861y Prof. Steven Nowick The Quine-McCluskey Method Handout 5 January 24, 2013 Introduction The Quine-McCluskey method is an exact algorithm which finds a minimum-cost sum-of-products implementation

More information

### Boolean Algebra & Digital Logic

Boolean Algebra & Digital Logic Boolean algebra was developed by the Englishman George Boole, who published the basic principles in the 1854 treatise An Investigation of the Laws of Thought on Which to

More information

### Identity. p ^ T p p _ F p. Idempotency. p _ p p p ^ p p. Associativity. (p _ q) _ r p _ (q _ r) (p ^ q) ^ r p ^ (q ^ r) Absorption

dam lank pring 27 E 3 Identity Pre-Lecture Problem Do it! Do it now! What are you waiting for?! Use Logical Equivalences to show!! \$! & & \$! p ^ T p p _ F p Domination p _ T T p ^ F F Idempotency p _ p

More information

### Lecture 4: Implementation AND, OR, NOT Gates and Complement

EE210: Switching Systems Lecture 4: Implementation AND, OR, NOT Gates and Complement Prof. YingLi Tian Feb. 13, 2018 Department of Electrical Engineering The City College of New York The City University

More information

### Presented By :- Alok Kumar Lecturer in ECE C.R.Polytechnic, Rohtak

Presented By :- Alok Kumar Lecturer in ECE C.R.Polytechnic, Rohtak Content - Introduction -2 Feature -3 Feature of BJT -4 TTL -5 MOS -6 CMOS -7 K- Map - Introduction Logic IC ASIC: Application Specific

More information

### Final Examination (Open Katz, asynchronous & test notes only, Calculators OK, 3 hours)

Your Name: UNIVERSITY OF CALIFORNIA AT BERKELEY BERKELEY DAVIS IRVINE LOS ANGELES RIVERSIDE SAN DIEGO SAN FRANCISCO Department of Electrical Engineering and Computer Sciences SANTA BARBARA SANTA CRUZ CS

More information

### To write Boolean functions in their standard Min and Max terms format. To simplify Boolean expressions using Karnaugh Map.

3.1 Objectives To write Boolean functions in their standard Min and Max terms format. To simplify Boolean expressions using. 3.2 Sum of Products & Product of Sums Any Boolean expression can be simplified

More information

### ADAPTIVE MAP FOR SIMPLIFYING BOOLEAN EXPRESSIONS

ABSTRACT ADAPTIVE MAP FOR SIMPLIFYING BOOLEAN EXPRESSIONS Dr. Mohammed H. AL-Jammas Department of Computer and Information Engineering, College of Electronics Engineering, University of Mosul, Mosul -

More information

### Ch. 5 : Boolean Algebra &

Ch. 5 : Boolean Algebra & Reduction elektronik@fisika.ui.ac.id Objectives Should able to: Write Boolean equations for combinational logic applications. Utilize Boolean algebra laws and rules for simplifying

More information

### Standard Forms of Expression. Minterms and Maxterms

Standard Forms of Expression Minterms and Maxterms Standard forms of expressions We can write expressions in many ways, but some ways are more useful than others A sum of products (SOP) expression contains:

More information

### 60-265: Winter ANSWERS Exercise 4 Combinational Circuit Design

60-265: Winter 2010 Computer Architecture I: Digital Design ANSWERS Exercise 4 Combinational Circuit Design Question 1. One-bit Comparator [ 1 mark ] Consider two 1-bit inputs, A and B. If we assume that

More information

### Lecture 6: Signed Numbers & Arithmetic Circuits. BCD (Binary Coded Decimal) Points Addressed in this Lecture

Points ddressed in this Lecture Lecture 6: Signed Numbers rithmetic Circuits Professor Peter Cheung Department of EEE, Imperial College London (Floyd 2.5-2.7, 6.1-6.7) (Tocci 6.1-6.11, 9.1-9.2, 9.4) Representing

More information

### 9/10/2016. ECE 120: Introduction to Computing. The Domain of a Boolean Function is a Hypercube. List All Implicants for One Variable A

University of Illinois at Urbana-Champaign Dept. of Electrical and Computer Engineering ECE 120: Introduction to Computing To Simplify, Write Function as a Sum of Prime Implicants One way to simplify a

More information

### Combinational Devices and Boolean Algebra

Combinational Devices and Boolean Algebra Silvina Hanono Wachman M.I.T. L02-1 6004.mit.edu Home: Announcements, course staff Course information: Lecture and recitation times and locations Course materials

More information

### ECE260B CSE241A Winter Logic Synthesis

ECE260B CSE241A Winter 2007 Logic Synthesis Website: /courses/ece260b-w07 ECE 260B CSE 241A Static Timing Analysis 1 Slides courtesy of Dr. Cho Moon Introduction Why logic synthesis? Ubiquitous used almost

More information

### Philadelphia University Student Name: Student Number:

Philadelphia University Student Name: Student Number: Faculty of Engineering Serial Number: Final Exam, First Semester: 2018/2019 Dept. of Computer Engineering Course Title: Logic Circuits Date: 03/01/2019

More information

### Incompletely Specified Functions with Don t Cares 2-Level Transformation Review Boolean Cube Karnaugh-Map Representation and Methods Examples

Lecture B: Logic Minimization Incompletely Specified Functions with Don t Cares 2-Level Transformation Review Boolean Cube Karnaugh-Map Representation and Methods Examples Incompletely specified functions

More information

### Experiment 3: Logic Simplification

Module: Logic Design Name:... University no:.. Group no:. Lab Partner Name: Mr. Mohamed El-Saied Experiment : Logic Simplification Objective: How to implement and verify the operation of the logical functions

More information

### Chapter 6 Selected Design Topics

Logic and Computer Design Fundamentals Chapter 6 Selected Design Topics Part 4 Programmable Implementation Technologies Charles Kime & Thomas Kaminski 2008 Pearson Education, Inc. (Hyperlinks are active

More information

### Combinational Logic Circuits

Chapter 2 Combinational Logic Circuits J.J. Shann (Slightly trimmed by C.P. Chung) Chapter Overview 2-1 Binary Logic and Gates 2-2 Boolean Algebra 2-3 Standard Forms 2-4 Two-Level Circuit Optimization

More information

### Binary Adders: Half Adders and Full Adders

Binary Adders: Half Adders and Full Adders In this set of slides, we present the two basic types of adders: 1. Half adders, and 2. Full adders. Each type of adder functions to add two binary bits. In order

More information

### MUX using Tri-State Buffers. Chapter 2 - Part 2 1

MUX using Tri-State Buffers Chapter 2 - Part 2 Systematic Simplification A Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle

More information

### Lecture 5. Chapter 2: Sections 4-7

Lecture 5 Chapter 2: Sections 4-7 Outline Boolean Functions What are Canonical Forms? Minterms and Maxterms Index Representation of Minterms and Maxterms Sum-of-Minterm (SOM) Representations Product-of-Maxterm

More information

### Section 001. Read this before starting! You may use one sheet of scrap paper that you will turn in with your test.

Points missed: Student's Name: Total score: /100 points East Tennessee State University Department of Computer and Information Sciences CSCI 2150 (Tarnoff) Computer Organization TEST 1 for Fall Semester,

More information

### A graphical method of simplifying logic

4-5 Karnaugh Map Method A graphical method of simplifying logic equations or truth tables. Also called a K map. Theoretically can be used for any number of input variables, but practically limited to 5

More information

### Boolean algebra. June 17, Howard Huang 1

Boolean algebra Yesterday we talked about how analog voltages can represent the logical values true and false. We introduced the basic Boolean operations AND, OR and NOT, which can be implemented in hardware

More information

### Logic and Computer Design Fundamentals. Chapter 2 Combinational Logic Circuits. Part 3 Additional Gates and Circuits

Logic and Computer Design Fundamentals Chapter 2 Combinational Logic Circuits Part 3 Additional Gates and Circuits Charles Kime & Thomas Kaminski 28 Pearson Education, Inc. (Hyperlinks are active in View

More information

### 24 Nov Boolean Operations. Boolean Algebra. Boolean Functions and Expressions. Boolean Functions and Expressions

24 Nov 25 Boolean Algebra Boolean algebra provides the operations and the rules for working with the set {, }. These are the rules that underlie electronic circuits, and the methods we will discuss are

More information

### Switching Circuits & Logic Design

Switching Circuits & Logic Design Jie-Hong Roland Jiang 江介宏 Department of Electrical Engineering National Taiwan University Fall 23 5 Karnaugh Maps K-map Walks and Gray Codes http://asicdigitaldesign.wordpress.com/28/9/26/k-maps-walks-and-gray-codes/

More information

### 1. Mark the correct statement(s)

1. Mark the correct statement(s) 1.1 A theorem in Boolean algebra: a) Can easily be proved by e.g. logic induction b) Is a logical statement that is assumed to be true, c) Can be contradicted by another

More information