CSCI 402: Computer Architectures. Instructions: Language of the Computer (3) Fengguang Song Department of Computer & Information Science IUPUI.

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1 CSCI 402: Computer Architectures Instructions: Language of the Computer (3) Fengguang Song Department of Computer & Information Science IUPUI Recall Big endian, little endian Memory alignment Unsigned and signed integer representation 2s-complement: -x = x + 1 Sign extension (when copying to a longer register) R-format, I-format MIPS instructions A fixed size of 32 bits, or 4 bytes, or 1 word Bit-wise shift and logical operations Bitwise operations are common programming techniques 2 1

2 MIPS I-format Instructions op rs rt constant or offset address 6 bits 5 bits 5 bits 16 bits Immediate arithmetic operations Load/store operations rt: register number lw/sw $rt, 64($rs) Range of constants: 2 15 to Address: offset added to base address in rs Q: What part in the format would change if we increase #registers? addi $rt, $rs, 80 op rs rt rd shamt funct 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits 3 Instruction Encoding: MIPS Instruction Examples $t0 $t7: reg s 8 15 $t8 $t9: $s0 $s7: reg s A few examples that can help you understand the format. 4 2

3 2/1/18 op rs rt rd shamt funct 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits Registers MIPS bit GPRs (int registers) bit fp registers (dual use) R0=0 Additional special purpose registers Data types 8-bit byte 2 bytes = half word 4 bytes = word 8 bytes = dword Addressing modes Immediate and displacement register indirect and absolute are easily represented Byte addressable 64-bit address Big or littleendian Load/store architecture 5 tions 16 bits immediate words, words, dwords We ve seen arithmetic operations, bit-wise logical operations, and load/store. -They are computation-related code: a+b, a-b, a&b But how to support conditional statements in hardware? if ( ) { } else { } while() { } for(;;) { } How to support procedure calling in hardware? int main() { foo(); bar(); } foo() { do sth; return; } 8 ctions 3

4 How to Support Conditional Statements in the Hardware An example of C code: 5 variables int i, j; int f, g, h; if (i == j) { f = g + h; } else { f = g - h; } beq $s1, $s2, Label bne $s1, $s2, Label 9 Revisit the I-format Instructions op rs rt constant or offset address 6 bits 5 bits 5 bits 16 bits 1. Immediate arithmetic Range of constant: 2 15 to addi $s0, $s1, 80 lw/sw $s0, 64($s1) 3 rd type of usage 2. Load/store instructions rt: the destination register (for load) The offset address will be added to base address in rs Range of offset address: 2 15 to

5 beq $s1, $s2, Label bne $s1, $s2, Label Conditional Instructions instruction address op rs rt Address 6 bits 5 bits 5 bits 16 bits It is an I-format instruction Branch to a labeled instruction if condition is true Otherwise, execute the next instruction beq rs, rt, L1 if (rs == rt) branch to instruction labeled L1; bne rs, rt, L1 if (rs!= rt) branch to instruction labeled L1; 11 Compiling if Statements Previous C code: if (i==j) f = g+h; else f = g-h; i, j in $s3, $s4 f, g, h, in $s0, $s1, $s2, The compiled MIPS code: beq $s3, $s4, Then sub $s0, $s1, $s2 j Exit Then: add $s0, $s1, $s2 Exit: //f=g-h //f=g+h Assembler calculates the correct addresses 12 5

6 C code: Compiling a Loop $s3 $s6 $s5 while (array[i] == k) i += 1; array stores an array of words The compiled MIPS code: Loop: sll $t1, $s3, 2 //$t1 = i<<2 add $t1, $t1, $s6 //$t1 = array+ix4 lw $t0, 0($t1) //$t0 = array[i] bne $t0, $s5, Exit //check the condition addi $s3, $s3, 1 // i += 1; j Loop Exit: 13 Basic Blocks A basic block is a sequence of instructions with 1 entry point and 1 exit point. No embedded branches (except at end) That is, 1 exit point No branch targets (except at beginning) That is, 1 entry point n n A compiler identifies basic blocks for optimization An advanced processor can accelerate execution of basic blocks 14 6

7 Other Conditional Operations What about if (a<b)? In addition to: beq, bne slt rd, rs, rt Set result to 1 if the condition is true - Otherwise, set result to 0 - R type if (rs < rt) rd = 1; else rd = 0; slti rt, rs, constant if (rs < constant) rt = 1; else rt = 0; Use slt in combination with bne or beq slt $t0, $s1, $s2 # if ($s1 < $s2) bne $t0, $zero, L # branch to L 15 Branch Instruction Design beq, bne, but why not design blt, bge, etc? Reason: Hardware for <,, slower than =, So, if combine comparison with branch à involves more work per instruction à require a slower clock (then all following instructions penalized) Also, both slt and bne are common cases Two faster instructions are more useful than one slower instruction 16 7

8 Subtle Issues of Slt Q: 1xxxxxxx 2 vs 0xxxxxxx 2, which is it bigger? I don t know For signed integer comparison: slt, slti But, unsigned integer comparison: sltu, sltui For example: $s0 = $s1 = slt $t0, $s0, $s1 # signed integer 1 < +1 Þ $t0 = 1 sltu $t0, $s0, $s1 # unsigned integer +4,294,967,295 > +1 Þ $t0 = 0 17 Procedure Calling Procedure is used to structure programs Each procedure performs a specific task Works like a black box 6 Steps required to execute a procedure 1. Place parameters in registers 2. Transfer control to procedure 3. Allocate storage for procedure 4. Perform procedure s operations 5. Place result in register for caller 6. Return to place of call Caller vs Callee 18 8

9 Convention to Allocate Registers $a0 $a3: arguments (reg s 4 7) $v0, $v1: result values (reg s 2 and 3) $t0 $t9: temporaries OK to be overwritten by callee $s0 $s7: Saved to stack Must be saved/restored by callee $sp: stack pointer (reg 29) $fp: frame pointer (reg 30) $ra: return address (reg 31) low high 19 Procedure Call Instructions Procedure call: jump-and-link jal ProcedureName Puts address of the following instruction into $ra i.e., PC+4 Jump to target address Similar to a j(ump) instruction Procedure return: jump-register jr $ra Copies $ra to PC main: foo() foo: 22 9

10 Leaf Procedure Example A procedure that doesn t call others C code: int leaf_function (int g, h, i, j) { int f; f = (g + h) - (i + j); return f; } Arguments g, h, i, j are stored in $a0,, $a3 f uses $s0 (hence, need to save&restore $s0 on stack) Result in $v0 23 Leaf Procedure Example MIPS code: leaf_example: addi $sp, $sp, -4 sw $s0, 0($sp) add $t0, $a0, $a1 add $t1, $a2, $a3 sub $s0, $t0, $t1 add $v0, $s0, $zero lw $s0, 0($sp) addi $sp, $sp, 4 jr $ra Save $s0 on stack top low Procedure body Store result value Restore $s0 Return 24 high 10

11 Leaf Procedure Example MIPS code: leaf_example: addi $sp, $sp, -4 sw $s0, 0($sp) add $t0, $a0, $a1 add $t1, $a2, $a3 sub $s0, $t0, $t1 add $v0, $s0, $zero lw $s0, 0($sp) addi $sp, $sp, 4 jr $ra Save $s0 on stack top low Procedure body Store result value Restore $s0 Return 25 high Leaf Procedure Example MIPS code: leaf_example: addi $sp, $sp, -4 sw $s0, 0($sp) add $t0, $a0, $a1 add $t1, $a2, $a3 sub $s0, $t0, $t1 add $v0, $s0, $zero lw $s0, 0($sp) addi $sp, $sp, 4 jr $ra Save $s0 on stack top low Procedure body Store result value Restore $s0 Return 26 high 11

12 Non-Leaf Procedures Procedures that call other procedures For the special nested call, caller needs to save the following (on the stack): 1. Any arguments and temporaries needed after the call 2. Its return address (i.e., $ra=pc+4) Restore them from the stack after the call 27 Nested-Call Example Recursive C code: int fact (int n) { //compute n! if (n < 1) {//fact(0) = 1. return 1; } else { return n * fact(n - 1); } } Argument n in $a0 Result in $v

13 Non-Leaf Procedure Example MIPS code: fact: addi $sp, $sp, -8 # adjust stack for 2 items sw $ra, 4($sp) # push return address sw $a0, 0($sp) # push argument n slti $t0, $a0, 1 # test for n < 1 beq $t0, $zero, L1 addi $v0, $zero, 1 # if n<1, result is 1 addi $sp, $sp, 8 # pop 2 items from stack jr $ra # and return L1: addi $a0, $a0, -1 # if n >= 1, jal fact # recursive call lw $a0, 0($sp) # restore original n lw $ra, 4($sp) # restore return address main() { int n = 10; fact(n); printf(n); } 0 ->lw $a0 ->lw $a0 addi $sp, $sp, 8 # pop 2 items from stack mul $v0, $a0, $v0 # multiply to get result n jr $ra # and return main n-1 29 Byte and Halfword Operations MIPS has byte and halfword instructions 8 bits: 16 bits: lb rt, offset(rs) lh rt, offset(rs) Sign bit will extend to 32 bits in rt lbu rt, offset(rs) lhu rt, offset(rs) Zero will extend to 32 bits in rt sb rt, offset(rs) sh rt, offset(rs) Store just rightmost byte or halfword 32 13

14 32-bit constants Right now a constant has 16 bits If your code uses a constant that requires 32 bits, how to support it? E.g., b = a + 0x00_61_23_04 //addi cannot do it! Need lui and ori instructions to place the number to a register (see next slide) Then call add 33 Issue: How to Read 32-bit Constants and Addresses? I-format instructions: only 16 bits are used for constant To support occasional 32-bit constant? lui rt, constant //load upper immediate Copies a 16-bit constant to the left 16 bits of rt Clears right 16 bits of rt to 0 lui $s0, 0x0061 ori $s0, $s0, 0x

15 Homework 2 Book exercises: 2.4, 2.13, , 2.38, 2.41, 2.47 Due in two weeks Assigned on Feb 1, Thursday Due time: at 11:59:59pm on Feb 14, Wednesday night Submit an electronic copy to TA via Canvas No late submission is accepted 35 15