ECE20B, Spring Final Exam lab questions.

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1 EE2B, pring 22. Final Exam lab questions.. (6 pts. total) Use Figure to answer the following questions: f a) b) f V in s V I in I I f Vout s I in V I I f Vout I V V in I V c) d) V I V out V in V V power V out V in I V V 2 Figure. V power a) (2 point) What circuit is a noninverting amplifier? (a) (b) (c) (d) b) (2 point) What circuit is a unity gain buffer? (a) (b) (c) (d) c) (2 points) What circuit cannot be analyzed by using virtual short assumption? (a) (b) (c) (d) d) (2 points) What circuit can be described by the following expression between V out and V in : V out /V in = f / s? (a) (b) (c) (d) e) (2 points) What is the threshold voltage V for the circuit in Figure d) if V power =, =2Ω and 2 =3Ω. a) 2V b) V c) V d) 2V f) (6 points) erive the expression for V out as a function of V in for the operational amplifier circuit shown in Figure 2 below. f s V s V in V B Figure 2. V out Final Exam lab questions EE2B /4

2 2. ( pts. total) For the circuit similar to the robot restart circuit (shown in Figure 3) answer the following questions: a) (2 points) What current goes through 3 when the eset switch is open and 3=kΩ? (a).5m (b) infinity (c) (d) undefined b) (2 points) What is an input impedance of a NN gate? (a) (b) infinity (c) undefined (d) c) (6 points) raw timing diagrams in Figure 3 when the reset button is open (panels BE) and closed (bottom panel E). learly mark maximum and minimum voltages in each panel. The switching point of the NN gate is 2.. B 2 E 2 eset 3 B E E (eset closed) Figure 3. Final Exam lab questions EE2B 2/4

3 3. (4 pts. total) For the flipflops circuit shown in Figure 4 answer the following questions (note that the second flipflop is negative edge triggered): a) (2 points) What Boolean relationship correctly describes the logic gate used in Figure 4? (a) B (b) B c) B d) B b) (2 points) When will the second flipflop update its output? (a) When the input is changed. (b) When the clock value changes from high to low. (c) When the clock value changes from low to high. (d) Never. c) ( points) omplete the timing diagram for the circuit. The initial states of the flipflops and input waveforms are shown in Figure 4 below. lock lock Figure 4. Final Exam lab questions EE2B 3/4

4 4. ( pts. total) Memory system & programming of the robot: a) (2 points) uppose instructions in our robot are stored on a chip with 4 input memory (data) lines and 9 address lines from the counter. What is the total size (number of bits stored) in our memory? (a) 256 (b) 52 (c) 24 (d) 248 b) ( point) What is the maximum number of different instructions in the robot with 4 input memory lines? (a) 8 (b) 6 (c) 32 (d) 64 c) ( point) How many different instructions did the robot have in the actual lab? (a) 5 (b) 6 (c) 7 (d) 8 d) (2 points) Estimate how long the single complete program for the above robot with 4 input memory lines and 9 address lines will run if we assume a clock frequency of 2Hz. (a) 64s (b) 28s (c) 256s (d) 52s e) (4 points) escribe what you did in the lab to program the reset counter command. How can you reset the counter manually? How can you program the pause command? Final Exam lab questions EE2B 4/4

5 EE2B Final Exam, Point Exam losed Book, losed Notes, alculators Not llowed June 2th, 22 Name Guidelines: Place your name at the upper righthand corner of every page you turn in. Please use your own paper or examination book. Number your problems clearly. ou must turn in the exam sheets as well as your answers. Please do not write in the following box. This will be used by the graders to record their scores. Prob core Prob core Prob core (8 points) ssume that you are given a Boolean function of three variables F(x,y,z). Five different ways in which you can write the same function are (i), (ii) ( ), (iii), (iv)( ), and (v) ( ). For the following questions, circle the correct answer. There is only one correct answer to each question. Each part is worth two points. (a) Which is the minimum sum of products form? (i) (ii) (iii) (iv) (v) (b) Which is the product of maxterms form? (i) (ii) (iii) (iv) (v) (c) Which is the minimum product of sums form? (i) (ii) (iii) (iv) (v) (d) Which is the sum of minterms form? (i) (ii) (iii) (iv) (v) 6. ( points) implify the expression B and implement it using only twoinput and threeinput NO gates. Hint: remember that a twoinput NO gate can be wired as an inverter. 7. The overall purpose of this problem is to design (and then draw) a circuit that compares two 4bit unsigned numbers and B and then compare their magnitudes. The circuit has one output, so that =if <Band =if B. (a) (8 points) First design (and draw) a threeinput majority function F (x, y, z). majority function is defined as a combinational circuit whose single output F output is equal to if the input variables have more s than s. The output F is zero otherwise. (b) ( points) Use 4 majority functions (and any additional gates you deem necessary) to implement (draw) the function. For purposes of brevity, you may represent the majority function as a box with three inputs (,, and ), and output F (see Figure 2). Hint: Note that the majority function is equivalent to the carry out function of a full adder. The truth table is the same for both. 8. ( points) omplete the timing diagram displayed in Figure 5 for the Masterlave flipflop. Pay careful attention to the placement of the inverters with respect to the control inputs of the two latches. ou may assume that = =when the simulation begins. Note that the two boxes in the Figure are latches. 9. ssume that you are given the state diagram shown in Figure 6. The state variables are and B, the input variable is and the output variable is. The goal of the problem will be to implement the circuit using two JK flipflops and dense encoding. (a) ( points) What is the corresponding state table? Include in your table the columns for J, K, J B,andK B.

6 (b) ( points) olve the resulting Boolean expressions for the flipflop inputs and the output, then draw the circuit. raw all feedback loops explicitly.. ( points) ssume that you wish to design a register that can perform the 4 functions shift up, shift down, clear and hold, using the two selection switches and as shown in the tale below. function shift up shift down. clear hold omplete the wiring of the bitslice and multiplexer shown in Figure 7. The truth table for the multiplexer is also given in the figure. Note that shiftup means that the outputs from the flipflops are shifted up the page after each clock cycle, while they are shifted down the page for the shift down operation.. ( points) ssume that you are given a 4bit register, a halfadder, and a type flip flop (see Figure 8) and that a 4bit binary number is initally loaded into the register. Wire the circuit so that after 4 clock cycles the twoscomplement of is calculated and placed in the register. The register is in (rightshift) serial mode for the duration of the 4 clock cycles. ou may add any additional gates that you deem necessary. emember to specify the initial state of the flipflip. 2. ssume that you are given a memory chip of size 28K 32. (a) (2 points) How many words of data may be stored in the chip? (b) (2 points) What is the word length (in bits and in bytes) for the chip? (c) (2 points) How many address lines are required for the chip? (d) (2 points) How many data input lines (and output lines) are there? (e) (2 points) what is the purpose of the chip select pin? (f) (5 points) ssume that the memory cells are arranged in a square so that twodimensional coincident decoding is used within the chip. s in the textbook, you may assume that memory cells corresponding to a single word are contained in one row. How many of the address lines are assigned to the row decoder, and how many are assigned to the column decoder? Be sure to justify your answer. 3. Now assume that you are given two memory chips of size 28K 32 (see Figure 9). ssume that each chip has input pins corresponding to datain (T) and address (), a single readnot write pin (/W ), and a single chipselect pin (). Each chip also has a set of dataout pins. (a) (6 points) Using the 2 chips and a to2 decoder, show how you would construct an effective memory chip of size 256K 32. (b) (6 points) Using the 2 chips, show how you would construct an effective memory chip of size 28K (6 points) ssume that you are given the state table shown in Figure. What is the corresponding lgorithmic tate Machine? Be sure to minimize the number of decision diamonds used in the diagram or points will be deducted. 5. Implement the lgorithmic tate Machine in Figure using onehot (one flipflop per state) encoding. (a) ( points) erive the Boolean expressions for (t ), B(t ), (t ),and as a function of, B,,, and. (b) (6 points) raw the circuit. oiu do not need to explicitly draw the feedback wiring, but be sure to clearly label all wires. 2

7 clock clock time Figure 5 Figure 6

8 i 4to MU orrespondence of multiplexer selection lines to input lines 2 3 i Input Line 2 3 i clock Figure 7 x y serial in 3 2 serial out H rightshift 4bit register initially loaded with through 3 Halfdder Truth Table x y Figure 8

9 28K x 32 to2 ecoder ecoder Truth Table input data lines T address lines chip select read / not write / W output data lines E 28K x 32 M chip to2 decoder with enable Figure 9 state state B B B B B B B B Figure majority function F Figure Figure 2