# Larger K-maps. So far we have only discussed 2 and 3-variable K-maps. We can now create a 4-variable map in the

Size: px
Start display at page:

Download "Larger K-maps. So far we have only discussed 2 and 3-variable K-maps. We can now create a 4-variable map in the"

Transcription

1 EET 3 Chapter 3 7/3/2 PAGE - 23 Larger K-maps The -variable K-map So ar we have only discussed 2 and 3-variable K-maps. We can now create a -variable map in the same way that we created the 3-variable K-map. This time both the columns and rows are headed by two variables. Each side will be set up such that only one variable will change between adjacent cells. Examine the -variable k-map to the right. Note that the cells are labeled with their min-term numbers (table row numbers). As the min-term count counts up, the count jumps rom row 2 to row then back to row 3. This can be veriied by noting the binary equivalent o each cell number as read rom the row and column headings. Cell 2 is the intersection o row and column creating 2, which is a binary 2. Cell is the intersection o row and column creating 2 which is a binary. ab cd The user should note that nothing else has changed. We will still group into groups o powers o two (, 2,, 8, 6, etc.) with the largest possible group in this -variable map at 6. Note in the igure to the let that i we roll this map into a cylinder along the vertical axis, we see that the let and right edges ( abcd,,, ) bd are still adjacent, just as with the 3-variable k-map. We can also roll the K-map into a cylinder along the horizontal axis and we can then see that the top and bottom edges are adjacent as well. This adjacency brings up some interesting grouping potential as is demonstrated by the ollowing examples. ab cd ( abcd,,, ) b

2 EET 3 Chapter 3 7/3/2 PAGE - 2 -variable SOP K-map examples -Variable K-Map Example (SOP): Problem Statement: Minimize the ollowing expression into an SOP expression: a, b,c,d m,,3,8,9, Due to the adjacency o the top and bottom edges, the ollowing groups: Groups (,,8,9) and (,3,9,) can be created and orm the minimized algebraic expression: ( a, b, c, d ) b c bd bd ab cd bc 2 3 It should be noted how one group shared part o the other group. -Variable K-map Example 2 (SOP): Problem Statement: Minimize the ollowing expression into an SOP expression: a, b, c, d m,2,6,8, ab cd bd 2 3 acd This example demonstrates that the cells in the our corners make up a group o our. The second group is obvious. The minimal answer is: ( abcd,,, ) bdacd

3 EET 3 Chapter 3 7/3/2 PAGE - 2 -Variable K-Map Example 3 (SOP) Problem Statement: Minimize the ollowing expression into a SOP expression: a, b, c, d m,,2,3,, 8,, cd ab The minimal solution is: ( a, b, c, d ) b d a b a c ac 2 3 ab bd -variable POS K-map examples -Variable K-Map Example (POS) Problem Statement: Minimize the ollowing expression into a POS expression: a, b, c, d m, 6, 2, Note that the given switching unction was a min-term list and we need a max-term list or a POS expression. So, the st thing to do is to convert the list to a max-term list. ab cd b 2 3 a, b, c, d m,6,2, M,,2,3,,7, 8, 9,,, 3, This example plots the max-terms o an expression and results in the indicated expression below. Careully note d the logic level o the resulting terms and how they were obtained. ( abcd,,, ) b d

4 EET 3 Chapter 3 7/3/2 PAGE Variable K-Map Example (POS) Problem Statement: Minimize the ollowing min-term list into a POS expression a,b,c,d,, m,2,, 7,9,,,3 Again, the provided unction was in min-term orm. It is necessary to convert it to a max-term list. : a,b,c,d M, 3,,6,8,2 m,2,, 7,9,,,3,, Remember that when you read o a Max- Term, you have to read it o like it was the inverse o a min-term. The minimum result is: d a c ( a, b, c, d ) a b a b d d a b d ab cd a c d 2 3 a b d

5 EET 3 Chapter 3 7/3/2 PAGE - 27 The Implicant, Prime Implicant (PI), and Essential Prime Implicant (EPI) Let s discuss a couple deinitions which will come in handy later. Implicant: Any product term (element) or group o terms. Prime Implicant (PI): Largest possible term, or group o product terms, that cannot be combined with any other product term to generate a term with ewer literals than the original term. Essential Prime Implicant (EPI): A Prime Implicant which must be in the inal minimal answer. It is ESSENTIAL to the answer Now that we have these deinitions, let s revisit the solution to a previous example: A,B,C BC BC A A B C This solution has two dierent answers. The st two terms are in both answers. They are Essential Prime Implicants (EPI) because they are ESSENTIAL TO THE ANSWER. The second two terms are Prime Implicants (PI). While one or the other is in a solution, they are NOT ESSENTIAL to any single answer. Thereore, each minimal solution will consist o two EPI s and one PI. This topic will end up being used in the Tabular Reduction Method discussed at the end o the chapter. While this is not a K-Map topic, these deinitions are best learned in a K-Map environment. So, let s look at a ew more K-maps and igure out what terms are PI s and what terms are EPI s.

6 EET 3 Chapter 3 7/3/2 PAGE - 28 Essential Prime Implicant Example Problem Statement: Determine which terms in the K-maps below are PI s and which are EPI s. abcd abcd epi epi's 2 3 ( abcd,,, ) bd abcd 2-epi's (,7,3,) (,) -pi 2 (,) 3 ( abcd,,, )bdabc ( abcd,,, ) bdacd Implicants (not Prime or Essential) It can be made part o a larger group abcd 2 3 EPI's I a '' were added here, it would be a IMPLICANT, but not 'PRIME' because it can be made "larger." I we were to group this term with minterm 2, then it would be an EPI.

7 EET 3 Chapter 3 7/3/2 PAGE - 29 Essential Prime Implicant Example 2 Problem Statement: Determine which terms in the solution below are EPI s and PI s: Two EPI s (2,6) and (8,9) Four PI s (9,3), (7,), (3,), and (6,7) Thus, this example has THREE dierent answers. PI acd EPI ab c abcd 2 3 Solution EPI ' s PI # ( a, b, c, d ) acd ab c acd bcd PI ' s EPI acd bcd cd ab PI abd EPI ab c 2 3 Solution #2 EPI ' s PI abc ( a, b, c, d ) acd ab c abd abc EPI acd PI ' s cd ab PI abd EPI ab c 2 3 Solution #3 EPI ' s ( a, b, c, d ) acd ab c abd bcd PI ' s EPI acd PI bcd a, b, c, d abc acd bcd acd abc abd bcd abd

8 EET 3 Chapter 3 7/3/2 PAGE - 3 Essential Prime Implicant Example 3 Problem Statement: Analyze the ollowing expression or PI s and EPI s. AB,C ABC, ABC ABC ABC A B C 3 A BC ( A, B, C ) AC AB BC A B C All our groups are Prime Implicant s because none o them can be combined with any other term to yield ewer literals. They are also all Essential because they each cover at least one " not covered by any other Prime Implicant. Since a term is always deined by its highest deinition, they are all designated as EPI s. They are ALL ESSENTIAL TO THE ANSWER.

9 EET 3 Chapter 3 7/3/2 PAGE - 3 The Circular unction and the Prime Implicant Let s look at a special unction known as a CIRCULAR Function. A circular unction is made up o only PI s. There are NO EPI s. Circular Function Example Problem Statement: Examine the ollowing K-maps to determine i the unction is CIRCULAR. AB CD 2 3 AB CD 2 3 This unction doesn t have any EPI s. Only 6 PI s: (,), (,), (,9),(,2), (9,3), (2,3)

10 EET 3 Chapter 3 7/3/2 PAGE - 32 The -variable K-map The -variable K-map is three dimensional! The irst 6 cells are in ront and the 2 nd 6 cells are in the back. Obviously we can t group things in the back hal because we can t see it. So we slide out the back hal and place it to the right o the ront hal. Note that the ront hal has the MSB o (A in this example) while the back hal has the MSB o ( A in this example). O course, i this was to be used or mapping zeros instead o ones, the A would be swapped with the A. This will be a lot clearer ater a ew examples. DE BC 2 3 A A

11 EET 3 Chapter 3 7/3/2 PAGE Variable K-Map Example (SOP): Problem Statement: Find the minimal SOP equation o the ollowing expression using a -variable k-map. A,B,C,D,E 3,2,26, 29 m 2, 3, 7,8,2,3,8,9,2 DE BC 2 3 DE BC /A /A The only thing which remains is to turn the result into Boolean variables. The process below is a method that I ind helpul in the larger problems. A,B, C,D,E 2,3,8,9 B C D 3, 7,9,23 BDE 8,2 A B D E 3,29 BCDE 2,26 A B C E B C D B D E A B D E B C D E A B C E Just to review, there are 3 EPI s and 2 PI s in this list. Question: Can you pick them out? PI s are (8, 2) and (2, 26)

12 EET 3 Chapter 3 7/3/2 PAGE - 3 -Variable K-Map Example 2 (POS): Problem Statement: Find the MINIMAL POS solution or the ollowing expression. A,B, C, D, E M,2,,8,,2,6,8,23 2,26,3, de bc 2 3 de bc /a /a,2,8,,6,8,2,26 C E 8, 2 A B D E 26,3 A B D E A B C D E 23 A B C D E A,B, C,D,E C EA B D EA B D E A B C D EA B C D E

13 EET 3 Chapter 3 7/3/2 PAGE - 3 The 6 variable K-map Just as there are variable K-maps, there are also 6 variable K-maps. They are xx three dimensional boxes and when expanded in the same manner as the variable K-map create our boxes, two above the other two. However, I ind that it is very easy to make a mistake with 6 variable K-maps. Thereore, I recommend that you use tabular reduction solution methods like Quine-McCluskey (discussed later) to simpliy expressions which contain 6 or more variables.

### Quine-McCluskey Algorithm

Quine-McCluskey Algorithm Useful for minimizing equations with more than 4 inputs. Like K-map, also uses combining theorem Allows for automation Chapter Edward McCluskey (99-06) Pioneer in Electrical

### ELCT201: DIGITAL LOGIC DESIGN

ELCT201: DIGITAL LOGIC DESIGN Dr. Eng. Haitham Omran, haitham.omran@guc.edu.eg Dr. Eng. Wassim Alexan, wassim.joseph@guc.edu.eg Lecture 3 Following the slides of Dr. Ahmed H. Madian ذو الحجة 1438 ه Winter

### Slide Set 5. for ENEL 353 Fall Steve Norman, PhD, PEng. Electrical & Computer Engineering Schulich School of Engineering University of Calgary

Slide Set 5 for ENEL 353 Fall 207 Steve Norman, PhD, PEng Electrical & Computer Engineering Schulich School of Engineering University of Calgary Fall Term, 207 SN s ENEL 353 Fall 207 Slide Set 5 slide

### Binary recursion. Unate functions. If a cover C(f) is unate in xj, x, then f is unate in xj. x

Binary recursion Unate unctions! Theorem I a cover C() is unate in,, then is unate in.! Theorem I is unate in,, then every prime implicant o is unate in. Why are unate unctions so special?! Special Boolean

### DKT 122/3 DIGITAL SYSTEM 1

Company LOGO DKT 122/3 DIGITAL SYSTEM 1 BOOLEAN ALGEBRA (PART 2) Boolean Algebra Contents Boolean Operations & Expression Laws & Rules of Boolean algebra DeMorgan s Theorems Boolean analysis of logic circuits

### Karnaugh Map (K-Map) Karnaugh Map. Karnaugh Map Examples. Ch. 2.4 Ch. 2.5 Simplification using K-map

Karnaugh Map (K-Map) Ch. 2.4 Ch. 2.5 Simplification using K-map A graphical map method to simplify Boolean function up to 6 variables A diagram made up of squares Each square represents one minterm (or

### 4 KARNAUGH MAP MINIMIZATION

4 KARNAUGH MAP MINIMIZATION A Karnaugh map provides a systematic method for simplifying Boolean expressions and, if properly used, will produce the simplest SOP or POS expression possible, known as the

### IT 201 Digital System Design Module II Notes

IT 201 Digital System Design Module II Notes BOOLEAN OPERATIONS AND EXPRESSIONS Variable, complement, and literal are terms used in Boolean algebra. A variable is a symbol used to represent a logical quantity.

### Switching Circuits & Logic Design

Switching Circuits & Logic Design Jie-Hong Roland Jiang 江介宏 Department of Electrical Engineering National Taiwan University Fall 23 5 Karnaugh Maps K-map Walks and Gray Codes http://asicdigitaldesign.wordpress.com/28/9/26/k-maps-walks-and-gray-codes/

### Specifying logic functions

CSE4: Components and Design Techniques for Digital Systems Specifying logic functions Instructor: Mohsen Imani Slides from: Prof.Tajana Simunic and Dr.Pietro Mercati We have seen various concepts: Last

### CHAPTER-2 STRUCTURE OF BOOLEAN FUNCTION USING GATES, K-Map and Quine-McCluskey

CHAPTER-2 STRUCTURE OF BOOLEAN FUNCTION USING GATES, K-Map and Quine-McCluskey 2. Introduction Logic gates are connected together to produce a specified output for certain specified combinations of input

### Chapter 3 Simplification of Boolean functions

3.1 Introduction Chapter 3 Simplification of Boolean functions In this chapter, we are going to discuss several methods for simplifying the Boolean function. What is the need for simplifying the Boolean

### 3.4 QUINE MCCLUSKEY METHOD 73. f(a, B, C, D, E)¼AC ĒþB CD þ BCDþĀBD.

3.4 QUINE MCCLUSKEY METHOD 73 FIGURE 3.22 f(a, B, C, D, E)¼B CD þ BCD. FIGURE 3.23 f(a, B, C, D, E)¼AC ĒþB CD þ BCDþĀBD. A¼1map are, 1, and 1, respectively, whereas the corresponding entries in the A¼0

### Synthesis 1. 1 Figures in this chapter taken from S. H. Gerez, Algorithms for VLSI Design Automation, Wiley, Typeset by FoilTEX 1

Synthesis 1 1 Figures in this chapter taken from S. H. Gerez, Algorithms for VLSI Design Automation, Wiley, 1998. Typeset by FoilTEX 1 Introduction Logic synthesis is automatic generation of circuitry

### ELCT201: DIGITAL LOGIC DESIGN

ELCT201: DIGITAL LOGIC DESIGN Dr. Eng. Haitham Omran, haitham.omran@guc.edu.eg Dr. Eng. Wassim Alexan, wassim.joseph@guc.edu.eg Lecture 3 Following the slides of Dr. Ahmed H. Madian محرم 1439 ه Winter

### A B AB CD Objectives:

Objectives:. Four variables maps. 2. Simplification using prime implicants. 3. "on t care" conditions. 4. Summary.. Four variables Karnaugh maps Minterms A A m m m3 m2 A B C m4 C A B C m2 m8 C C m5 C m3

### Module -7. Karnaugh Maps

1 Module -7 Karnaugh Maps 1. Introduction 2. Canonical and Standard forms 2.1 Minterms 2.2 Maxterms 2.3 Canonical Sum of Product or Sum-of-Minterms (SOM) 2.4 Canonical product of sum or Product-of-Maxterms(POM)

### SEE1223: Digital Electronics

SEE223: Digital Electronics 3 Combinational Logic Design Zulkifil Md Yusof Dept. of Microelectronics and Computer Engineering The aculty of Electrical Engineering Universiti Teknologi Malaysia Karnaugh

### Assignment (3-6) Boolean Algebra and Logic Simplification - General Questions

Assignment (3-6) Boolean Algebra and Logic Simplification - General Questions 1. Convert the following SOP expression to an equivalent POS expression. 2. Determine the values of A, B, C, and D that make

### Introduction. The Quine-McCluskey Method Handout 5 January 24, CSEE E6861y Prof. Steven Nowick

CSEE E6861y Prof. Steven Nowick The Quine-McCluskey Method Handout 5 January 24, 2013 Introduction The Quine-McCluskey method is an exact algorithm which finds a minimum-cost sum-of-products implementation

### Combinational Logic Circuits Part III -Theoretical Foundations

Combinational Logic Circuits Part III -Theoretical Foundations Overview Simplifying Boolean Functions Algebraic Manipulation Karnaugh Map Manipulation (simplifying functions of 2, 3, 4 variables) Systematic

### Points Addressed in this Lecture. Standard form of Boolean Expressions. Lecture 4: Logic Simplication & Karnaugh Map

Points Addressed in this Lecture Lecture 4: Logic Simplication & Karnaugh Map Professor Peter Cheung Department of EEE, Imperial College London Standard form of Boolean Expressions Sum-of-Products (SOP),

### 1. Fill in the entries in the truth table below to specify the logic function described by the expression, AB AC A B C Z

CS W3827 05S Solutions for Midterm Exam 3/3/05. Fill in the entries in the truth table below to specify the logic function described by the expression, AB AC A B C Z 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2.

### CMPE223/CMSE222 Digital Logic

CMPE223/CMSE222 Digital Logic Optimized Implementation of Logic Functions: Strategy for Minimization, Minimum Product-of-Sums Forms, Incompletely Specified Functions Terminology For a given term, each

### Chapter 2 Combinational Logic Circuits

Logic and Computer Design Fundamentals Chapter 2 Combinational Logic Circuits Part 2 Circuit Optimization Overview Part Gate Circuits and Boolean Equations Binary Logic and Gates Boolean Algebra Standard

### Combinational Logic & Circuits

Week-I Combinational Logic & Circuits Spring' 232 - Logic Design Page Overview Binary logic operations and gates Switching algebra Algebraic Minimization Standard forms Karnaugh Map Minimization Other

### UNIT II. Circuit minimization

UNIT II Circuit minimization The complexity of the digital logic gates that implement a Boolean function is directly related to the complexity of the algebraic expression from which the function is implemented.

### Ch. 5 : Boolean Algebra &

Ch. 5 : Boolean Algebra & Reduction elektronik@fisika.ui.ac.id Objectives Should able to: Write Boolean equations for combinational logic applications. Utilize Boolean algebra laws and rules for simplifying

### Digital Logic Design (CEN-120) (3+1)

Digital Logic Design (CEN-120) (3+1) ASSISTANT PROFESSOR Engr. Syed Rizwan Ali, MS(CAAD)UK, PDG(CS)UK, PGD(PM)IR, BS(CE)PK HEC Certified Master Trainer (MT-FPDP) PEC Certified Professional Engineer (COM/2531)

### Switching Theory And Logic Design UNIT-II GATE LEVEL MINIMIZATION

Switching Theory And Logic Design UNIT-II GATE LEVEL MINIMIZATION Two-variable k-map: A two-variable k-map can have 2 2 =4 possible combinations of the input variables A and B. Each of these combinations,

### Graduate Institute of Electronics Engineering, NTU. CH5 Karnaugh Maps. Lecturer: 吳安宇教授 Date:2006/10/20 ACCESS IC LAB

CH5 Karnaugh Maps Lecturer: 吳安宇教授 Date:2006/0/20 CCESS IC L Problems in lgebraic Simplification The procedures are difficult to apply in a systematic way. It is difficult to tell when you have arrived

### CSCI 220: Computer Architecture I Instructor: Pranava K. Jha. Simplification of Boolean Functions using a Karnaugh Map

CSCI 22: Computer Architecture I Instructor: Pranava K. Jha Simplification of Boolean Functions using a Karnaugh Map Q.. Plot the following Boolean function on a Karnaugh map: f(a, b, c, d) = m(, 2, 4,

Summary Boolean Addition In Boolean algebra, a variable is a symbol used to represent an action, a condition, or data. A single variable can only have a value of or 0. The complement represents the inverse

### Combinational Logic Circuits

Chapter 3 Combinational Logic Circuits 12 Hours 24 Marks 3.1 Standard representation for logical functions Boolean expressions / logic expressions / logical functions are expressed in terms of logical

### Combinational Logic Circuits

Chapter 2 Combinational Logic Circuits J.J. Shann (Slightly trimmed by C.P. Chung) Chapter Overview 2-1 Binary Logic and Gates 2-2 Boolean Algebra 2-3 Standard Forms 2-4 Two-Level Circuit Optimization

### Contents. Chapter 3 Combinational Circuits Page 1 of 34

Chapter 3 Combinational Circuits Page of 34 Contents Contents... 3 Combinational Circuits... 2 3. Analysis of Combinational Circuits... 2 3.. Using a Truth Table... 2 3..2 Using a Boolean unction... 4

### LSN 4 Boolean Algebra & Logic Simplification. ECT 224 Digital Computer Fundamentals. Department of Engineering Technology

LSN 4 Boolean Algebra & Logic Simplification Department of Engineering Technology LSN 4 Key Terms Variable: a symbol used to represent a logic quantity Compliment: the inverse of a variable Literal: a

### Simplification of Boolean Functions

COM111 Introduction to Computer Engineering (Fall 2006-2007) NOTES 5 -- page 1 of 5 Introduction Simplification of Boolean Functions You already know one method for simplifying Boolean expressions: Boolean

### Gate Level Minimization Map Method

Gate Level Minimization Map Method Complexity of hardware implementation is directly related to the complexity of the algebraic expression Truth table representation of a function is unique Algebraically

### Chapter 2 Combinational Logic Circuits

Logic and Computer Design Fundamentals Chapter 2 Combinational Logic Circuits Part 2 Circuit Optimization Charles Kime & Thomas Kaminski 2008 Pearson Education, Inc. (Hyperlinks are active in View Show

### ECE380 Digital Logic

ECE38 Digital Logic Optimized Implementation of Logic Functions: Strategy for Minimization, Minimum Product-of-Sums Forms, Incompletely Specified Functions Dr. D. J. Jackson Lecture 8- Terminology For

### Literal Cost F = BD + A B C + A C D F = BD + A B C + A BD + AB C F = (A + B)(A + D)(B + C + D )( B + C + D) L = 10

Circuit Optimization Goal: To obtain the simplest implementation for a given function Optimization is a more formal approach to simplification that is performed using a specific procedure or algorithm

### (Refer Slide Time 5:19)

Digital Circuits and Systems Prof. S. Srinivasan Department of Electrical Engineering Indian Institute of Technology, Madras Lecture - 7 Logic Minimization using Karnaugh Maps In the last lecture we introduced

### 9.8 Graphing Rational Functions

9. Graphing Rational Functions Lets begin with a deinition. Deinition: Rational Function A rational unction is a unction o the orm P where P and Q are polynomials. Q An eample o a simple rational unction

### BOOLEAN ALGEBRA. Logic circuit: 1. From logic circuit to Boolean expression. Derive the Boolean expression for the following circuits.

COURSE / CODE DIGITAL SYSTEMS FUNDAMENTAL (ECE 421) DIGITAL ELECTRONICS FUNDAMENTAL (ECE 422) BOOLEAN ALGEBRA Boolean Logic Boolean logic is a complete system for logical operations. It is used in countless

### Chapter 2 Combinational

Computer Engineering 1 (ECE290) Chapter 2 Combinational Logic Circuits Part 2 Circuit Optimization HOANG Trang 2008 Pearson Education, Inc. Overview Part 1 Gate Circuits and Boolean Equations Binary Logic

### 2.6 BOOLEAN FUNCTIONS

2.6 BOOLEAN FUNCTIONS Binary variables have two values, either 0 or 1. A Boolean function is an expression formed with binary variables, the two binary operators AND and OR, one unary operator NOT, parentheses

### DATA MINING II - 1DL460

DATA MINING II - 1DL460 Spring 2013 " An second class in data mining http://www.it.uu.se/edu/course/homepage/infoutv2/vt13 Kjell Orsborn Uppsala Database Laboratory Department of Information Technology,

### The Rational Zero Theorem

The Rational Zero Theorem Our goal in this section is to learn how we can ind the rational zeros o the polynomials. For example: x = x 4 + x x x + ( ) We could randomly try some actors and use synthetic

### MUX using Tri-State Buffers. Chapter 2 - Part 2 1

MUX using Tri-State Buffers Chapter 2 - Part 2 Systematic Simplification A Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle

### CS8803: Advanced Digital Design for Embedded Hardware

CS883: Advanced Digital Design for Embedded Hardware Lecture 2: Boolean Algebra, Gate Network, and Combinational Blocks Instructor: Sung Kyu Lim (limsk@ece.gatech.edu) Website: http://users.ece.gatech.edu/limsk/course/cs883

www.vidyarthiplus.com Question Paper Code : 31298 B.E./B.Tech. DEGREE EXAMINATION, NOVEMBER/DECEMBER 2013. Third Semester Computer Science and Engineering CS 2202/CS 34/EC 1206 A/10144 CS 303/080230012--DIGITAL

### Gate Level Minimization

Gate Level Minimization By Dr. M. Hebaishy Digital Logic Design Ch- Simplifying Boolean Equations Example : Y = AB + AB Example 2: = B (A + A) T8 = B () T5 = B T Y = A(AB + ABC) = A (AB ( + C ) ) T8 =

### GATE Exercises on Boolean Logic

GATE Exerces on Boolean Logic 1 Abstract Th problem set has questions related to Boolean logic and gates taken from GATE papers over the last twenty years. Teachers can use the problem set for courses

### Unit-IV Boolean Algebra

Unit-IV Boolean Algebra Boolean Algebra Chapter: 08 Truth table: Truth table is a table, which represents all the possible values of logical variables/statements along with all the possible results of

### R.M.D. ENGINEERING COLLEGE R.S.M. Nagar, Kavaraipettai

L T P C R.M.D. ENGINEERING COLLEGE R.S.M. Nagar, Kavaraipettai- 601206 DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING EC8392 UNIT - I 3 0 0 3 OBJECTIVES: To present the Digital fundamentals, Boolean

### 1. Observe Observe your image on each side of a spoon. Record your observations using words and a picture.

Concave Mirrors 1. Observe Observe your image on each side o a spoon. Record your observations using words and a picture. Inner spoon Outer spoon 2. Observe and Explain http://www.youtube.com/watch?v=kqxdwpmof9c&eature=player_embedded

### EEE130 Digital Electronics I Lecture #4_1

EEE130 Digital Electronics I Lecture #4_1 - Boolean Algebra and Logic Simplification - By Dr. Shahrel A. Suandi 4-6 Standard Forms of Boolean Expressions There are two standard forms: Sum-of-products form

### Code No: R Set No. 1

Code No: R059210504 Set No. 1 II B.Tech I Semester Supplementary Examinations, February 2007 DIGITAL LOGIC DESIGN ( Common to Computer Science & Engineering, Information Technology and Computer Science

### Building Roads. Page 2. I = {;, a, b, c, d, e, ab, ac, ad, ae, bc, bd, be, cd, ce, de, abd, abe, acd, ace, bcd, bce, bde}

Page Building Roads Page 2 2 3 4 I = {;, a, b, c, d, e, ab, ac, ad, ae, bc, bd, be, cd, ce, de, abd, abe, acd, ace, bcd, bce, bde} Building Roads Page 3 2 a d 3 c b e I = {;, a, b, c, d, e, ab, ac, ad,

### Presented By :- Alok Kumar Lecturer in ECE C.R.Polytechnic, Rohtak

Presented By :- Alok Kumar Lecturer in ECE C.R.Polytechnic, Rohtak Content - Introduction -2 Feature -3 Feature of BJT -4 TTL -5 MOS -6 CMOS -7 K- Map - Introduction Logic IC ASIC: Application Specific

### (Refer Slide Time 6:48)

Digital Circuits and Systems Prof. S. Srinivasan Department of Electrical Engineering Indian Institute of Technology Madras Lecture - 8 Karnaugh Map Minimization using Maxterms We have been taking about

### An Interesting Way to Combine Numbers

An Interesting Way to Combine Numbers Joshua Zucker and Tom Davis October 12, 2016 Abstract This exercise can be used for middle school students and older. The original problem seems almost impossibly

### Skill Sets Chapter 5 Functions

Skill Sets Chapter 5 Functions No. Skills Examples o questions involving the skills. Sketch the graph o the (Lecture Notes Example (b)) unction according to the g : x x x, domain. x, x - Students tend

### Code No: R Set No. 1

Code No: R059210504 Set No. 1 II B.Tech I Semester Regular Examinations, November 2006 DIGITAL LOGIC DESIGN ( Common to Computer Science & Engineering, Information Technology and Computer Science & Systems

### ECE 5745 Complex Digital ASIC Design Topic 12: Synthesis Algorithms

ECE 5745 Complex Digital ASIC Design Topic 12: Synthesis Algorithms Christopher Batten School of Electrical and Computer Engineering Cornell University http://www.csl.cornell.edu/courses/ece5745 RTL to

### Math 2A Vector Calculus Chapter 11 Test Fall 07 Name Show your work. Don t use a calculator. Write responses on separate paper.

Math A Vector Calculus Chapter Test Fall 7 Name Show our work. Don t use a calculator. Write responses on separate paper.. Consider the nice, smooth unction z, whose contour map is shown at right. a. Estimate

### BCNF. Yufei Tao. Department of Computer Science and Engineering Chinese University of Hong Kong BCNF

Yufei Tao Department of Computer Science and Engineering Chinese University of Hong Kong Recall A primary goal of database design is to decide what tables to create. Usually, there are two principles:

### (1) The perimeter of a trapezoid of 10 cm height is 35 cm. If the sum of non-parallel sides is 25 cm,

Grade 8 Mensuration For more such worksheets visit www.edugain.com ID : ww-8-mensuration [1] Answer t he quest ions (1) The perimeter of a trapezoid of 10 cm height is 35 cm. If the sum of non-parallel

### Bawar Abid Abdalla. Assistant Lecturer Software Engineering Department Koya University

Logic Design First Stage Lecture No.6 Boolean Algebra Bawar Abid Abdalla Assistant Lecturer Software Engineering Department Koya University Outlines Boolean Operations Laws of Boolean Algebra Rules of

### ADAPTIVE MAP FOR SIMPLIFYING BOOLEAN EXPRESSIONS

ABSTRACT ADAPTIVE MAP FOR SIMPLIFYING BOOLEAN EXPRESSIONS Dr. Mohammed H. AL-Jammas Department of Computer and Information Engineering, College of Electronics Engineering, University of Mosul, Mosul -

### 2.1 Binary Logic and Gates

1 EED2003 Digital Design Presentation 2: Boolean Algebra Asst. Prof.Dr. Ahmet ÖZKURT Asst. Prof.Dr Hakkı T. YALAZAN Based on the Lecture Notes by Jaeyoung Choi choi@comp.ssu.ac.kr Fall 2000 2.1 Binary

### Concavity. Notice the location of the tangents to each type of curve.

Concavity We ve seen how knowing where a unction is increasing and decreasing gives a us a good sense o the shape o its graph We can reine that sense o shape by determining which way the unction bends

### VLSI System Design Part II : Logic Synthesis (1) Oct Feb.2007

VLSI System Design Part II : Logic Synthesis (1) Oct.2006 - Feb.2007 Lecturer : Tsuyoshi Isshiki Dept. Communications and Integrated Systems, Tokyo Institute of Technology isshiki@vlsi.ss.titech.ac.jp

Get Free notes at Module-I One s Complement: Complement all the bits.i.e. makes all 1s as 0s and all 0s as 1s Two s Complement: One s complement+1 SIGNED BINARY NUMBERS Positive integers (including zero)

### DIGITAL CIRCUIT LOGIC UNIT 5: KARNAUGH MAPS (K-MAPS)

DIGITAL CIRCUIT LOGIC UNIT 5: KARNAUGH MAPS (K-MAPS) 1 Learning Objectives 1. Given a function (completely or incompletely specified) of three to five variables, plot it on a Karnaugh map. The function

### Experiment 4 Boolean Functions Implementation

Experiment 4 Boolean Functions Implementation Introduction: Generally you will find that the basic logic functions AND, OR, NAND, NOR, and NOT are not sufficient to implement complex digital logic functions.

### Gate-Level Minimization

MEC520 디지털공학 Gate-Level Minimization Jee-Hwan Ryu School of Mechanical Engineering Gate-Level Minimization-The Map Method Truth table is unique Many different algebraic expression Boolean expressions may

### CS 161: Design and Analysis of Algorithms

CS 161: Design and Analysis o Algorithms Announcements Homework 3, problem 3 removed Greedy Algorithms 4: Human Encoding/Set Cover Human Encoding Set Cover Alphabets and Strings Alphabet = inite set o

### Computer Data Analysis and Plotting

Phys 122 February 6, 2006 quark%//~bland/docs/manuals/ph122/pcintro/pcintro.doc Computer Data Analysis and Plotting In this lab we will use Microsot EXCEL to do our calculations. This program has been

### Dr. S. Shirani COE2DI4 Midterm Test #1 Oct. 14, 2010

Dr. S. Shirani COE2DI4 Midterm Test #1 Oct. 14, 2010 Instructions: This examination paper includes 9 pages and 20 multiple-choice questions starting on page 3. You are responsible for ensuring that your

### Neighbourhood Operations

Neighbourhood Operations Neighbourhood operations simply operate on a larger neighbourhood o piels than point operations Origin Neighbourhoods are mostly a rectangle around a central piel Any size rectangle

### 9/10/2016. ECE 120: Introduction to Computing. The Domain of a Boolean Function is a Hypercube. List All Implicants for One Variable A

University of Illinois at Urbana-Champaign Dept. of Electrical and Computer Engineering ECE 120: Introduction to Computing To Simplify, Write Function as a Sum of Prime Implicants One way to simplify a

### Using a Projected Subgradient Method to Solve a Constrained Optimization Problem for Separating an Arbitrary Set of Points into Uniform Segments

Using a Projected Subgradient Method to Solve a Constrained Optimization Problem or Separating an Arbitrary Set o Points into Uniorm Segments Michael Johnson May 31, 2011 1 Background Inormation The Airborne

### Apriori Algorithm. 1 Bread, Milk 2 Bread, Diaper, Beer, Eggs 3 Milk, Diaper, Beer, Coke 4 Bread, Milk, Diaper, Beer 5 Bread, Milk, Diaper, Coke

Apriori Algorithm For a given set of transactions, the main aim of Association Rule Mining is to find rules that will predict the occurrence of an item based on the occurrences of the other items in the

### Chapter 6. Logic Design Optimization Chapter 6

Chapter 6 Logic Design Optimization Chapter 6 Optimization The second part of our design process. Optimization criteria: Performance Size Power Two-level Optimization Manipulating a function until it is

### 1. Mark the correct statement(s)

1. Mark the correct statement(s) 1.1 A theorem in Boolean algebra: a) Can easily be proved by e.g. logic induction b) Is a logical statement that is assumed to be true, c) Can be contradicted by another

### Boolean Function Simplification

Universit of Wisconsin - Madison ECE/Comp Sci 352 Digital Sstems Fundamentals Charles R. Kime Section Fall 200 Chapter 2 Combinational Logic Circuits Part 5 Charles Kime & Thomas Kaminski Boolean Function

### CprE 281: Digital Logic

CprE 28: Digital Logic Instructor: Alexander Stoytchev http://www.ece.iastate.edu/~alexs/classes/ Minimization CprE 28: Digital Logic Iowa State University, Ames, IA Copyright Alexander Stoytchev Administrative

### Global Constraints. Combinatorial Problem Solving (CPS) Enric Rodríguez-Carbonell (based on materials by Javier Larrosa) February 22, 2019

Global Constraints Combinatorial Problem Solving (CPS) Enric Rodríguez-Carbonell (based on materials by Javier Larrosa) February 22, 2019 Global Constraints Global constraints are classes o constraints

### Rational Functions. Definition A rational function can be written in the form. where N(x) and D(x) are

Rational Functions Deinition A rational unction can be written in the orm () N() where N() and D() are D() polynomials and D() is not the zero polynomial. *To ind the domain o a rational unction we must

### Introduction to Microprocessors and Digital Logic (ME262) Boolean Algebra and Logic Equations. Spring 2011

Introduction to Microprocessors and Digital (ME262) lgebra and Spring 2 Outline. lgebra 2. 3. Karnaugh Maps () 4. Two-variable 5. 6. 7. 2 lgebra s of Simplifying equations are defined in terms of inary

### To write Boolean functions in their standard Min and Max terms format. To simplify Boolean expressions using Karnaugh Map.

3.1 Objectives To write Boolean functions in their standard Min and Max terms format. To simplify Boolean expressions using. 3.2 Sum of Products & Product of Sums Any Boolean expression can be simplified

### UNIT-4 BOOLEAN LOGIC. NOT Operator Operates on single variable. It gives the complement value of variable.

UNIT-4 BOOLEAN LOGIC Boolean algebra is an algebra that deals with Boolean values((true and FALSE). Everyday we have to make logic decisions: Should I carry the book or not?, Should I watch TV or not?

### SWITCHING THEORY AND LOGIC CIRCUITS

SWITCHING THEORY AND LOGIC CIRCUITS COURSE OBJECTIVES. To understand the concepts and techniques associated with the number systems and codes 2. To understand the simplification methods (Boolean algebra

### Combinatorial Algorithms. Unate Covering Binate Covering Graph Coloring Maximum Clique

Combinatorial Algorithms Unate Covering Binate Covering Graph Coloring Maximum Clique Example As an Example, let s consider the formula: F(x,y,z) = x y z + x yz + x yz + xyz + xy z The complete sum of

### ENEL 353: Digital Circuits Midterm Examination

NAME: SECTION: L01: Norm Bartley, ST 143 L02: Steve Norman, ST 145 When you start the test, please repeat your name and section, and add your U of C ID number at the bottom of the last page. Instructions:

### University of Technology

University of Technology Lecturer: Dr. Sinan Majid Course Title: microprocessors 4 th year Lecture 5 & 6 Minimization with Karnaugh Maps Karnaugh maps lternate way of representing oolean function ll rows

### MAPI Computer Vision. Multiple View Geometry

MAPI Computer Vision Multiple View Geometry Geometry o Multiple Views 2- and 3- view geometry p p Kpˆ [ K R t]p Geometry o Multiple Views 2- and 3- view geometry Epipolar Geometry The epipolar geometry