Signed Multiplication Multiply the positives Negate result if signs of operand are different
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1 Another Improvement Save on space: Put multiplier in product saves on speed: only single shift needed Figure: Improved hardware for multiplication
2 Signed Multiplication Multiply the positives Negate result if signs of operand are different
3 Multiplication and Division in MIPS mult, multu; div, divu Result in LO and HI Use mflo and mfhi for result
4 Floating Point Real numbers (π) ( ) (e)
5 Floating Point Real numbers (π) ( ) (e) Floating numbers: position of binary point is not fixed. Just like float in C. vs. fixed-point systems
6 Floating Point Real numbers (π) ( ) (e) Floating numbers: position of binary point is not fixed. Just like float in C. vs. fixed-point systems Scientific notation
7 Floating Point Real numbers (π) ( ) (e) Floating numbers: position of binary point is not fixed. Just like float in C. vs. fixed-point systems Scientific notation Normalized no leading 0
8 Floating Point Real numbers (π) ( ) (e) Floating numbers: position of binary point is not fixed. Just like float in C. vs. fixed-point systems Scientific notation Normalized no leading 0 Exponent no. of positions to move the point in the fraction
9 Binary Floating Numbers Binary point (analogous to decimal point) two 2 4
10 Binary Floating Numbers Binary point (analogous to decimal point) two 2 4 In general 1.xxxxxxx two 2 yyyy
11 Binary Floating Numbers Binary point (analogous to decimal point) two 2 4 In general 1.xxxxxxx two 2 yyyy Why 1 in fraction? (Will use exponent in decimal for simplicity)
12 Binary Floating Numbers In design: compromise between sizes of fraction and exponent between precision and range since fixed word size
13 Binary Floating Numbers In design: compromise between sizes of fraction and exponent between precision and range since fixed word size Represent in (floating) binary word as: S (sign bit): 1 bit (31st bit) ( 1) S F 2 E E (exponent): 8 bits (bits 23 to 30) F (significand, fraction): 23 bits (bits 0 to 22)
14 Binary Floating Numbers In design: compromise between sizes of fraction and exponent between precision and range since fixed word size Represent in (floating) binary word as: S (sign bit): 1 bit (31st bit) ( 1) S F 2 E E (exponent): 8 bits (bits 23 to 30) F (significand, fraction): 23 bits (bits 0 to 22) Not just MIPS formats: IEEE 754 floating-point standard
15 Overflow & Underflow Range: 2.0 ten to 2.0 ten 10 38
16 Overflow & Underflow Range: 2.0 ten to 2.0 ten Overflow: Too large to represent exponent too large to fit in 8 bits
17 Overflow & Underflow Range: 2.0 ten to 2.0 ten Overflow: Too large to represent exponent too large to fit in 8 bits Underflow: Too accurate to represent Negative exponent too large to fit
18 double format double-precision floating-point
19 double format double-precision floating-point vs. single-precision
20 double format double-precision floating-point vs. single-precision Uses two MIPS words
21 double format double-precision floating-point vs. single-precision Uses two MIPS words S: 31st bit of 1st register E: bits 30 to 20 of 1st register F: rest 20 bits of 1st register + 32 bits of 2nd
22 double format double-precision floating-point vs. single-precision Uses two MIPS words S: 31st bit of 1st register E: bits 30 to 20 of 1st register F: rest 20 bits of 1st register + 32 bits of 2nd Increased range: 2.0 ten to 2.0 ten
23 Another Optimization Normalized Make leading 1-bit implicit
24 Another Optimization Normalized Make leading 1-bit implicit 24 bits for significand 53 bits for double-precision
25 Another Optimization Normalized Make leading 1-bit implicit 24 bits for significand 53 bits for double-precision Also use biased notation for exponent instead of two s complement
26 Another Optimization Normalized Make leading 1-bit implicit 24 bits for significand 53 bits for double-precision Also use biased notation for exponent instead of two s complement Subtract 127 from actual value 1023 for double precision
27 Another Optimization Normalized Make leading 1-bit implicit 24 bits for significand 53 bits for double-precision Also use biased notation for exponent instead of two s complement Subtract 127 from actual value 1023 for double precision is for is for infinity
28 Another Optimization Normalized Make leading 1-bit implicit 24 bits for significand 53 bits for double-precision Also use biased notation for exponent instead of two s complement Subtract 127 from actual value 1023 for double precision is for is for infinity
29 IEEE 754 Representation Final representation: ( 1) S (1 + F) 2 ( E 127)
30 Advantages of Normalized Scientific Notation Simplifies exchange of floating point data Simplifies arithmetic Increases accuracy: unnecessary leading 0 s are replaced by real numbers on the right
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