The operations executed on data stored in registers(shift, clear, load, count)

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1 4-4- Register Transfer Language Microoperation The operations executed on data stored in registers(shift, clear, load, count) Internal H/W Organization(best defined by specifying). The set of registers(register 의개수, 종류, 기능 ). The sequence of microoperations. The sequence control of microoperations Register Transfer Language The symbolic notation used to describe the microoperation transfer among registers» The use of symbols instead of a narrative explanation provides an organized and concise manner A convenient tool for describing the internal organization of digital computers in concise and precise manner 4- Register Transfer Registers : Fig. 4- Designated by Capital Letter(sometimes followed by numerals) : MAR(Memory Address Register), PC(Program Counter), IR(Instruction Register), R(Processor Register)

2 4- The individual F/Fs in an n-bit register : numbered in sequence from (rightmost position) through n- The numbering of bits in a 6-bit register : marked on top of the box A 6-bit register partitioned into two parts : bit -7(symbol L Low byte), bit 8-5(symbol H High byte) Register Transfer : Information transfer from one register to another R R (transfer of the content of register R into register R)» The content of the source register R does not change after the transfer Control Function : The transfer occurs only under a predetermined control condition The transfer operation is executed by the hardware only if P= : Fig. 4- if ( P = ) then ( R R) P : R R A comma is used to separate two or more operations(executed at the same time) T : R R, R R Basic ymbols for Register Transfer : Tab. 4- ymbol Description Examples Letters(and numerals) Denotes a register MAR, R Parentheses ( ) Denotes a part of a register R(-7), R(L) Arrow <-- Denotes transfer of information R <-- R Comma, eparates two microoperations R <-- R, R <-- R =

3 4-4- Bus and Memory Transfers Common Bus A more efficient scheme for transferring information between registers in a multiple-register configuration A bus structure = a set of common lines Control signals determine which register is selected» One way of constructing a common bus system is with multiplexers» The multiplexers select the source register whose binary information is place on the bus The construction of a bus system for four registers : Fig. 4-» 4 bit register X 4» Four 4 X Multiplexers» Bus election :, Register selected A B C D 8 Registers with 6 bit 4*» 8 X mux 6 개필요 4* 4* 4* Register D Register C Register B Register A 4-line common bus

4 4-4 Bus Transfer The content of register C is placed on the bus, and the content of the bus is loaded into register R by activating its load control input R C Three-tate Bus Buffers A bus system can be constructed with three-state gates instead of multiplexers Tri-tate :,, High-impedance(Open circuit) Buffer Bus C, R Bus =» A device designed to be inserted between other devices to match impedance, to prevent mixed interactions, and to supply additional drive or relay capability» Buffer types are classified as inverting or noninverting R Register Tri-state buffer gate : Fig. 4-4» When control input = : The output is enabled(output Y = input A)» When control input = : The output is disabled(output Y = high-impedance) Bus n C Register Normal input A Control input C If C=, Output Y = A If C=, Output = High-impedance

5 4-5 The construction of a bus system with tri-state buffer : Fig. 4-5 The outputs of four buffer are connected together to form a single bus line(tristate buffer 이기때문에가능 ) No more than one buffer may be in the active state at any given time( X 4 Decoder 사용으로해결 ) To construct a common bus for 4 register with 4 bit : Fig. 4.5 와같은회로 4 개필요 (register 개수가늘어나면 decoder 의입력증가및 buffer 개수증가 ) elect input Enable input Memory Transfer A B C D E *4 decoder Bus line for bit READ WRITE : DR M[ AR] M[ AR] R Memory read : A transfer information into DR from the memory word M selected by the address in AR Memory Write : A transfer information from R into the memory word M selected by the address in AR : AR: Address Reg. DR: Data Reg. M : Memory Word(Data)

6 4-6 The 4 types of microoperation in digital computers Register transfer microoperation : ec -4 와 ec 4- 에서이미학습 Arithmetic microoperation Logic microoperation hift microoperation 4-4 Arithmetic Microoperation Arithmetic Microoperation : Tab. 4- Negate : s complement ubtraction : R + s complement of R Multiplication(shift left), Division(shift right) 4-bit Binary Adder : Fig. 4-6 Full adder = -bits sum + previous carry c (input carry), c 4 (output carry) ec 4-4, 4-5, 4-6 에서학습 R R + B A B A B A B A ec 4-7 에서 개를모두통합 R R R = R + ( R + ) C C4

7 4-7 4-bit Binary Adder-ubtractor : Fig. 4-7 M = : Adder B M + C = B + = B, A + B M = : ubtractor B M + C = B + = B + = -B( s comp), A - B B A B A B A B A M C4 C 4-bit Binary Incrementer equential circuit implementation by using binary counter : Fig. - Combinational circuit implementation by using Half Adder : Fig. 4-8 B B B B x HA y x HA y x HA y x HA y Always added to C C C C C4

8 4-8 Arithmetic Circuit One composite arithmetic circuit in Tab. 4- : Fig. 4-9 D= A (X ) + B (Y ) + C in» B :, 에따라 B, B,, B» Tab. 4-4의 Input Y = B Cin A 4* X Y C C D elect Input Output Microoperat C in Y D=A+Y+C in B D=A+B Add B D=A+B+ Add wit B' D=A+B' ubtract with borrow B' D=A+B'+ ubtract D=A Transfer A D=A+ Inc D=A- Decremen D=A Transfer A A B A B 4* 4* X Y X Y C C C C D D A+=A- A-+=A A+B =A+B +- = A-B- A B 4* X Y C C4 D Cout

9 Logic Microoperation Logic microoperation Logic microoperations consider each bit of the register separately and treat them as binary variables» exam) P : R R R Content of R + Content of R Content of R after P= Arithmetic 에서 s Complement 와동일 pecial ymbols» pecial symbols will be adopted for the logic microoperations OR( /), AND( ), and complement(a bar on top), to distinguish them from the corresponding symbols used to express Boolean functions» exam) List of Logic Microoperation Truth Table for 6 functions for variables : Tab Logic Microoperation : Tab. 4-6 Hardware Implementation P + Q : R R + R, R4 R5 R6 Logic OR Arithmetic ADD 6 microoperation Use only 4(AND, OR, XOR, Complement) One stage of logic circuit : Fig. 4- QAll other Operation can be derived Ai Bi 4* E i

10 4- ome Applications Logic microoperations are very useful for manipulating individual bits or a portion of a word stored in a register Used to change bit values, delete a group of bits, or insert new bit values elective-set» The selective-set operation sets to the bits in register A where there are corresponding s in register B. It does not effect bit positions that have s in B elective-complement» The selective-complement operation complements bits in A where there are corresponding s in B. It does not effect bit positions that have s in B A A B» The selective-clear operation clears to the bits in A only where there are corresponding s in B elective-clear elective-mask A A A B A A B A B» The mask operation is similar to the selective-clear operation except that the bits of A are cleared only where there are corresponding s in B A before B(Logic Operand) A After A before B(Logic Operand) A After A before B(Logic Operand) A After A before B(Logic Operand) A After elective-set elective-complement elective-clear elective-mask

11 4- Insert Clear» The insert operation inserts a new value into a group of bits» This is done by first masking the bits and then ORing them with the required value ) Mask ) OR A before A before B mask B insert A after mask A after insert A A B» The clear operation compares the words in A and B and produces an all s result if the two numbers are equal 4-6 hift Microoperations hift Microoperations : Tab. 4-7 hift microoperations are used for serial transfer of data Three types of shift microoperation : Logical, Circular, and Arithmetic Logical hift = A logical shift transfers through the serial input Clear A B A after clear The bit transferred to the end position through the serial input is assumed to be during a logical shift(zero inserted) R shl R R shr R

12 4- Circular hift(rotate) The circular shift circulates the bits of the register around the two ends without loss of information R cil R cir R Arithmetic hift An arithmetic shift shifts a signed binary number to the left or right An arithmetic shift-left multiplies a signed binary number by An arithmetic shift-right divides the number by Arithmetic shifts must leave the sign bit unchanged because the sign of the number remains the same hift right : R R ashr R hift left : R ashl R LB lost Carry out MB LB ign bit R n- R n R R MB LB ign reversal occur : Overflow F/F V s = V R R = s n n insert

13 4- Hardware Implementation(hifter) : Fig. 4- erial input(ir) elect() 4-7 Arithmetic Logic hift Unit One stage of arithmetic logic shift unit : Fig. 4- H Ci A A A A H One state of arithmetic circuit (Fig. 4.9) elect H Ci+ 4* Fi Bi Ai One state of logic circuit (Fig. 4.) H Ai- Ai+ erial input(il)

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