Lab 1 Introduction to MPLAB and MIPS Assembly (Spring 2016)

Transcription

1 OREGON INSTITUTE OF TECHNOLOGY Computer Systems Engineering Technology Department CST Introduction to Microcontrollers Introduction to Lab 1 Lab 1 Introduction to MPLAB and MIPS Assembly (Spring 2016) Name Lab 1 is a procedural lab that will walk you through the PIC32 development process using the MPLAB X IDE (Integrated Development Environment). (Note that from herein, MPLAB will be used to mean MPLAB X.) The IDE provides a single look-and-feel that is identical whether you are simulating code or actually running code interactively on the target hardware (debugging). The lab activities in this class will almost exclusively be using the (hardware) debug mode though there is a place for simulation debugging. A few MIPS instructions will be investigated in a simple PIC32 output port application. You will initially use sample code to create and build a project, as well as debug. Then you will modify the code to add application specific functionality. Objectives for Lab 1 1) Create a MPLAB project and add an assembly source file 2) Configure MPLAB for the Explorer 16 target board and ICD 3 debugger 3) Build a project and load executable code on the Explorer 16 target board 4) Debug a project using breakpoints and single stepping 5) Observe PIC32 addressing and Special Function Register (SFR) addressing 6) Distinguish native MIPS instructions from macro instructions 7) Modify an assembly source file to meet a specific function requirements 8) Verify the operation of the modified project Procedure for Lab 1 Getting started 1) Create a z:\cst204\labs folder and a z:\cst204\docs folder. Copy the following files from Blackboard (Course Materials Lab Materials Lab Supplements Books) into the \docs folder. MPLAB X Project and MIPS Assembly Helps.pdf MIPS Quick Ref.pdf PIC32MX3XX-4XX Family Data Sheet.pdf PIC32 Family Reference Manual Book.pdf 2) Create a z:\cst204\labs\lab1 folder. 3) Create a MPLAB X lab1 project according to MPLAB X Project and MIPS Assembly Helps.pdf. 4) Copy the file C:\Program Files\Microchip\xc32\vX.YZ\examples\ assembly_examples\ports_control\source\ports_control.s

2 into a new file lab1.s within the z:\cst204\labs\lab1\source folder. (Note: The file extension MUST be a capital S.) Add this file to the Project. [Note: vx.yz varies with the version.] Formatting workspace by Docking windows 5) While you can Undock windows using the Window pull-down menu, it is recommended that you leave them Docked. You can unpin windows by Minimizing them to the edge. Windows can be focused on and repined. 6) Go to the Window drop-down menu and select PIC Memory Views CPU to display the CPU registers window. Expand it and Minimize it to the bottom edge. 7) Go to the Window drop-down menu and select PIC Memory Views Execution Memory to display the instruction view of the memory. Expand it and Minimize it to the bottom edge. Going forward, you can display and hide, dock and undock windows, to your preference. It is suggested that you dock status windows as docking prevents the source/debug window from covering the status windows. Debugging on Explorer 16 target board 8) Plug in the kit USB cable into ICD 3 debugger. Then, plug the ICD 3 USB cable into the host computer through the USB extension cable that is attached to the lab bench. [Note: The ICD 3 USB driver should already be installed on the lab computer. If an Installation prompt comes up, a lab tech will have to install the driver on the machine you are using. Please notify the instructor if this situation occurs.] 9) Under the File pull-down menu, click Project Properties or the WRENCH icon on the left side of the Dashboard window. Select the SN: xxx shown under the Hardware Tool Hardware Tools ICD 3 configuration. The Serial Number needs to be highlighted. Click OK. 10) Plug in the 9V wall power supply into the Explorer 16 target board. You should see LED D1 turn on. 11) Attach the ICD 3 to the Explorer 16 with the short, gray patch cord. 12) Click the Debug Main Project icon. This will build the code and start a debug session. 13) You can now debug the project (Run, Halt, Step Into, etc.) on the target board hardware. These can be done using the Debugger drop-down menu or the icon menu. You should get a Target reset message in the ICD 3 status window in the Output window that spontaneously opened. 14) In the source window, scroll down to the first instruction (ori) right after the main: label to insert a breakpoint by clicking on the line number. In the Debug pull-down menu, select Reset. Note: You can also use the Reset icon on the icon menu bar. Execution should halt on the ori instruction as noted by a solid green block arrow and green shading on the line. 15) Single step until you reach the la s0, LATACLR instruction. From the Debug pull-down menu, you use Step Into or you can use the icon menu.

3 16) QUESTION: Look at the code disassembly in the Execution Memory window (Window PIC Memory Views Execution Memory). Note that LATACLR is a built-in symbol (label) for the address of the Port A LATCH CLEAR Special Function Register (SFR). Is the la s0, LATACLR instruction present? If not, what instructions appear to be present in its stead? Write your observations here. (Hint: la is a macro instruction recognized by the assembler and is expanded to more than one machine/assembly instruction.) 17) Continue single-stepping. The program should end up in an infinite loop. 18) Notice that there is a nop instruction after the j endless instruction. This is important! The instructor should comment on this. Don t let him/her forget! If not mentioned, ask for an explanation! You re on your own Using your resources 19) In the Execution Memory and Data Memory windows, determine where the following memory regions begin. Find the first A0xxxxxx address in the Data window and the first 9Dxxxxxx address Execution window. Just note the addresses that the debugger lists. The underscore (xxxx_xxxx) is only a visual convenience. Use the C/C++ notation 0xHHHHHHHH to present a hex value. Data Memory Program Memory 20) Ports make input and output signals available from/to the outside world through device pins. Port A pins are wired to the 8 LEDs, D10-D3. In order to affect the LEDs, Port A bits 7-0 must be manipulated. Look at the PIC32 Data Sheet (PIC32MX3XX-4XX Family Data Sheet from Blackboard Lab Materials) and determine the addresses (virtual) for the following registers. Search for the names in the.pdf file. (Hint: You will be looking at TABLE 12-1: PORTA SFR SUMMARY.) LATA LATASET LATACLR TRISA ODCA

4 21) Determine the 32-bit hex values (e.g. 0xHHHHHHHH with hex digits or X for don t care.) for the TRISA bits and the ODCA bits in order to configure all of the usable Port A pins to be normal, non-open drain, digital logic outputs. Do this by looking at the TRISx and ODCx definitions. TRISx configures a pin to be input or output. ODCx configures an output to be open drain or non-open drain. The x means to use the definition for any Port, e.g. PORTA, PORTB, etc. (Hint: Search for the definitions for REGISTER 12-1 TRISx and REGISTER 12-4 ODCx. Read the Legend to interpret the bit meanings. Scroll down below each REGISTER block to see the bit configuration settings.) TRISA ODCA 22) Modify the lab1.s code to create an infinite loop that does the following. Do this by modifying the code of the main function. It s best if you do not make any function calls. So, strip out the mportaclearbits function; only use a main function with an infinite loop. You will need to use the MIPS Assembly Language Programming online text (Book 1) as a reference. You can also use the MIPS Instruction quick reference for mnemonic descriptions. Use la to load address values using LANLES into registers and li to load IMMEDIATE data values into registers. As with any assembly language program, simpler is usually better and less is more. The top of the file before main should contain: #include <xc.h>.global main.text.set noreorder Configuring an SFR is done as a three instruction sequence: la t0,sfr_label li t1,data_value sw t1,0(t0) // reg t0 gets the address value, e.g. LATACLR // reg t1 gets the data value, e.g. 0xFF // Store t1 into address pointed to // by t0 + 0 displacement Port pin configurations: a. Configure ODCA for non-open drain by writing 0xFF to ODCACLR (ODCASET would make outputs open drain.) b. Configure TRISA for output by writing 0xFF to TRISACLR. (TRISASET would make inputs.) [a and b done one time as a configuration.] Infinite loop: c. Write 0xFF to LATACLR d. Write 0xA5 to LATASET e. For loop delay of (Use Book 1 pp ,.pdf pp You will remove the add a0, a0, t0 loop guts and just use the loop control instructions.) f. Write 0xFF to LATACLR g. Write 0x5A to LATASET h. For loop delay of (Use Book 1 pp ,.pdf pp You will remove the add a0, a0, t0 loop guts and just use the loop control instructions.) i. Jump back to step c (You MUST have a nop after each jump or branch type instruction. Note that Book 1 omits this and not placing the nop WILL cause PROBLEMS.)

5 23) Demonstrate function to instructor. Instructor Initials: 24) Determine if step a in part 22 above was necessary by examining the contents of ODCA in a watch window before and after the sw to ODCA is executed. Explain why or why it is not needed. 25) QUESTION: What does macro instruction mnemonic la stand for? Explain its function or purpose. (Hint: Refer to the Appendix D for the Macro Instruction descriptions.) 26) QUESTION: What does macro instruction mnemonic li stand for? Explain its function or purpose. (Hint: Refer to the Appendix D for the Macro Instruction descriptions.) 27) QUESTION: Explain the similarities and differences between la and li. If necessary, interchange these in your code and test to see what happens. 28) QUESTION: Replace all LATAxxx names with PORTAxxx. Test and explain what changes, if anything. (This is seemingly a trick question but it will soon become apparent that it is not.) 29) QUESTION: Replace the original with Test and explain what happens. 30) QUESTION: Replace the original with Test and explain what happens. Insert breakpoints at the top of each loop for clarification. 31) QUESTION: Replace the original with 100. Test and explain what happens. Insert breakpoints at the top of each loop for clarification.

6 32) QUESTION: Comment out Steps (c) and (f) actions from the algorithm. Test and explain what happens. 33) Restore (uncomment) Steps (c) and (f). Another way to carry out the function of steps (c) and (d) would be to read LATA into a register and then modify the 8 LSBs to have the value 0xA5, then write the modified value to LATA. Implement this functionality for steps (c) and (d) only and demonstrate it to the instructor. Instructor Initials: 34) How many instructions, including macro expansions are needed to implement the functionality that replaced steps (c) and (d) and how many instructions, including macro expansions are needed to implement the original steps (f) and (g)? 35) Configuring an SFR was presented in step 22 using the following three instruction sequence: la t0,sfr_label li t1,data_value sw t1,0(t0) // reg t0 gets the address value, e.g. LATACLR // reg t1 gets the data value, e.g. 0xFF // Store t1 into address pointed to // by t0 + 0 displacement This could be replaced with a two instruction sequence li t1,data_value sw t1,sfr_label // reg t1 gets the data value, e.g. 0xFF // Store t1 into address pointed to Change one of you SFR configurations to use the two instruction sequence approach. How many instructions, including macro expansions are needed to implement each approach? Why does the second approach need fewer instructions?