Computer Arithematics Solved MCQs MCQs Multiple Choice Questions

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1 Computer Arithematics Solved MCQs MCQs Multiple Choice Questions

2 Computer Arithematics Solved MCQs 1) The advantage of single bus over a multi bus is? a. low cost b. flexibility in attaching peripheral devices c. high operating speed d. A and B Explanation: However single bus costs low and it is easy to attach peripheral devices in single bus but multibus architecture have a great advantage in speed and of course, will affect performance also 2) In serial communication, an extra clock is needed? a. to synchronize the devices b. for programmed baud rate control c. to make efficient use of RS-232 d. None of above 3) In which of the following instruction bus idle situation occurs? a. EI b. DAD rp c. INX H d. DAA 4) The addressing used in an instruction of the form ADD X Y is? a. absolute b. immediate c. indirect d. index Explanation: The effective address for an absolute instruction address is the address parameter itself with no modifications. 5) The speed imbalance between memory access and CPU operation can be reduced by? a. cache memory

3 b. memory interleaving c. reducing the size of memory d. A and B 6) Which of the following does not need extra hardware for DRAM refreshing? a b. Motorola c. Z - 80 d. None of these 7) The first operating system used in micro processor is? a. Zenix b. DOS c. CPIM d. Multics 8) Instead of counting with binary number a ring counter uses words that have a single high...? a. bytes b. gate c. bit d. chip 9) The memory cell of a dynamic RAM is simpler and smaller that the memory cell of a... RAM? a. volatile b. semiconductor c. static d. bipolar e. None of above Answer =C

4 10) A multiplexer with a 4 bit data select input is a? a. 4 : 1 multiplexer b. 16 : 1 multiplexer c. 2 : 1 multiplexer d. 8 : 1 multiplexer

5 SET-2 1) Half adder is an example of? a. Combinational Circuits b. Sequential Circuits c. Asynchronous Circuits d. None of these Explanation: Combinational circuits are the circuits whose output depends on the inputs of the same instant of time. 2) In JK flip flop same input, i.e at a particular time or during a clock pulse, the output will oscillate back and forth between 0 and 1. At the end of the clock pulse the value of output Q is uncertain. The situation is referred to as? a. Conversion condition b. Race around condition c. Lock out state d. None of these Explanation:A race around condition is a flaw in an electronic system or process whereby the output and result of the process is unexpectedly dependent on the sequence or timing of other events. 3) In a JK flip flop, if j=k, the resulting flip flop is referred to as? a. D flip flop b. T flip flop c. S-R flip flop d. None of these Explanation: In JK flip flop if both the inputs are same then the flip flop behaves like SR flip flop. 4) Master slave flip flop is also referred to as? a. Level triggered flip flop b. Pulse triggered flip flop c. Edge triggered flip flop

6 d. None of these Explanation:The term pulse triggered means the data is entered on the rising edge of the clock pulse, but the output does not reflect the change until the falling edge of clock pulse. 5) Fetch and decode cycle is required in? a. Direct addressing b. Immediate addressing c. Indirect addressing d. None of above Explanation:Fetch and decode cycle is required in Immediate addressing because it stores the operand directly on which the operation is performed. 6) Valid bit in each cache is associated with? a. Each memory byte in cache b. Each memory word in cache c. One bit with the all memory words d. None of above Explanation:No explanation 7) In J-K flip flop the function K=J is used to realize? a. D flip flop b. S-R flip flop c. T flip flop d. Master slave flip flop Explanation: T flip flop allows the same inputs. So if in JK flip flop J = K then it will work as T flip flop. 8) An encoder has 2 n input lines and... output lines? a. 2 b. n c. 2*n d. n*n

7 Explanation:No Explanation. 9) ASCII code for alphabet character requires... bits? a. 16 b. 15 c. 8 d. 7 Explanation:No explanation 10) The basic limitation of FSM is that? a. An FSM can remember arbitrary large amount of information b. An FSM sometimes recognize grammars that are not regular c. It sometimes fails to recognize grammar that are regular d. All of the above comments are true Explanation: FSM stands for Finite State Machine.

8 SET-3 1) What is the hexadecimal equivalent of a binary number ? a. AF b. 9E c. 8C d. All of above e. None of above Explanation:No Explanation 2) A NOR gate recognizes only the input word whose bits are? a. 0's and 1's b. 1's c. 0's d. 0's or 1's e. None of above 3) The operation which is commutative but not associative is? a. AND b. OR c. EX-OR d. NAND 4) All digital circuits can be realized using only? a. EX-OR gates b. Half adders c. Multiplexers d. OR gates 5) The XOR gates are ideal for testing parity because even parity words produces a... output and odd parity word produces a... output?

9 a. low, high b. high, low c. odd, even d. even, odd e. None of above 6) Flip flop output is always? a. Complementary b. Independent of each other c. the same d. same as inputs e. None of above 7) A half adder adds... bits? a. 16 b. 10 c. 8 d. 2 e. None of above Explanation:No Explanation 8) How many flip - flop circuits are needed to divide by 16? a. Two b. Four c. Eight d. Sixteen 9) A flip flop is a... elements that stores a 216 binary digits as a low or high voltage? a. chip b. bus c. I/O

10 d. memory e. None of above 10) A positive AND gate is also a negative? a. NAND gate b. AND gate c. NOR gate d. OR gate e. None of these

11 SET-4 1) Which of the following is a minimum error code? a. Octal code b. Binary code c. Gray code d. Excess-3 code 2) In a positive edge triggered JK flip flop, a low J and low K produces? a. High state b. Low state c. toggle state d. no change Explanation: In JK Flip Flop if J = K = 0 then it holds its current state. There will be no change. 3) Negative numbers can't be represented in? a. signed magnitude form b. 1's complement form c. 2's complement form d. None of above 4) Which of the following architecture is not suitable for realising SIMD? a. Vector processor b. Array processor c. Von Neumann d. All of above 5) The XOR operator + is? a. commutative b. associative

12 c. distributive over AND operator d. A and B Explanation: As A + B = B + A and A + ( B + C) = (A + B ) + C Hence it is commutative and associative. 6) The binary equivalent of the Gray code is...? a b c d Explanation: The rule for changing the Gray code to binary is that first bit remains the same and the next bit is obtained by adding the first LSB of binary to the second LSB of Gray code and so on... So the answer of the question is ) An assembler that runs on one machine but produces machine code for another machine is called? a. simulator b. emulator c. cross assembler d. boot strap loader Explanation: Cross assembler is an assembler which runs on one type of processor and produces machine code for another. 8) Which of the following unit can be used to measure the speed of a computer? a. SYPS b. MIPS c. BAUD d. FLOPS e. B and D Answer = E Explanation: MIPS measures the execution speed of computers CPU but not the whole system. FLOPS is a measure of computer's performance especially in the field of scientific calculations that makes heavy use of floating point calculations. 9) Which of the following logic families is well suited for high speed operations? a. TTL

13 b. ECL c. MOS d. CMOS Explanation: ECL is used for high speed applications because of its price and power demands. 10) Which of the following comments about half adder are true? a. It adds 2 bits b. It is called so because a full adder involves two half adders c. It does half the work of full adder d. It needs two inputs and generates two outputs e. A, B and D Answer = E

14 SET-5 1) The term sum - of - product in Boolean algebra means? a. The AND function of several OR functions b. The OR function of several AND functions c. The OR function of several OR function d. The AND function of several AND functions Explanation: Sum-Of-Products expressions lend themselves well to implementation as a set of AND gates (products) feeding into a single OR gate (sum). 2) The fan out capability of a digital building block can be defined as? a. The number of inputs that one output can transmit to b. The amount of cooling required for fanning the hear out c. The number of inputs that can transmit to one input d. The maximum power dissipation that the unit can stand e. None of above Explanation: N/A 3) The ALE line of an 8085 microprocessor is used to? a. Execute an RST by hardware b. Executes the instruction supplied by external device through the INTA signal c. Executes an instruction from memory location 20 H d. Executes a NOP Explanation: ALE is address latch enable. the lower order address remains only for a single T satate then ths data is latched and the lower order address bus stores the data. 4) The cost for storing a bit is minimum in? a. Cache b. Register c. RAM d. Magnetic tape

15 Explanation: N/A 5) The index register in a digital computer is used for? a. Pointing to the stack address b. Indirect addressing c. Keeping track of number of times a loop is executed d. Address modification Explanation: An index register in a computer's CPU is a processor register used for modifying operand addresses during the run of a program, typically for doing vector/array operations. 6) After reset the CPU begins execution from the memory location? a. 0000H b. 0001H c. FFEFH d. 8000H Explanation: N/A 7) A single register to clear the lower four bits of the accumulator in 8085 assembly language is? a. XRI 0FH b. ANI FOH c. XRI FOH d. ANI OFH Explanation: ANI FOH ANDs the accumulator with immediate. F leaves the high nibble whatever it is, 0 clears the lower nibble 8) If the total number of states in the fetching and execution phases of an 8085 instruction is known to be 7; the number of machine cycles is? a. 0 b. 1 c. 2 d. 3

16 Explanation: N/A 9) Von Neumann architecture is? a. SISD b. SIMD c. MIMD d. MISD Explanation: In computing, SISD (single instruction, single data) is a term referring to a computer architecture in which a single processor, a uniprocessor, executes a single instruction stream, to operate on data stored in a single memory. This corresponds to the von Neumann architecture. 10) A typical application of MIMD is? a. railway reservation b. weather forecasting c. matrix multiplication d. All of above Explanation: MIMD (multiple instruction, multiple data) is a technique employed to achieve parallelism.

17 SET-6 1) The... is ultraviolet light erasable and electricity programmable.this allows the user to create and store until programs and data are perfected.? a. EPROM b. PROM c. ROM d. RAM Explanation: N/A 2) What table shows the electrical status of digital circuits output for every possible combination of electrical states in the inputs? a. Function Table b. Truth Table c. Routing Table d. ASCII Table 3) The gray code for decimal 7 is? a b c d Explanation: First convert decimal seven to binary that is 0111 then convert it into gray code. 4) Which of the following electronic component are not found in ordinary ICs? a. Diodes b. Transistors c. Resistors d. Inductors Explanation: Inductor is a passive two terminal electronic component that stores energy in its magnetic field 5) Choose the correct statements?

18 a. Bus is a group of information carrying wires b. Bus is needed to achieve reasonable speed of operation c. Bus can carry data or address d. A bus can be shared by more that one device e. All of above Answer = E Explanation: A bus have all the four features. 6) If the memory access takes 20 ns with cache and 110 ns without it,then the hit ratio (cache uses 10 as memory) is? a. 93 % b. 90 % c. 87 % d. 88 % Explanation: If we find what we want in the cache then it is called Hit otherwise it is miss. 7) Any instruction should have at least? a. 2 operands b. 1 operand c. 3 operands d. None of above Explanation: An instruction can be without operand also. 8) The number of clock cycles necessary to complete 1 fetch cycle in 8085 is? a. 3 or 4 b. 4 or 5 c. 4 or 6 d. 3 or 5 9) Motorola's is comparable to? a b c d

19 Explanation: Motorola is a microprocessor released in It is called as oh - four - oh or oh forty 10) The addressing mode used in the instruction PUSH B? a. Direct b. Register c. Register Indirect d. Immediate Explanation:In register indirect addressing mode the operand is found from the memory whose address is fetched from the register in the instruction code.

20 SET-7 1) On receiving an interrupt from an I/O device, the CPU? a. halts for a predetermined time b. hands over control of address bus and data bus to the interrupting device. c. branches off to the interrupt service routine immediately d. branches off to the interrupt service routine after the completion of the current instruction. 2) To get boolean expression in the product of sum form from a given Karnaugh map? a. don't care condition should not be present b. don't care conditions if present should be takes as zeros c. one should cover all the 0's present and complement the resulting expression. d. one should cover all the 1'a present and complement the resulting expression. 3) The reduced form of the boolean expression (A + B)(A + C) is? a. AB + AC b. AC + B c. A + B + C d. A + BC 4) Name the cache also known as internal cache? a. L1 cache b. L2 cache c. L3 cache d. L4 cache Explanation:L1 cache is also known as internal cache and it resides in the CPU. L2 is known as secondary cache and it is within the motherboard. 5) Which of the following is not a CPU register? a. Memory control register b. Memory data register c. Memory buffer register

21 d. Instruction register Explanation: There is no MCR in the CPU 6) The main task of memory address register is? a. stores the address of next location in the main memory b. stores the address of next location in cache memory c. stores the address of next location in secondary memory d. stores the address of output device to which the data is sent 7) Which register indicates whether the data register holds the data to be transferred or not? a. MAR b. MBR c. MDR d. Status register 8) Which of the following operation represents the machine cycle? a. Fetch - Execute - Decode - Store b. Execute - Decode - Store - Fetch c. Decode - Fetch - Store - Execute d. Fetch - Decode -Execute - Store Explanation: In Fetch phase the instruction is brought into the computer, in Decode phase the instruction in divided into different parts, in Execute phase the decoded instruction is executed by the CPU and finally the result sent to the output device or main memory. 9) The decoding phase of instruction cycle is also known as? a. Translating b. Interpreting c. Analyzing d. Breaking Answer =B Explanation:Decoding phase is also known as interpreting as the instruction in

22 interpreted to determine two key attribute of the instruction, the opcode and the operand. 10) Cache memory is used to transfer data between? a. Main memory and secondary memory b. Processor and main memory c. Processor and secondary memory d. Processor and output device Explanation:Cache is always placed between the main memory and processor in the computer system.

23 SET-8 1) Which memory stores the data permanently? a. Primary memory b. Secondary memory c. Cache memory d. Registers Explanation: Secondary memory stores the data permanently until we remove it. 2) Which of the following is the cheapest type of memory? a. Secondary memory b. Primary memory c. Cache memory d. ROM Explanation: Secondary memory is the cheapest form because it can not process the data through the CPU directly. The data must be brought into the primary memory form execution. Therefore secondary memory is the form of slowest memory. 3) Which of the following is auxiliary memory of the computer system? a. ROM b. SRAM c. Cache memory d. Magnetic tape Explanation:ROM is the secondary memory which stores the data permanently also known as auxiliary memory. 4) What does IBG stands for? a. Intra byte gaps b. Inter block gaps c. Inter bit gaps d. Intra block gaps Explanation:Inter block gaps is the space between the two consecutive physical blocks of memory. 5) On what type of ROM data can be written only once?

24 a. PROM b. EPROM c. EEPROM d. EROM Explanation:In Programmable Read Only Memory once the data is written it remains there forever. 6) In optical storage system which medium is used for reading and recording data? a. Laser light b. Black light c. High energy visible light d. Ultraviolet light Explanation: Optical storage system use the laser light to retrieve as well as to record the data. 7) Which is known as solid state memory? a. Parallel serial bus b. Universal parallel bus c. Universal serial bus d. Universal computer bus Explanation:No Explanation 8) In MO system which of the following temperature is used as a recording medium? a. Room temperature b. Curie temperature c. Neel temperature d. Boiling point temperature Explanation:Curie temperature is used for recording data in Magneto Optical system. Curie temperature is the temperature at which the material loses its magnetic properties and above this temperature the material becomes paramagnetic. 9) The amount of space available in the computer system for holding the data is called? a. Storage space b. Storage area

25 c. Storage capacity d. Storage address 10) Which of the following is not a type of magnetic storage system? a. Magnetic tape b. Floppy disk c. Compact disk d. Hard disk Explanation: Compact disk is the optical storage system not the magnetic storage system.

26 SET-9 1) Computer use thousands of flip flops. To coordinate the overall action, a common signal called the... is sent to each flip - flop.? a. latch b. master c. clock d. slave e. None of above Explanation: To coordinate the overall action, a square wave signal called the clock is sent to each flip flop. This signal prevents the flip flop from changing states until the right time. 2) Which of the following flip flop is free from race around condition? a. SR flip flop b. T flip flop c. Master slave flip flop d. All of above Explanation: Toggling more that once during a clock cycle is called racing. JK master slave flip flop avoids racing. 3) Which logic family dissipates the minimum power? a. DTL b. ECL c. TTL d. CMOS e. None of above Explanation: CMOS dissipates low power. Typically the static power dissipation is 10 nw per gate which is due to the flow of leakage currents. 4) The functional capacity of SSI devices is? a. 1 to 11 gates b. 12 to 99 gates c. 100 to 10,000 gates d. More than 10,000 gates

27 e. None of above 5) What advantage do ICs have over discrete devices due to their greater complexity? a. Smaller size b. Higher Reliability c. Lower cost d. All of above Answer =D Explanation: ICs can also combine analog and digital circuits on a single chip to create functions such as A/D converters and D/A converters. Such circuits offer smaller size and lower cost, but must carefully account for signal interference. 6) A subtractor is usually not present in computer because? a. It is expensive b. It is not possible to design it c. The adder will take care of subtraction d. None of above Explanation: A subtractor can be designed using the same approach as that of an adder. 7) A chip having 150 gates will be classified as? a. SSI b. MSI c. LSI d. VLSI Explanation: Latent semantic indexing (LSI) is an indexing and retrieval method that uses a mathematical technique called Singular value decomposition (SVD) to identify patterns in the relationships between the terms and concepts contained in an unstructured collection of text. 8) Pseudo instructions are? a. assembler directive b. instruction in any program that have no corresponding machine code instruction c. instruction in any program whose presence or absence will not change the output for any input d. None of above

28 Explanation: Pseudo instructions are simply the assembly instructions that do not have a direct machine language equivalent. 9) Programming in a language that actually controls the path of signals or data within the computer is called? a. micro programming b. system programming c. assembly programming d. machine language programming Explanation:No Explanation 10) Which of the following is not typically found in the status register of micro processor? a. overflow b. zero result c. negative result d. none of above Explanation: A status register or flag register is a collection of flag bits for a processor. The status register is a hardware register which contains information about the state of the processor

29 SET-10 1) The advantage of single bus over a multi bus is? a. low cost b. flexibility in attaching peripheral devices c. high operating speed d. A and B Explanation: However single bus costs low and it is easy to attach peripheral devices in single bus but multibus architecture have a great advantage in speed and of course, will affect performance also 2) In serial communication, an extra clock is needed? a. to synchronize the devices b. for programmed baud rate control c. to make efficient use of RS-232 d. None of above 3) In which of the following instruction bus idle situation occurs? a. EI b. DAD rp c. INX H d. DAA 4) The addressing used in an instruction of the form ADD X Y is? a. absolute b. immediate c. indirect d. index Explanation: The effective address for an absolute instruction address is the address parameter itself with no modifications. 5) The speed imbalance between memory access and CPU operation can be reduced by?

30 a. cache memory b. memory interleaving c. reducing the size of memory d. A and B 6) Which of the following does not need extra hardware for DRAM refreshing? a b. Motorola c. Z - 80 d. None of these 7) The first operating system used in micro processor is? a. Zenix b. DOS c. CPIM d. Multics 8) Instead of counting with binary number a ring counter uses words that have a single high...? a. bytes b. gate c. bit d. chip 9) The memory cell of a dynamic RAM is simpler and smaller that the memory cell of a... RAM? a. volatile b. semiconductor c. static d. bipolar e. None of above

31 Answer =C 10) A multiplexer with a 4 bit data select input is a? a. 4 : 1 multiplexer b. 16 : 1 multiplexer c. 2 : 1 multiplexer d. 8 : 1 multiplexer

3. The high voltage level of a digital signal in positive logic is : a) 1 b) 0 c) either 1 or 0

3. The high voltage level of a digital signal in positive logic is : a) 1 b) 0 c) either 1 or 0 1. The number of level in a digital signal is: a) one b) two c) four d) ten 2. A pure sine wave is : a) a digital signal b) analog signal c) can be digital or analog signal d) neither digital nor analog