Hi Hsiao-Lung Chan Dept Electrical Engineering Chang Gung University, Taiwan

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1 Bank Switching, Table, Macros & Modules Hi Hsiao-Lung Chan Dept Electrical Engineering Chang Gung University, Taiwan

2 PIC18 memory access up to 2 MB of program memory Inside the c chip Program Memory Space (a portion of this space is on the c chip) 21-bit progam address 16-bit instruction bus Program counter (PC) PIC18 CPU 4096 registers 12-bit register address 8-bit data bus Data Memory Space (Special function registers and general purpose RAM) Figure The PIC18 memory spaces 2

3 Addressing modes in PIC18 Immediate addressing mode MOVLW 0x25 SUBLW D 62 ANDLW B

4 Addressing modes in PIC18 Direct addressing mode MOVWF 0x40 MOVFF 0x40, 0x50 4

5 Special function register MOVWF 0x81 MOVWF PORTB BSF 0xD8, 0 BSF STATUS, C 5

6 Addressing modes in PIC18 (cont.) Indirect addressing through File select registers (FSR) FSR0, FSR1, FSR2 12 bits for addressing the entire memory (4096 bytes) 6

7 FSR examples movwf INDF0 copy the contents of WREG to the memory specified by the FSR0 [FSR0] = WREG movwf POSTDEC0 [FSR0] = WREG FSR0 = FSR0-1 movwf PREINC0 FSR0 = FSR0 + 1 [FSR0] = WREG clrf PLUSW0 [FSR0 + WREG] = 0 7

8 FSR examples (cont.) movf POSTDEC0,W WREG = [FSR0] FSR0 = FSR0-1 movff POSTINC1, PRODL PRODL = [FSR1] FSR1 = FSR1 + 1 movff PLUSW2, PRODH PRODH = [FSR2 + WREG] addwf PREINC1,F FSR1 = FSR1 + 1 [FSR1] = [FSR1] + WREG 8

9 Example: Copy 55H to RAM memory locations 40H to 44H Direct addressing mode Register indirect addressing MOVLW 0x55 mode without a loop MOVWF MOVWF 0x40 0x44 Register indirect addressing mode with a loop COUNT EQU 0x10 MOVLW 0x5 MOVWF COUNT LFSR 0, 0x40 MOVLW 0x55 B1 MOVWF INDF0 INCF FSR0L, F DECF COUNT, F BNZ B1 MOVLW 0x55 LFSR 0, 0x40 0 MOVWF INDF0 INCF FSR0L, F MOVWF INDF0 INCF FSR0L, F MOVWF INDF0 9

10 Example: Clear 16 RAM locations starting at RAM address 60H Using INCF FSRnL Using auto-increment COUNT EQU 0x10 CNTVAL EQU D 16 MOVLW CNTVAL MOVWF COUNT LFSR 1, 0x60 B2 CLRF INDF1 INCF FSR1L, F DECF COUNT, F BNZ B2 COUNT EQU 0x10 CNTVAL EQU D 16 MOVLW CNTVAL MOVWF COUNT LFSR 1, 0x60 B2 CLRF POSTINC1 DECF COUNT, F BNZ B2 10

11 Example: Copy a block of 5 bytes of data from RAM locations starting at 30H to locations starting at 60H COUNT EQU 0x10 CNTVAL EQU D 5 MOVLW CNTVAL MOVWF COUNT LFSR 0, 0x30 LFSR 1, 0x60 B3 MOVF POSTINC0, W MOVWF POSTINC1 DECF COUNT, F BNZ B3 11

12 Example: Add the value of data from RAM locations at 40-43H and place the result in locations 0x06 and 0x07 COUNT EQU 0x20 L_BYTE EQU 0x06 H_BYTE EQU 0x07 CNTVAL EQU 4 MOVLW CNTVAL MOVWF COUNT LFSR 0, 0x40 CLRF WREG CLRF H_ BYTE B5 ADDWF POSTINC0, W BNC OVER INCF H_BYTE, F OVER DECF COUNT, F BNZ B5 MOVWF L_BYTE 12

13 Look-up table and table processing Table write (TBLWT) Table read (TBLRD) 13

14 Table read and write instructions Table 2.11 PIC18 MCU table read and write instructions Mnemonic, operator TBLRD* TBLRD*+ TBLRD*- TBLRD+* TBLWT* TBLWT*+ TBLWT*- TBLWT+* Description Table read Table read with post-increment Table read with post-decrement Table read with pre-increment Table write Table write with post-increment Table write with post-decrement Table write with pre-increment 16-bit instruction word Status affected none none none none none none none none 14

15 DB (define byte) fixed data in program ROM ORG 500H DATA1 DB D 28 DATA2 DB B DATA3 DB 0x39 ORG 510H DATA4 DB Y DATA5 DB 2, 0, 0, 5 ORG 520H DATA6 DB Hello END 15

16 TBLRD example ORG H ORG H CLRF TRISB CLRF TRISB MOVLW 0x0 MOVLW 0x0 MOVWF TBLPTRL MOVWF TBLPTRL MOVLW 0x05 MOVLW 0x05 MOVWF TBLPTRH MOVWF TBLPTRH TBLRD* TBLRD*+ MOVFF TABLAT, PORTB MOVFF TABLAT, PORTB INCF TBLPTRL, F TBLRD*+ TBLRD* MOVFF TABLAT, PORTB MOVFF TABLAT, PORTB TBLRD*+ INCF TBLPTRL, F MOVFF TABLAT, PORTB TBLRD* HERE GOTO HERE MOVFF TABLAT, PORTB ORG 500H HERE GOTO HERE MYDATA DB USA ORG 500H END MYDATA DB USA END 16

17 TBLRD example using loop ORG H MOVLW 0x00 MOVWF TBLPTRL MOVLW 0x05 MOVWF TBLPTRH LFSR 2, 0x40 B8 TBLRD*+ MOVF TABLAT, W BZ EXIT MOVWF POSTINC2 BRA B8 EXIT GOTO EXIT ORG 0x500 MYDATA DB The Promise of World Peace, 0 END 17

18 Look-up table and RETLW instruction: Send ASCII characters to Port D based on Port C status ORG H SETF TRISC CLRF TRISD B1 MOVF PORTC, W ANDLW B 0111 CALL ASC_TABLE MOVWF POTRD BRA B1 ASC_TABLE MULLW 0x2 MOVFF PRODL, WREG ADDWF PCL RETLW 0 RETLW 1. A RETLW 7 END 18

19 Look-up table and RETLW instruction: Get x value from Port B and send x 2 +2x+3 to Port C ORG H SETF TRISB CLRF TRISC B1 MOVF PORTB, W ANDLW 0x0F CALL XSQR_TABLE MOVWF POTRC BRA B1 XSQR_TABLE MULLW 0x2 MOVFF PRODL, WREG ADDWF PCL RETLW D 3 RETLW D 6. A RETLW D 102 END 19

20 Write a program to find out the number of elements in an array of 8-bit elements that are a multiple of 8. The array is in the program memory 20

21 Number of elements of a multiple of 8 ilimit equ 0x20 ; loop index limit count equ 0x00 ii equ 0x01 ; loop index mask equ 0x07 ; used to masked upper five bits start clrf count movlw ilimit movwf ii ; initialize ii to ilimit movlw upper array movwf TBLPTRU movlw high array movwf TBLPTRH movlw low array movwf TBLPTRL movlw mask 21

22 Number of elements of a multiple of 8 (cont.) i_loop tblrd*+ ; read an array element into TABLAT andwf TABLAT,F bnz next ; branch if not a multiple of 8 incf count,f ; is a multiple of 8 next decfsz ii,f ; decrement loop count bra i_loop nop array db 0x00,0x01,0x30,0x03,0x04,0x05,0x06,0x07,0x08,0x09 db 0x0A,0x0B,0x0C,0x0D,0x0E,0x0F,0x10,0x11,0x12,0x13 db 0x14,0x15,0x16,0x17,0x18,0x19,0x1A,0x1B,0x1C,0x1D db 01E01F 0x1E,0x1F end 22

23 PIC18 banks and access bank 23

24 PIC18 banks and access bank (cont.) PIC18 banks 4096 registers are divided into 16 banks. Only one bank is active at a time. Bank switching When operating on a register in a different bank, bank switching is needed. Access bank is created to minimize the problems of bank switching. 24

25 Copy the value 55H into RAM memory locations 340H to 345H Direct addressing mode Indirect addressing mode MOVLB 0x3 MOVLW 0x55 MOVWF 0x40, 1 MOVWF 0x41, 1 MOVWF 0x44, BANKED COUNT EQU MOVLW MOVWF 0x10 0x5 COUNT LFSR 0, 0x340 MOVLW 0x55 B1 MOVWF INDF0 INCF FSR0L DECF COUNT, F BNZ B1 default 25

26 Example: Copy a block of data from RAM locations 330H-33FH 33FH to 360H-36FH 36FH COUNT EQU 0x20 CNTVAL EQU 0xF MOVLW CNTVAL MOVWF COUNT LFSR 1, 0x330 LFSR 2, 0x360 B3 MOVF INDF1, INDF2 INCF FSR1L INCF FSR2L DECF COUNT, F BNZ B3 26

27 Macros Instructions are grouped together and assigned a name By entering the macro name, the same group of instructions can be duplicated in any yplace of the program User program is made more readable by using macros 27

28 Macro example Define a macro ; WREG [arg1]+[arg2]+[arg3] sum_of_3 macro arg1, arg2, arg3 Invoke the macro movf arg1,w,a addwf arg2,w,a addwf arg3,w,a endm sum_of_3 0x20,0x21,0x

29 Local directive in macro MOVLF MACRO K, MYREG ORG 0 MOVLW K CLRF TRISB MOVWF MYREG OVER MOVLF 0x55, PORTB ENDM DELAY_1 0x200, 0x10 MOVLF 0xAA, PORTB DELAY_1 MACRO V1, TREG DELAY_1 0x200, 0x10 LOCAL BACK MOVLW V1 BRA OVER END MOVWF TREG BACK NOP NOP DECF TREG, F BNZ BACK ENDM 29

30 Include directive for macro #include P18F458.INC #include MYMACRO1.MAC ORG 0 CLRF TRISB OVER MOVLF 0x55, PORTB DELAY_1 0x200, 0x10 MOVLF 0xAA, PORTB DELAY_1 0x200, 0x10 BRA OVER END 30

31 Modules Break down program into small modules Make project more manageable Example RAM_ADDR EQU 40H COUNTREG EQU 0x20 CNTVAL EQU 4 CNTVAL1 EQU 5 EXTERN CAL_CHKSUM EXTERN TEST_CHKSUM PGM CODE ORG 0 CALL COPY_DATA CALL CAL_CHKSUM CALL TEST_CHKSUM COPY_DATA BRA $ 31

32 Modules (cont.) RAM_ADDR EQU 40H RAM_ADDR EQU 40H COUNTREG EQU 0x20 COUNTREG EQU 0x20 CNTVAL EQU 4 CNTVAL EQU 4 CNTVAL1 EQU 5 CNTVAL1 EQU 5 GLOBAL CAL_CHKSUM GLOBAL TEST_CHKSUM PGM CODE CAL_CHKSUM MOVLW CNTVAL RETURN END PGM CODE TEST_CHKSUM MOVLW CNTVAL RETURN END 32

33 Reference M.A. Mazidi, R.D. Mckinlay, D Causey, PIC Microcontroller and Embedded Systems Using Assembly and C for PIC18, Pearson Education Inc., Han-Way Huang, PIC Microcontroller: An Introduction to Software and Hardware Interfacing, Thomson Delmar Learning,

PIC Architecture & Assembly Language Programming. Hsiao-Lung Chan Dept Electrical Engineering Chang Gung University, Taiwan

PIC Architecture & Assembly Language Programming Hsiao-Lung Chan Dept Electrical Engineering Chang Gung University, Taiwan chanhl@mail.cgu.edu.tw ALU with working register (WREG) and literal value 2 MOVLW