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1 Preliminary 512K X 8 OTP CMOS EPROM Document Title 512K X 8 OTP CMOS EPROM Revision History Rev. No. History Issue Date Remark 0.0 Initial issue June 17, 1998 Preliminary 1.0 Change CE from VIL to VIH during program verify mode July 27, 1998 Change 32-pin SOP package type to 32-pin TSOP type I 1.1 Change program verify mode VCC from 6.25V to VCC December 16, 1998 PRELIMINARY (December, 1998, Version 1.1) AMIC Technology, Inc.
2 Preliminary 512K X 8 OTP CMOS EPROM Features 524,288 X 8 bit organization Programming voltage: 12.75V Access time: 55/70/90 ns (max.) Current: Operating: 30mA (max.) at 5MHz Standby: 100µA (max.) General Description The A chip is a high-performance 4,194,304 bit one-time programmable read only memory (OTP EPROM) organized as 512K by 8 bits. The A requires only 5V power supply in normal read mode Pin Configurations All inputs and outputs are directly TTL-compatible Available in 32-pin DIP/TSOP and 32-PLCC packages operation and any input signals are TTL levels. The A is available in industry standard 32 pin dual-inline, 32 lead TSOP and 32 lead PLCC packages. DIP TSOP (Type I) PLCC VPP 1 32 VCC A12 A15 A16 VPP VCC A18 A17 A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O A A18 30 A17 29 A14 28 A13 27 A8 26 A9 25 A11 24 OE 23 A10 22 CE 21 I/O7 20 I/O6 A11 1 A9 2 A8 3 A13 4 A14 5 A17 6 A VCC VPP A16 A15 A12 A7 A6 A5 A ~ ~ A279308V OE A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 VSS I/O2 I/O1 I/O0 A0 A1 A2 A3 A7 A6 A5 A4 A3 A2 A1 A0 I/O A279308L A14 A13 A8 A9 A11 OE A10 CE I/O7 I/O I/O5 I/O I/O4 I/O1 I/O2 GND I/O3 I/O4 I/O5 I/O6 GND I/O3 PRELIMINARY (December, 1998, Version 11) 1 AMIC Technology, Inc.
3 Pin Configurations Pin Name A0-A18 I/O0-I/O7 CE OE NC VPP VCC GND Function Address Inputs Data Inputs / Outputs Chip Enable Output Enable No Internal Connection Program Power Supply Power Supply Ground Operating Modes and Truth Table Mode CE OE A0 A1 A9 VPP VCC I/O7-I/O0 Read VIL VIL X X X VCC VCC Data Out Output Disable VIL VIH X X X VCC VCC Hi-Z Standby VIH X X X X VCC VCC Hi-Z Program VIL VIH X X X 12.75V 6.25V Data In Program Verify VIH VIL X X X 12.75V VCC Data Out Program Inhibit VIH VIH X X X 12.75V 6.25V Hi-Z Manufacturer Code (3) VIL VIL VIL VIL VID VCC VCC 37H Device Code (3) VIL VIL VIH VIL VID VCC VCC 41H Continuation Code (3) VIL VIL VIL VIH VID VCC VCC 7FH Notes: 1. X = Either VIH or VIL. 2. VID = 12V ± 0.5V. 3. A2 ~ A8 = A10 ~ A18 = VIL (For auto identification) PRELIMINARY (December, 1998, Version 1.1) 2 AMIC Technology, Inc.
4 Functional Description Read Mode The A has two control functions, both of which must be logically active in order to obtain data at the outputs. CE is the power control and should be used for device selection. OE is the output control and should be used to data to the output pins, which is independent of device selection. Assuming that addresses are stable, address access time (taa) is equal to the delay from CE to output (tce). Data is available at the output after a delay (toe) from the falling edge of OE, as long as CE has been low and the addresses have been stable for at least taa - toe. Standby Mode The A has a standby mode which reduces the active current from 30mA to 100µA. The A is placed in the standby mode by applying a CMOS high signal to CE. When in the standby mode, the output are in a high impedance state, independent of the OE. Auto Identify Mode The auto identify mode allows the reading out of a binary code from a EPROM that will identify its manufacturer and type. This mode is intended for use by programming equipment for the purpose of automatically matching the device to be programmed with its corresponding programming algorithm. To activate the mode, the programming equipment must apply 12.0V ± 0.5V on address line A9 of the A Three identification code can be read from data output pin by toggling A0 and A1. The Other addresses must be held at VIL during this mode. Byte 0 (with A0 at VIL, A1 at VIL) represents the manufacturer code which is 37H. Byte 1 and Byte 2 represent the device code and continuation code, which is 41H and 7FH respectively. All identifiers for these codes will possess odd parity, with MSB (IO7) defined the parity bit. Absolute Maximum Ratings* Ambient Operating Temperature (TA) C to +85 C Storage Temperature Plastic Package (T STG) C to 125 C Applied Input Voltage (VI): All Pins Except A9, VPP and VCC V to VCC + 0.6V A9, VPP V to 13.5V VCC V to 7.0V Output Voltage (VO) V to 7.0V (Note 1) *Comments Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to this device. These are stress ratings only. Functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is not implied or intended. Exposure to the absolute maximum rating conditions for extended periods may affect device reliability. Notes: 1. During voltage transitions, the input may undershoot GND to -2.0V for periods less than 20 ns. Maximum DC voltage on input and I/O may overshoot to VCC + 2.0V for periods less than 20 ns. 2. When transitions, A9 and VPP may undershoot GND to -2.0V for periods less than 20 ns. Maximum DC input voltage on A9 and VPP is +13.5V which may overshoot to 14.0V for period less than 20 ns. PRELIMINARY (December, 1998, Version 1.1) 3 AMIC Technology, Inc.
5 Read Mode DC Electrical Characteristics (Ta = 0 C to 70 C, VCC = 5V ± 10%, VPP = VCC) Symbol Parameter Min. Max. Unit Conditions VOH Output High Voltage 2.4 V IOH = -400µA VOL Output Low Voltage 0.4 V IOL = 2.1mA VIH Input High Voltage 2.0 VCC V VIL Input Low Voltage V ILI Input Leakage Current µa VCC = max. Vin = 0V to VCC ILO Output Leakage Current µa VCC = max. Vout = 0V to VCC ICC VCC Read Operating Current 30 ma VCC = max. CE = VIL, OE = VIL Iout = 0mA, at 5MHz ISB VCC Standby Current (TTL) 1 ma VCC = max. CE = VIH ISB1 VCC Standby Current (CMOS) 100 µa VCC = max. CE = VCC - 0.2V IPP VPP Current During Read 10 µa CE = OE = VIL, VPP = VCC IID A9 Auto Select Current 100 µa A9 = VID, VCC = max. Capacitance (TA = 25 C, f = 1.0MHz) Symbol Parameter Min. Max. Unit Conditions CIN Input Capacitance 8 pf VIN = 0V COut Output Capacitance 8 pf VOut = 0V * These parameters are sampled and not 100% tested. PRELIMINARY (December, 1998, Version 1.1) 4 AMIC Technology, Inc.
6 Read Mode AC Characteristics (Ta = 0 C to 70 C, VCC = 5V ± 10%, VPP = VCC) Symbol Parameter 55ns 70ns 90ns Unit Min. Max. Min. Max. Min. Max. tcyc Cycle Time ns taa Address Access Time ns tce Chip Enable Access Time ns toe Output Enable Access Time ns toh Output Hold after Address, CE or OE, whichever Occurred First ns thz Output High Z Delay ns Read Mode Switching Waveforms tcyc ADDRESS Address Valid CE tce OE thz taa toe toh OUTPUT Valid Output High-Z PRELIMINARY (December, 1998, Version 1.1) 5 AMIC Technology, Inc.
7 AC Measurement Conditions for 55 ns 1 Input Rise and Fall Times 10 ns 2 Input Pulse Voltage: 0V to 3Volt 3 Input and Output Timing Ref. Voltage: 1.5Volt 3.0V 0V INPUT TEST 1.5V 1.5V POINTS OUTPUT for 70/90 ns 1 Input Rise and Fall Times 10 ns 2 Input Pulse Voltage: 0.4V to 2.4Volt 3 Input and Output Timing Ref. Voltage: 0.8V to 2.0Volt 2.4V 0.4V AC Testing Load Circuit INPUT 2.0V TEST 2.0V 0.8V POINTS 0.8V OUTPUT 1.3V 1N KΩ DEVICE UNDER TEST OUT CL = 30pF or 100pF CL = 30pF for 55 ns CL = 100pF for 70/90 ns CL includes JIG capacitance PRELIMINARY (December, 1998, Version 1.1) 6 AMIC Technology, Inc.
8 Programming and Program Verify The programming flowchart is shown in Page 10. The A is shipped with all bits being set to "1". Programming causes relevant bits to be changed to "0". The programming mode is started by setting VCC to +6.25V and VPP to V, while CE is at VIL and OE is at VIH. Data to be programmed can be directly input in the 8 bit format through the data bus. The write programming algorithm reduces programming time by using 100µs pulse followed by a byte verification to determine whether the byte has been successfully programmed. If the data does not pass the verification, an additional pulse programming is applied for a maximum of 25 pulses. On completion of 1 byte programming and, The verified address is incremented. After the final address is completed, all bytes are verified again with VCC = 5.0 Volt. Program Inhibit This mode is used to program one of multiple A whose OE, VPP, VCC, address bus and data bus are connected in parallel. When programming is performed, other A can be inhibited from being programmed by setting their CE and OE pins to VIH. Programming Mode DC Characteristics (Ta = 0 C to 70 C, VCC = 6.25V ± 0.25V, VPP = 12.75V ± 0.25V) Symbol Parameter Min. Max. Unit Test Conditions VOH Output High Voltage 2.4 V IOH = -400µA VOL Output Low Voltage 0.4 V IOL = 2.1mA VIH Input High Voltage 2.0 VCC V VIL Input Low Voltage V ILI Input Leakage Current µa VCC = max. Vin = 0V to VCC ICC VCC Current During Program 50 ma IPP VPP Current During Program 50 ma CE = VIL VID A9 Auto Select Voltage V A9 = VID VCC1 Programming Supply Voltage V VPP1 Programming Voltage V Note: VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP. PRELIMINARY (December, 1998, Version 1.1) 7 AMIC Technology, Inc.
9 Programming Mode AC Characteristics (Ta = 0 C to 70 C, VCC= 6.25V ± 0.25V, VPP = 12.75V ± 0.25V) Symbol Parameter Min. Max. Unit tas Address Valid to Program Low 2 µs tds Input Valid to Program Low 2 µs tvps VPP High to Program Low 2 µs tvcs VCC High to Program Low 2 µs tpw Program Pulse Width µs tdh Program High to Input transition 2 µs toes OE Set up Time 2 µs toe OE Low to Output Valid 100 ns tohz OE High to Output Hi-Z 130 ns tah OE High to Address Transition 0 ns tce Chip Enable Access Time 100 ns PRELIMINARY (December, 1998, Version 1.1) 8 AMIC Technology, Inc.
10 Programming and Verify Mode AC Waveforms VIH PROGRAM PROGRAM VERIFY ADDRESS VIL VALID tas DATA DATA IN DATA OUT tds tdh VPP1 VPP VCC tvps toe tohz VCC1 VCC VCC tvcs tah tpw VIH CE VIL toes VIH OE VIL PRELIMINARY (December, 1998, Version 1.1) 9 AMIC Technology, Inc.
11 Programming Flowchart START ADDRESS=FIRST LOCATION INTERACTIVE SECTION VCC=6.25V VPP=12.75V X = 0 PROGRAM ONE 100µs PULSE INCREMENT X X = 25? YES NO FAIL VERIFY BYTE VERIFY BYTE FAIL PASS PASS INCREMENT ADDRESS NO LAST ADDRESS YES VCC=VPP=5.0V VERIFY SECTION VERIFY ALL BYTES? FAIL DEVICE FAILED PASS DEVICE PASSED PRELIMINARY (December, 1998, Version 1.1) 10 AMIC Technology, Inc.
12 Ordering Information Part No. Access Time (ns) Operating Current Max. (ma) at 5MHz Standby Current Max. (µa) Package A Pin DIP A279308V Pin TSOP (I) A279308L Pin PLCC A Pin DIP A279308V Pin TSOP (I) A279308L Pin PLCC A Pin DIP A279308V Pin TSOP (I) A279308L Pin PLCC PRELIMINARY (December, 1998, Version 1.1) 11 AMIC Technology, Inc.
13 Package Information P-DIP 32L Outline Dimensions unit: inches/mm D E 1 16 E1 C A A2 A1 Base Plane L Seating Plane B B1 e θ EA Symbol Dimensions in inches Dimensions in mm Min Nom Max Min Nom Max A A A B B C D E E EA e L θ Notes: 1. The maximum value of dimension D includes end flash. 2. Dimension E does not include resin fins. PRELIMINARY (December, 1998, Version 1.1) 12 AMIC Technology, Inc.
14 Package Information TSOP 32L TYPE I (8 X 20mm) Outline Dimensions unit: inches/mm D c A1 E A2 A e L θ LE HD Detail "A" Detail "A" D y S b Symbol Dimensions in inches Dimensions in mm Min Nom Max Min Nom Max A A A b c D E e BSC 0.50 BSC HD L LE S y θ Notes: 1. The maximum value of dimension D includes end flash. 2. Dimension E does not include resin fins. 3. Dimension S includes end flash. PRELIMINARY (December, 1998, Version 1.1) 13 AMIC Technology, Inc.
15 Package Information PLCC 32L Outline Dimension unit: inches/mm 13 HD D E HE e GD b b1 D y A1 A2 A θ GE c L Symbol Dimensions in inches Dimensions in mm Min Nom Max Min Nom Max A A A b b C D E e GD GE HD HE L y θ Notes: 1. Dimensions D and E do not include resin fins. 2. Dimensions GD & GE are for PC Board surface mount pad pitch design reference only. PRELIMINARY (December, 1998, Version 1.1) 14 AMIC Technology, Inc.
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