FlashLINK JTAG Programming Cable for PSD and upsd

Transcription

1 USER MANUAL FlashLINK Programming Cable for PSD and upsd FEATURES Allows PC or Notebook parallel port to program upsd and PSD devices using PSDsoft Express software development tool. Supports IEEE 49. signals (,,, ). Supports additional signals ( and TERR) to reduce programming time. Single FlashLINK Cable assembly supports both.v and V target devices with no manual configuration. Target device may operate from.v to.v. Flying Lead cable included to adapt to any target connector using 0.0 square posts. LoopTest cable included to validate PC parallel port operation. OVERVIEW The family of Flash PSD and upsd devices offer In-System Programming (ISP) allowing a completely blank device to be programmed while soldered to a circuit board. This simplifies manufacturing and provides an effective way to update products after they are in use. Flash PSD and upsd devices comply to the core requirements of the IEEE 49. specification. However, these devices do not support boundary scan functions. Instead, they support ISP, and some upsd devices support emulation through. The FlashLINK cable assembly shown in Figure will perform ISP only on upsd and PSD devices, not memory or logic devices from other vendors. The software development tool PSDsoft Express is a Windows based program which operates the FlashLINK cable assembly (PSDsoft Express may be downloaded at no charge from PSDsoft Express supports device chaining, meaning more than one upsd or PSD device can reside in a single chain. Also, other devices (memory, logic from other vendors) may reside in the chain, but these devices will stay in BYPASS Mode. PSDsoft Express will generate BSDL, JAM STAPL, and SVF files for use with rd party programming equipment. The four basic pins (,,, ) on upsd devices are dedicated to operate as pin at all times. However, the four pins on PSD devices may also be used for general I/O functions. ST has created two optional signals ( and TERR) to reduce programming times. These pins supply programing status on signal pins rather than having to scan out the status serially for each byte programmed in Flash memory. Program times using this method (6-pin ) can be as much as 0% less than the standard method (4-pin ). Figure. FlashLINK Cable Assembly Mates with PC parallel port 6 feet DB- Cable, M-F straight-through wiring DB- Cable FlashLINK Adapter Flying lead cable 6 inches WIRES Target device AI06 Note: 4-pin ribbon cable may also be used. Not supplied in FL-0 Kit. March 004 / Rev..0

2 TABLE OF CONTENTS PIN DEFINITION ON FlashLINK ADAPTOR Table. Pin Description for 4-pin FlashLINK Adaptor Connector CONNECTOR DEFINITION Figure. Pinout for FlashLINK Adaptor and Target System connector SOFTWARE Diagnostic Tests CIRCUIT EXAMPLES pin Figure. Circuit Example for 4-pin pin Figure 4. Circuit Example for 6-pin Multiplexed (PSD only) Figure. Circuit Example for Multiplexed pins (PSD only, not upsd) CHAINING DEVICES Figure 6. Example of Chaining Devices FlashLINK SCHEMATIC REVISION HISTORY CONTACT INFORMATION /

3 PIN DEFINITION ON FlashLINK ADAPTOR Table. Pin Description for 4-pin FlashLINK Adaptor Connector Pin # Signal Name Description Type () FlashLINK is Signal: JEN Enable - active-low when traffic is present OC Source TRST () Reset on target, active-low, optional per IEEE 49. OC Source () Signal Ground 4 CNTL () Generic Control signal OC Source IEEE 49. Serial Data Input Source 6 -ISP Programming Status to speed programming, optional Destination (4) DC source from target,.v to.v RST Target system reset, recommended OC Source 9 IEEE 49. Mode Select Source 0 Signal Ground IEEE 49. Clock Source Signal Ground IEEE 49. Serial Data Out Destination 4 TERR -ISP Programming Error Status to speed programming, optional Destination Note:. OC = Open Collector, pulled-up to inside FlashLINK Adaptor.. Not supported by PSDsoft Express, signals remain inactive.. All signal grounds are tied together inside FlashLINK Adaptor. 4. The target must supply to the FlashLINK Adaptor (.V to.vdc, ma max at.v). Not all 4 signals are required for all applications. Here is how they are used: (6) Core signals that must be connected:,,,,, () Optional signals that reduce programming time as much as 0%: and TERR () Optional signal to control multiplexing of signals (PSD only) or to indicate activity: JEN () Optional IEEE-49. signal for chain reset: TRST () Optional (but recommended) signal to allow FlashLINK to reset target system after ISP: RST () Optional generic control signal to target system from FlashLINK: CNTL () Two additional ground lines to help reduce EMI if a ribbon cable is used. These ground lines sandwich the signal in the ribbon cable. These two ground signals are not present on the flying lead cable. /

4 CONNECTOR DEFINITION There is no industry standard connector. Each device manufacturer differs. ST has a specific connector and pinout for the FlashLINK Adaptor. The connector scheme on the FlashLINK connector can accept a standard 4-pin ribbon cable connector ( rows of pins on 0. centers, standard keying) or any other user specific connector that can slide onto 0.0 square posts. The pinout for the FlashLINK Adaptor connector is shown in Figure. A standard ribbon cable is a good way to quickly connect to the target circuit board. If a ribbon cable is used, then the receiving connector on the target system should be the same connector type with the same pinout as the FlashLINK Adaptor shown in Figure. Note: The signal is sourced from the FlashLINK Adaptor and should be routed on the target circuit board so that it connects to the input pin of the PSD or upsd device. Note: The signal is an input received by the FlashLINK Adaptor and is sourced by the PSD or upsd device on its output pin. See Figure, page 6, Figure 4, page, and Figure, page for more information. Figure. Pinout for FlashLINK Adaptor and Target System connector 4 TERR 0 RST () 9 KEY WAY 6 () 4 CNTL TRST JEN AI06 Notes:This diagram perspective is looking into the face of the shrouded male connector on the FlashLINK Adaptor, 0.0-inch (0.6mm) posts on 0.00-inch (.4mm) centers. Connector reference: Molex Recommended ribbon cables for quick connection of the FlashLINK Adaptor to the end-product: Samtec HCSD-0-D S-N; Digikey MCCD-406-ND. Note:. is a signal destination on the FlashLINK and a signal source on the target board.. is a signal source on the FlashLINK and a signal destination on the target board. 4/

5 SOFTWARE The FlashLINK cable assembly is driven by the software development tool PSDsoft Express (available at no charge from With this tool you define the pin functions, memory map, and PLD configuration of PSD or upsd devices, add microcontroller firmware to be programmed into Flash memory, then generate a single file to program into the device (an object file with the filename extension *.obj). PS- Dsoft Express will then use the FlashLINK cable assembly to program this object file into the PSD or upsd device. Other operations include erase, verify, upload, and blank check. See the PSDsoft Express User Manual for more detail. Note: Be sure to use the latest version of PSDsoft Express. Updates are available from Diagnostic Tests PSDsoft Express also performs some diagnostic tests for the PC parallel port and FlashLINK cable assembly. Loop Test. Should be run first to test basic operation of the PC parallel port and the FlashLINK cable assembly. LoopTest will wrap FlashLINK signal outputs back into FlashLINK signal inputs for signal path verification. Connect Test. Is optional to test system performance and check the signal path all the way through the target circuit board including PSD or upsd device. To run these tests, install and run PSDsoft Express on your PC or laptop:. Connect the six foot long DB- cable to your PC parallel port on one side, and to the FlashLINK Adaptor on the other side.. Click mouse on the ISP programmer box at the bottom-left of the PSDsoft Express main flow diagram.. Select single or multiple devices depending on your target configuration (single is most common), then click on the Hardware Setup ( HW Setup ) box at the lower part of the Operations window. For LoopTest :. Connect the small loop test adaptor cable (not the flying lead cable) to the 4-pin connector on the FlashLINK Adaptor.. Connect the red lead of the loop test connector to a source (V or.v), and connect the black lead of the loop test connector to ground.. In the HW Setup box click the Loop Test box to run the test. If it fails, be sure that your are supplying and ground, and also make sure that the PC s parallel port is enabled. For Connect Test :. Connect the Flying Lead cable, or a ribbon cable to the FlashLINK Adaptor, and also connect it to your target circuit board just as if you are ready to program the device.. Turn on the power on the target device, and then click the Connect Test button in the HW Setup box. This test involves the circuit traces on your circuit board. If there is a failure, it is likely due to signal routing or signal integrity on the target circuit board, or the PC may have compatibility problems with the parallel port driver used by PSDsoft Express. Note: If either test fails, you will see a window pop-up that allows you to in the problem. Please do so and we will assist you. /

6 CIRCUIT EXAMPLES 4-pin The first example shown in Figure uses the standard signals (4-pin ). This is the default configuration in PSDsoft Express (4-pin ). Note: The recommended pull-up resistors and decoupling capacitor are near the connector. Figure. Circuit Example for 4-pin USER PC BOARD SIGNAL DIRECTION DURING OPERATION 00k 00k 00k 00k 0k CONN. - PC0 - PC V STBY or I/O - PC GENERAL I/O - PC GENERAL I/O - PC4 - PC - PC6 GENERAL I/O - PC µpsd or PSD Port C 0.0 µf RST USER I/O SIGNALS SYSTEM CIRCUITY (connect directly to Input on µpsd) AI064 Notes:For V upsd devices, pull-up resistors and on the connector should be connected to V system V DD. For.V upsd devices, pull-up resistors and on the connector should be connected to.v system. For dual voltage (.V and.0v) upsdxx devices, pull-up resistors and on the connector should be connected to.v system. 6/

7 6-pin The second example in Figure 4 uses the two additional (and optional) signals and TERR to reduce programming time. To configure this in PSDsoft Express, just click on pin PC or pin PC4 and choose Dedicated function. These two signals must be used as a pair, so choosing either one for will assign both to dedicated function. Figure 4. Circuit Example for 6-pin 00k Typ 0k USER PC BOARD SIGNAL DIRECTION DURING OPERATION CONN. - PC0 - PC V STBY or I/O - PC - PC () TERR - PC4 () - PC - PC6 GENERAL I/O - PC µpsd or PSD Port C 0.0 µf TERR RST USER I/O SIGNALS SYSTEM CIRCUITY (connect directly to Input on µpsd) AI06 Notes:For V upsd devices, pull-up resistors and on the connector should be connected to V system V DD. For.V upsd devices, pull-up resistors and on the connector should be connected to.v system. Note:. and TERR are not part of the IEEE 49. Specification. /

8 Multiplexed (PSD only) The third example in Figure illustrates one method to multiplex signals with general I/O functions (PSD only, not available on upsd). In this example, the PLD input pin at PC was chosen (this could be any PLD input pin) to control how the pins operate. The signal JEN from the FlashLINK Adaptor drives PC. When JEN is active (logic low), the pins operate as. When JEN is inactive (logic high), the pins operate as general I/O. You must configure this in PSDsoft Express by declaring the pins as general I/O (not dedicated pins), then configure one PLD input pin (PC in this example), then you must define an equation which will toggle the pin operation between and general I/O. To define this equation in PSDsoft Express:. Click on the Enable Tab in the Design Assistant window.. Write the equation for the internal node jtagsel, which controls the function of pins (jtagsel logic high is, logic low is I/O). For the example in Figure, the equation should be jtagsel =!PC, so you would just have to type!pc in the equations box and PSDsoft Express will do the rest. Note: You can click on the Show Eq button to see the resultant equation. Note: JEN controls the tri-state buffers on the general I/O pins to avoid signal conflict when operating in Mode or General I/O Mode. Figure. Circuit Example for Multiplexed pins (PSD only, not upsd) 00k Typ 0k USER PC BOARD SIGNAL DIRECTION DURING OPERATION CONN. TERR - PC0 - PC V STBY or I/O - PC - PC () TERR - PC4 () - PC - PC6 PLD INPUT - PC JEN PSD only (not µpsd) Port C JEN 0.0 µf RST MISC. USER I/O SIGNALS SYSTEM CIRCUITY (connect directly to Input on µpsd) Notes:For V upsd devices, pull-up resistors and on the connector should be connected to V system V DD. For.V upsd devices, pull-up resistors and on the connector should be connected to.v system. Note:. and TERR are not part of the IEEE 49. Specification. AI066 /

9 CHAINING DEVICES The IEEE-49. specification allows chaining more than one device in a chain. upsd and PSD devices may be included in this chain. However, PSDsoft Express will place devices from other vendors into BYPASS Mode, keeping them passive in the chain when programming upsd and PSD devices. Conversely, when other vendors control software is operating the chain, upsd and PSD devices may be placed into BYPASS Mode. Figure 6 shows an example of a chain with three devices, including a device from another manufacturer. This example also shows how to use 6-pin in a chaining situation. Chaining must be configured in PSDsoft Express:. Click on the ISP box in the lower-left corner of the PSDsoft Express main flow diagram.. A pop-up dialog box will appear and ask how many devices are in the chain. If you click More than one, you will go to the Operations window that allows you to define the number of devices in the chain as well as their position. Note: If you do not see this dialog box (that asks how many devices are in the chain), pull down the Preferences menu of the main PSDsoft Express window and re-enable this option (question). Figure 6. Example of Chaining Devices FlashLink Adapter Connector Target System, v or v 9 9!TERR 6 4 optional optional 6 4 TERR\!JEN!TRST () CNTL!RST () () optional optional 4 0 optional recommended 4 0 PSD or upsd Any Device in ByPass Mode n straight-through ribbon cable -row, -position Chaining for PSD or upsd and other compatible devices System Reset Circuitry TERR\ PSD or upsd AI06 Note:. All Ground pins are connected together inside the FlashLINK assembly. 9/

10 APPENDIX A. FlashLINK SCHEMATIC Figure. FlashLINK Adaptor Schematic D C B A 4 6 J DB P P P C 00P C4 00P C 00P C 00P C 00P C6 00P 6 4 UA A4 A A A G 4A40 R9 0K Y4 Y Y Y UD DM4ALS0A 0 UE DM4ALS0A 0 UF DM4ALS0A UA DM4ALS0A UD DM4ALS0A 9 UE DM4ALS0A UF DM4ALS0A 9 R0 0K UB 4A40 G A A A A4 Y Y Y Y4 UB 4 DM4ALS0A 9 P P R 00K JEN Title Size Number Revision A FL_0C Date: 9-Sep-00 Sheet of File: C:\flashlink label\flashlink.ddb Drawn By: Manley 4 6 D C B A 6 4 R 4k R6 4k R 4k P 0K P9 00K P S S FRAME DRAIN WIRE R 0 R 0 PIN 4 PIN PIN PIN PIN 4 PIN PIN 6 PIN PIN 0 PIN PIN R 40k 6 R 40K D TRSTN RSTN CNTL TERR JEN UA DM4ALS0A UB DM4ALS0A 4 UC DM4ALS0A UC DM4ALS0A 6 C 0P J C 0P HEADER X C9 0P TRSTN CNTL RSTN TERR P 0K N44 D N44 R 4K Q C0 C NPN904 0P D4 04P R4 6.V 00K R4 0K D N R 0K FlashLink AI06 0/

11 REVISION HISTORY Table. Document Revision History Date Version Revision Details.0 First issue, written in WSI format January 0, 00. Front page, and back two pages, in ST format, added to the PDF file Any references to Waferscale, WSI, EasyFLASH and PSDsoft 000 updated to ST, ST, Flash+PSD and PSDsoft Express -Nov-00.0 Reformatted 09-Mar Republished; lost in DMS migration CONTACT INFORMATION For current information on ST Flash PSD and upsd products, please consult our pages on the world wide web at If you have questions or comments concerning the matters raised in this document, please send them to: the following address: Please include your name, company, location, and phone number. Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners 004 STMicroelectronics - All rights reserved STMicroelectronics GROUP OF COMPANIES Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States /