ZSSC4151 Automotive Sensor Signal Conditioner with Analog Output

Transcription

1 Thank you for your interest in the ZSSC4151 Automotive Sensor Signal Conditioner IC with Analog Output. Please click on the links below to navigate to the documents included in this document. For more information and additional documents, visit Contents ZSSC4151 Feature Sheet ZSSC prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.

2 Brief Description The ZSSC4151 is a CMOS integrated circuit for highly accurate amplification and sensor-specific correction of resistive bridge sensor signals. Digital compensation of sensor offset, sensitivity, temperature drift, and non-linearity is accomplished via an internal 16-bit RISC microcontroller running a correction algorithm, with calibration coefficients stored in an integrated EEPROM. The ZSSC4151 is adjustable to nearly all resistive bridge sensor types. Measured values are provided at the analog voltage output and at the optional digital I 2 C * or the ZACwire interface, also referred to as the one-wire interface (OWI). The digital interfaces can be used for a simple PCcontrolled calibration procedure to program a set of calibration coefficients into an on-chip EEPROM. The ZSSC4151 and the calibration equipment communicate digitally, so the noise sensitivity is greatly reduced. Digital calibration helps keep assembly cost low as no trimming by external devices or lasers is needed. Features Safety and diagnostic functions that can enable support for automotive (ASIL B) and industrial (SIL 2) safety critical applications related to the ISO 26262:2011 and IEC standards Digital compensation of sensor offset, sensitivity, temperature drift, and non-linearity Adjustable to nearly all full or half bridge sensors Analog gain of 200, supporting sensors with spans down to 1mV/V using the digital zooming option Output options: ratiometric 12-bit analog voltage output (e.g., 5-95% or 10-90%) with freely adjustable clamping or ZACwire digital onewire-interface (OWI) Temperature compensation: internal or external diode, bridge external series resistance, or RTD Sensor biasing by internal voltage High voltage and reverse polarity protection up to 40V at all module pins: VDDE, VSSE and AOUT Maximum supply current: 7mA Short-circuit protection for AOUT Traceability via user-defined registers Benefits No external trimming components required and only a few external protection devices needed PC-controlled configuration and single-pass calibration via ZACwire interface: simple, costefficient, quick, and precise End-of-line calibration via ZACwire interface I²C * interface option; can be used in development High accuracy: ±0.5% of full-scale output (FSO) at -40 C to 125 C; 1.0% FSO at -40 C to 150 C Optimized for automotive environments with special protection circuitry and excellent electromagnetic compatibility; AEC-Q100 qualified Latch-up immunity: up to ±100mA Available Support Evaluation kit Application notes Calculation tools Physical Characteristics Supply voltage: 4.5 to 5.5V Analog-to-digital (ADC) resolution: configurable from 12 to 16 bit Large sensor offset correction using digital zooming with 14 to 18 bit resolution Output resolution:12 bit Wide operation temperature range: -40 C to 150 C RoHS-compliant QFN24 package or die Basic Circuit for Dual Bridge Applications Sensor Module VDDA VSSA TOP BRP BRN BOT ZSSC4151 VDDE AOUT VSSE * I 2 C is a trademark of NXP. For more information, contact ZMDI via PRODUCT@ZMDI.COM..00 September 14, All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the

3 ZSSC4151 Block Diagram Typical Applications Pressure sensors Strain gauges PTC RTD temperature sensors External PN Temp Sensor Sensor Bridge Alternate External Temperature Sensor 2 TS1 TOP BRP BRN BOT TS2 ZSSC4151 Mode SCCM MUX Input Select Temp Sensor PGA Gain Select Analog Front-End (AFE) ADC ADC Mode NVM RAM CMC ROM Digital Core I 2 C TM Power Management ZACwire TM DAC / BAMP Interfaces Overvoltage Protection SCL SDA VDDA VSSA AOUT OWI VDDE VSSE Analog Application Example: Pressure and Temperature Sensor 5V module powered by the electronic control unit (ECU) through VCC and GND pins Sensor module with 3-pin connector provides ratiometric analog output on AOUT pin Media temperature signal derived from external temperature diode Temperature compensation via diode on pressure chip End-of-line calibration using the one wire interface (OWI) signal on the AOUT pin Additional I²C TM interface option ZSSC4151 Full Bridge, External Diode Temperature Sensor Application Sensor Bridge BRP BOT BRN TS1 TOP TS2 C4 C5 10nF 10nF ZSSC4151 Die AOUT VSSE VDDE SCL SDA VSSA VDDA 1 C3 47nF C2 100nF AOUT/OWI GND VCC SCL Serial Interface SDA C1 100nF Ordering Information (Contact ZMDI for die options) Sales Code Description Package ZSSC4151BE2 ZSSC4151 QFN24, single bridge input, operating temperature: -40 to 150 C Add T for tape, R for 13 reel ZSSC4151KitV1.0 ZSSC4151 SSC Evaluation Kit: SSC Communication Board, ZSSC415x/6x/7x Evaluation Board, Sensor Replacement Board, 5 samples. Evaluation software is available for download on (See kit documentation for details.) Sales and Further Information PRODUCT@ZMDI.COM Zentrum Mikroelektronik Dresden AG Global Headquarters Grenzstrasse Dresden, Germany Central Office: Phone Fax European Technical Support Phone Fax European Sales (Stuttgart) Phone Fax ZMD America, Inc McCarthy Blvd., #212 Milpitas, CA USA USA Phone Phone Fax Zentrum Mikroelektronik Dresden AG, Japan Office 2nd Floor, Shinbashi Tokyu Bldg , Shinbashi, Minato-ku Tokyo, Japan Phone Fax ZMD FAR EAST, Ltd. 3F, No. 51, Sec. 2, Keelung Road Taipei Taiwan Phone Fax Zentrum Mikroelektronik Dresden AG, Korea Office U-space 1 Building Unit B, , Daewangpangyo-ro Bundang-gu, Seongnam-si Gyeonggi-do, Korea Phone Fax DISCLAIMER: This information applies to a product under development. Its characteristics and specifications are subject to change without notice. Zentrum Mikroelektronik Dresden AG (ZMD AG) assumes no obligation regarding future manufacture unless otherwise agreed to in writing. The information furnished hereby is believed to be true and accurate. However, under no circumstances shall ZMD AG be liable to any customer, licensee, or any other third party for any special, indirect, incidental, or consequential damages of any kind or nature whatsoever arising out of or in any way related to the furnishing, performance, or use of this technical data. ZMD AG hereby expressly disclaims any liability of ZMD AG to any customer, licensee or any other third party, and any such customer, licensee and any other third party hereby waives any liability of ZMD AG for any damages in connection with or arising out of the furnishing, performance or use of this technical data, whether based on contract, warranty, tort (including negligence), strict liability, or otherwise..00 September 14, prior written consent of the copyright owner.

4 Rev / September 2015 ZSSC4151 Multi-Market Sensing Platforms Precise and Deliberate

5 Contents 1 Brief Description Electrical Characteristics Absolute Maximum Ratings Operating Conditions Electrical Parameters Supply Current and System Operation Conditions Analog Front-End Characteristics Temperature Measurement Sensor Diagnostics A2D Conversion DAC and Analog Output (AOUT Pin) System Response Interface Characteristics and Nonvolatile Memory I 2 C TM Interface ZACwire One-Wire Interface (OWI at AOUT pin) Nonvolatile Memory (NVM) ESD Protection and EMC Specification ESD Protection Latch-Up Immunity Electromagnetic Emission Conducted Susceptibility (DPI) Reliability and RoHS Conformity Glossary Document Revision History List of Figures Figure 1.1 ZSSC4151 Block Diagram... 3 List of Tables Table 2.1 Absolute Maximum Ratings... 4 Table 2.2 Operating Conditions... 5 Table 2.3 Electrical Parameters... 6 Table 2.4 Interface Characteristics and Nonvolatile Memory... 9 Table 3.1 Conducted Susceptibility (DPI) Tests of 13

6 1 Brief Description The ZSSC4151 sensor signal conditioner (SSC) is a CMOS integrated circuit for highly accurate amplification and sensor-specific correction of bridge sensor signals. Digital compensation of sensor offset, sensitivity, temperature drift, and non-linearity is accomplished via an internal 16-bit RISC microcontroller running a correction algorithm with calibration coefficients stored in an EEPROM. The ZSSC4151 is adjustable to nearly all bridge sensor types. Measured values are provided at the analog voltage output and at the digital I 2 C * or ZACwire interface, also referred to as the One-Wire Interface (OWI). The digital interfaces can be used for a simple PC-controlled calibration procedure in order to program a set of calibration coefficients into an on-chip EEPROM. The specific sensor and the ZSSC4151 can be quickly calibrated together. The ZSSC4151 and the calibration equipment communicate digitally, so the noise sensitivity is greatly reduced. Digital calibration helps keep assembly cost low as no trimming by external devices or lasers is needed. The ZSSC4151 is optimized for automotive environments by overvoltage and reverse-polarity protection circuitry, excellent electromagnetic compatibility, full automotive temperature range, and multiple diagnostic features. Figure 1.1 provides a block diagram of the ZSSC4151. Refer to section 5 for definitions of abbreviations. Figure 1.1 ZSSC4151 Block Diagram External PN Temp Sensor Sensor Bridge Alternate External Temperature Sensor 2 TS1 TOP BRP BRN BOT TS2 ZSSC4151 Mode SCCM MUX Input Select Temp Sensor PGA Gain Select Analog Front-End (AFE) ADC ADC Mode NVM RAM CMC ROM Digital Core I 2 C TM Power Management ZACwire TM DAC / BAMP Interfaces Overvoltage Protection SCL SDA VDDA VSSA AOUT OWI VDDE VSSE * I 2 C is a trademark of NXP. 3 of 13

7 2 Electrical Characteristics Important note: The absolute maximum ratings given in section 2.1 are stress ratings only. The ZSSC4151 might not function or be operable above the recommended operating conditions. Stresses exceeding the absolute maximum ratings might also damage the device. In addition, extended exposure to stresses above the recommended operating conditions might affect device reliability. ZMDI does not recommend designing to the specifications given under Absolute Maximum Ratings. Important note: The operating conditions given in section 2.2 set the conditions over which ZMDI specifies device operation. These are the conditions that the application circuit should provide to the device for it to function as intended. Unless otherwise noted, the limits for parameters that appear in the operating conditions section are used as test conditions for the limits given in the electrical characteristics (section 2.3), operating conditions, and interface characteristics and nonvolatile memory sections Absolute Maximum Ratings Table 2.1 Absolute Maximum Ratings No. Parameter Symbol Conditions Min Max Unit Supply voltage VDDE VDC Voltage at AOUT pin V AOUT VDC Analog supply voltage VDDA VDC Digital supply voltage VDD VDC Voltage at all other pins V PIN -0.3 VDDA +0.3 V Storage temperature T STG C 4 of 13

8 2.2. Operating Conditions All voltages in this section are relative to VSSA. Table 2.2 Operating Conditions Note: See important notes at the end of the table. No. Parameter Symbol Conditions Min Typical Max Unit Supply voltage VDDE To VSSE V VDDA To VSSA VDDE minus drop through protection switch (VDDE 0.1) VDDE V Junction temperature T TQE Extended Temperature Range (TQE) C T AMB_TQA T AMB_TQI Advanced-Performance Temperature Range (TQA) Best-Performance Temperature Range (TQI) C C Bridge resistance 1), 2) R BR 2 10 k R BR_10-90 Output range 10-90% 1 15 k 1) No measurement in mass production; parameter is guaranteed by design and/or quality observation. 2) R BR greater than the maximum limit results in higher noise. 5 of 13

9 2.3. Electrical Parameters All parameter values in this section are valid under the operating conditions specified in section 2.2. All voltages referenced to VSSA. Note: All parameters measured/validated for r ADC = 14-bit; segmentation of 1 st and 2 nd ADC stage = 8/6; f OSC = 8MHz; analog gain = ~100; T AMB_TQE (see specification 2.2.2). Table 2.3 Electrical Parameters Note: See important table notes at the end of the table (page 8). No. Parameter Symbol Conditions Min Typ Max Unit Supply Current and System Operation Conditions Supply current 1) I S Oscillator adjusted (typical f OSC = 8MHz) ma Sensor bridge supply voltage V SENS V SENS = V TOP - V BOT at R BR 2k VDDA Oscillator frequency 2) f OSC MHz Oscillator frequency temperature coefficient TC OSC ppm/k Analog Front-End Characteristics Input span V IN_SPAN Analog gain = 1 to mv/v Common mode input range V IN_CM Depends on gain adjustment V SENS External capacitance at input C IN_EXT Capacitance at pins BR1P and BR1N to VSSA 0 12 nf Input leakage current 3) I IN_leak na Temperature Measurement PTAT internal temperature sensitivity ST TSI Raw values, without conditioning calculation 20 LSB 14 /K Analog gain setting= External temperature diode channel gain External temperature diode bias current A TSE_D 10 LSB 14 /mv I TSE_D A External temperature diode input range 3) V TSE_D Relative to V TOP V 6 of 13

10 No. Parameter Symbol Conditions Min Typ Max Unit External RTD channel gain A TSE_RTD 10 LSB /mv External RTD input range 3) V TSE_RTD Relative to VDDA V Sensor Diagnostics Sensor connection loss threshold Sensor short threshold to BOT or TOP pin Sensor short threshold between inputs R SCC_open 100 k R SCC_SH_BT 50 R SCC_SH_IN A2D Conversion ADC resolution 3) r ADC Selection: 12, 14, 16 or 18 bit Bit DNL 3) DNL ADC Best fit; overall AFE; V ADC_IN according to LSB INL TQA temperature range (specified in 2.2.2) 3) INLADC_TQA Best fit 4 LSB INL TQE temperature range (specified in 2.2.2) INLADC_TQE At 14-bit resolution 8 LSB ADC input range V ADC_IN V SENS DAC and Analog Output (AOUT Pin) DAC resolution r DAC Analog output 12 Bit Output current sink/source I OUT V AOUT: 5-95%, R LOAD 5k 2.5 ma V AOUT: 10-90%, R LOAD 1k 5 ma Short-circuit current (AOUT to VSSE or VDDE) I OUT_max Short to VSSE or VDDE ma Addressable output range V R_OUT VDDE Load capacitance C LOAD Defined for best EMC performance nf Output slew rate SR OUT C LOAD < 50nF 0.1 V/µs Clipping levels LowLim UppLim Configurable 8-bit value stored in NVM Configurable 8-bit value stored in NVM 0 25 %VDDE %VDDE Clipping adjustment step 0.1 %VDDE Output resistance in Diagnostic Mode R OUT_DIA Diagnostic Range: 4% to 96%, R LOAD 5k 8% to 92%, R LOAD 1k 80 7 of 13

11 No. Parameter Symbol Conditions Min Typ Max Unit DNL DNL OUT r DAC =12 bit LSB INL TQA temperature range (specified in 2.2.2) 3) INL OUT Best fit, r DAC =12-Bit -5 5 LSB INL TQE temperature range (specified in 2.2.2) INL OUT Best fit, r DAC =12-Bit -8 8 LSB Output leakage current at 150 C System Response Startup time 3) (time to first valid output after power-on) I LEAK_OUT t STARTUP In the event of power or ground loss f OSC = 8MHz; ADC: 14-bit and 2 nd order conversion Response time 3) t RESPONSE 100% input step, excluding transmission time Bandwidth 3) In comparison to analog signal conditioners; 66% jump Analog output noise peak-to-peak 3) V NOISE,PP DAC and output buffer only; bandwidth 10kHz Analog output noise RMS 3) V NOISE,RMS DAC and output buffer only; bandwidth 10kHz Ratiometricity error 3) RE OUT_5 Maximum error of VDDE range = 4.5V to 5.5V Overall error 4) F ALL TQA temperature range (specified in 2.2.2) TQE temperature range (specified in 2.2.2) µa 5 ms 1.1 ms 1 khz 10 mv 3 mv 1000 ppm 0.5 % FSO 1.0 1) Excluding bridge supply current and excluding output current at AOUT pin. 2) Oscillator frequency can be trimmed via a setting in nonvolatile memory (NVM). 3) No measurement in mass production; parameter is guaranteed by design and/or quality observation. 4) FSO: full-scale output. No sensor-caused effects included in overall error. 8 of 13

12 2.4. Interface Characteristics and Nonvolatile Memory Table 2.4 Interface Characteristics and Nonvolatile Memory Note: See important table notes at the end of the table. No. Parameter Symbol Conditions Min Typ Max Unit I 2 C TM Interface I 2 C voltage level HIGH 1) V I2C_HIGH 0.5 VDDA I 2 C voltage level LOW 1) V I2C_LOW 0.2 VDDA Slave output level LOW 1) V I2C_LOW_OUT Open drain, I OL < 4mA 0.1 VDDA SDA load capacitance 1) C I2C_SDA 400 pf SCL clock frequency 1) f I2C 400 khz Internal pull-up resistor 1) R I2C_PULLUP k ZACwire One-Wire Interface (OWI at AOUT pin) OWI voltage level HIGH 1) V OWI_IN_H Master to slave 0.75 VDDE OWI voltage level LOW 1) V OWI_IN_L Master to slave 0.2 VDDE Slave output level LOW 1) V OWI_OUT_L Open drain, I OL 2mA 0.1 VDDE Start window 1) t OWI_STARTWIN ms Bus free time t OWI_IDLE Between stop and next start 25 µs Hold time start condition t OWI_START Valid minimum f clk 25 µs Bit time t OWI_BIT Maximum range µs Typical operating range µs Duty ratio bit 0 t OWI_ t OWI_BIT Duty ratio bit 1 t OWI_ t OWI_BIT Hold time stop condition t OWI_STOP t OWI_BIT_L is the bit time of the last valid bit 2 t OWI_BIT_L Bit period deviation t OWI_BIT_DEV t OWI_BIT 9 of 13

13 No. Parameter Symbol Conditions Min Typ Max Unit Nonvolatile Memory (NVM) Junction temperature for NVM programming 2) T AMB_NVM C Re-write cycles 1) N NVM_TQA For T TQA (see range in specification 2.2.2) Re-write cycles at 150 C N NVM_TQE For T TQE (see range in specification 2.2.2) Data retention 1) t NVM_RET Temperature profile: 22h bake at 250C 15 Year Programming time 1) t NVM_WRI Per written word ms 1) No measurement in mass production; parameter is guaranteed by design and/or quality observation. 2) Valid for dice. Note: Additional package and temperature range cause restrictions. 10 of 13

14 3 ESD Protection and EMC Specification 3.1. ESD Protection All pins have an ESD protection of 2000V according to the Human Body Model (HBM, based on MIL883, Method ). The VDDE, VSSE, and AOUT pins have an additional ESD protection of 4000V (HBM). In addition, Charged Device Model (CDM) tests are processed with protection levels of 750V for corner pins and 500V for all other pins. The level of ESD protection has been tested with devices in QFN24 4X4mm packages during the product qualification Latch-Up Immunity All pins pass ±100mA latch-up test based on testing that conforms to the standard EIA/JESD Electromagnetic Emission The wired emission of externally connected pins of the device is measured according to the following standard: IEC 61967_4: A1:2006. Measurements must be performed with the application circuits described in the ZSSC4151 Application Description. For the off-board pins, the spectral power measured with the 150Ω method must not exceed the limits according to IEC 61967_4k, Annex B.4 code H10kN. For the VSSE pin, the spectral power measured with the 1Ω method must not exceed the limits according to IEC 61967_4k, Annex B.4 code 15KmO Conducted Susceptibility (DPI) The conducted susceptibility of externally connected pins of the device is measured according to the IEC standard, which describes the direct power injection (DPI) test method. Measurements must be performed with the application circuit described in the ZSSC4151 Application Description. t. Measurements are performed with an internal reference capacitor and internal temperature sensor. The sensing element is replaced by a resistive divider. Calibration is parameterized so that ~50% VDDA is output. Table 3.1 gives the specifications for the DPI tests. RES refers to the coupling impedance. Table 3.1 Conducted Susceptibility (DPI) Tests Test Frequency Range Target (dbm) Load Pins Protocol Error Band Comment DPI, direct coupled 1MHz to 300MHz 26 VDDE, AOUT Analog out ± 1% LOAD RES = 5kΩ LOAD CAP = 10nF DPI, direct coupled 300MHz to 1000MHz 32 VDDE, AOUT Analog out ± 1% LOAD RES = 5kΩ LOAD CAP = 10nF 11 of 13

15 4 Reliability and RoHS Conformity The ZSSC4151 will be qualified according to the AEC-Q100 standard, operating temperature grade 0. The qualification is extended to 1000h for the High Temperature Operating Life (HTOL) Test for one lot. Two manufacturing lots of extended HTOL qualification data (minimum of 1000h test time) for the ZSSC4151 or other products using identical technology (metallization), the same package supplier, the same package style, and the same die size within a specific tolerance are used to prove the package and bond reliability in the range of 1000h HTOL. A FIT rate 10 FIT (temperature = 55 C, confidence level = 60%) is guaranteed. A typical FIT rate of TSMC s CV018BCD technology, which is used for the ZSSC4151, is 1 FIT. The ZSSC4151 complies with the RoHS directive and does not contain hazardous substances. The complete RoHS declaration update can be downloaded at 5 Glossary Term ADC AEC AFE BAMP BR CDM CM CMC DAC DNL DPI EMC ESD FIT FSO HBM HTOL I²C TM INL LSB Description Analog-to-Digital Converter Automotive Electronics Council Analog Front-End Buffer Amplifier Bridge Sensor Charged Device Model Command Mode Calibration Microcontroller Digital-to-Analog Converter Differential Nonlinearity Direct Power Injection Electromagnetic Compatibility Electrostatic Discharge Failures in Time Full Scale Output Human Body Model High Temperature Operating Life Inter-Integrated Circuit serial two-wire data bus, trademark of NXP Integral Nonlinearity Least Significant Bit 12 of 13

16 Term MUX NVM OWI PGA PTAT PTC PWR QFN RAM RISC ROM RMS RTD SCCM SCL SDA SSC TQA, TQE, TQI ZACwire TM Description Multiplexer Nonvolatile Memory One-Wire Interface Programmable Gain Amplifier Proportional-to-Absolute Temperature Thermistor Positive Temperature Coefficient Resistor Power Management and Protection Unit Quad-Flat No-Leads IC package Random Access Memory Reduced Instruction Set Computing Read-Only Memory Root-Mean-Square Resistance Temperature Device Sensor Check and Common Mode Adjustment Unit Serial Clock Serial Data Sensor Short Check (diagnostic feature) or Sensor Signal Conditioner Temperature range identifier. See specification for definition. ZMDI-specific One-Wire Interface 6 Document Revision History Revision Date Description 1.00 First release. 13 of 13