Mega128-Net Mega128-Net Mega128 AVR Boot Loader Mega128-Net

Transcription

1 Mega128-Net Development Board Progressive Resources LLC 4105 Vincennes Road Indianapolis, IN (317) (317) FAX GENERAL The Mega128-Net development board is designed for prototyping, laboratory and OEM use. The board hosts an ATMega128 processor along with 10baseT Ethernet, two RS232 ports, a Real-Time-Clock, 32K of SRAM, an Optrex compatible LCD connector, four R/C servo connections, JTAG and ISP ports, an MMC/SD slot, two 8-bit memory accessed parallel output ports, two 8-bit memory accessed parallel input ports, and a fully decoded expansion bus connection. Mega128 AVR Boot Loader The Mega128-Net development board now comes programmed with the AVRBL-128, Mega128 AVR Boot Loader. The AVR Boot Loader (AVRBL) is a bootstrap loader that, once programmed into the AVR boot-block memory area, allows reprogramming of AVR microcontrollers without need for a chip programmer. The AVRBL makes use of the self-

2 programming features of the AVR microcontrollers to allow in-circuit reprogramming. Once the AVRBL is programmed into the microcontroller, it remains resident until the chip is erased. Application programs require only a very minimum software interface to use the AVRBL. The PC application to interface to the boot loader and more documentation about interfacing to the boot loader are available free at (Some notes are provided on the following pages.) Other features of the development board include: - Comes Standard with an ATMega128-16AC processor - Comes programmed with a boot strap loader! No other programming hardware is required! Just an RS232 cable to your PC and the AVRBL Boot Loader Windows application. - 10baseT Ethernet using the RealTek RTL8019AS NIC. RJ45 Jack on-board. - Two RS232 ports with 9-Pin D-Shell as well as a jumper header for convenient connection. - Up to 128K of In-System Programmable FLASH memory with 4K of EEPROM and 4K of Internal SRAM. - Eight, 10 bit, Analog Inputs, using either internal or user supplied reference - Nine I/O controlled LEDs, 8 of which are jumper selectable. - A PCF8563 Real-Time-Clock IC with a 32KHz watch crystal for on-board Real-Time operations. Battery backed with a 3V lithium coin cell. - 32K of external SRAM. - A universal clock socket allows for canned oscillators, as well as a variety of crystals, ceramic resonators, and passive terminations. A Mhz oscillator comes standard with the unit, providing accurate baud rates across a wide range. - A single-in-line Optrex compatible LCD connector centered headers provide for simple connection to the processor special function pins and I/O pin, polarized, ISP and JTAG connections are provided for in-system programming and debugging. Mega128s can also be programmed through either RS232 port when using an appropriate boot loader application. - On-board switch-mode regulation allows for power inputs from 8-38VDC with an LED power indicator. - Termination is provided for 5VDC output at for up to 2A of combined load.

3 SPECIFICATIONS - Voltage range 8 V to 38 VDC - Power consumption 400 mw (nominal) - Dimensions: W 4.75 inches x H 6.5 inches - Mounting holes and Rubber feet, 4 places - Weight ~4 OZ - Operating temperature 0 deg. C to +60 deg. C - Storage temperature 0 deg. C to +85 deg. C

4 - Humidity 0% to 95% at +50 deg. C (non-condensing) APPLICATION NOTES: Power J2 (screw terminal connector) is the power input point. Acceptable voltages are 8 38 VDC (J1-1 is +, J1-2 is ground). JP5 is an output of the regulated 5 VDC that may be used to power other devices. The LM2678 based switching power supply has the ability to produce up to 2A at 5VDC. This allows the board to comfortably power an LCD display with backlight and up to 4 standard R/C servos. Serial Connections P7 and P6 are standard DB-9 connectors usually used to connect to a PC. The TX signal is on P7-2 (P6-2) and the RX signal on P7-3 (P6-3). These are RS-232 level signals. P5 and P4 also provide connections for the RS-232 level serial signals. On each connector, pin 1 is the TX signal, pin 3 is the Rx signal and pin 2 is ground. UART0 (P6) supports a command set. When UART0 monitoring is not enabled by the Mega128-Net-Demo host application, UART0 is in command mode. The command mode allows the IP and MAC addresses to be changed through the UART as well as reading and modifying the date and time. The commands are:? - Print list of commands. $ - Jump to bootloader. I - Set IP address. i - Print IP address. M - Set MAC address. m - Print MAC address. C - Set date and time. c - Print current date and time. ESC - Cancels any Set command in progress. On reset, the baud rate of UART0 defaults to and the default mode is command mode. The baud rate and mode can be changed over the Ethernet connection. The new baud rate and mode remain in effect until the Mega128-Net development board is reset. UART1 (P7) defaults to a echo-mode of operation at baud. This port can be enabled and baud-rate set for monitoring through the Mega128-Net-Demo application. Note: When UART monitoring is enabled by the Mega128-Net-Demo host application, the Mega128-Net-Demo host application displays values received by the selected UART. The Mega128-Net development board transmits the data received by the UART to the Mega128-Net-Demo host application via the Ethernet connection for display. When data is sent to a UART from the Mega128-Net-Demo host application, the host

5 application sends the data to the development board through the Ethernet connection. Once the development board receives the data, it transmits it out the selected UART. ISP Connection P1 is provided for In-System-Programming of the Mega128 using appropriate ISP programming hardware. This connector is compatible with TheCableAVR ISP programmer available from Progressive Resources LLC, JTAG Connection P2 is provided for In-System-Programming and Debugging of the Mega128 using appropriate JTAG hardware. This connector is compatible with Atmel s JTAG-ICE. For boards released after January 28, 2004, the JTAG and OCD Fuse bits are enabled, however the installed bootloader sets the JTD bit (disabling the JTAG and OCD connections) so all analog channels can be used. To use the JTAG-ICE, check Connect on Reset when prompted by AVR Studio, so the JTD bit does not get set before the JTAG-ICE can communicate with the AVR processor. MMC/SD Memory Connection P8 is provided for Multi-Media and Secure-Data Flash Cards. These memory cards utilize the SPI interface of the ATMega128 allowing for large amounts of memory to be accessed without consuming many I/O pins. 10BaseT Ethernet Connection J1 is a 10BaseT Ethernet connection. This port is transformer coupled to the board to provide the highest possible electrical isolation. The RealTek RTL8019AS Network Interface Controller makes a simple and efficient connection from the ATMega128 to the LAN. The ShortCake Ethernet Stack source code, supplied with the board, provides a quick starting point giving access to the Mega128-Net development board using ICMP, ARP, PING, UDP, and TCP/IP protocols. ShortCake also has a small HTTP server example built in demonstrating a socketless connection. A VB6 project (Mega128-Net-Demo) is also included demonstrating how the LCD, servos, digital inputs and output, UARTS and analog to digital converters can be controlled over an Ethernet connection. To access the on-board web server demonstration, open Microsoft Internet Explorer and go to URL: This URL will bring up a web page showing the current time and date (from the onboard real time clock) and if the board is plugged into a LAN with access to the Internet, a photo of the board will appear on the browser. With Internet Explorer, the address:

6 provides a control page. In this web page you can turn the LEDs on and off as well as send messages to the LCD display. The IP and MAC address may be changed using the UART0 (P6) serial port. See the preceding section on the serial ports for more information. Parallel Ports Parallel ports A, B, C, D, E, F and G (complete or in part) are connected to various headers and labeled clearly on the board or in the schematics. Refer to the schematics to locate the connection points of these ports. When possible, the entire port (i.e. PORTB) is brought out to the connector in sequence. Ports A and C can be found on the memory expansion connection and are available as I/O when the Mega128 is not in external memory mode. These are normal TTL-level signals with or without pull-ups depending on the port initialization set up in the software. Port F (JP2 odd pins) has a parallel row of ground pins next to it (JP2 even pins) so that enabling the built-in pull-up resistors and then using two-pin jumpers to ground any pins that need a logic 0 applied for input purposes can effect simple input signals. This also provides a convenient ground reference when measuring analog voltages with the internal A/D converter (ADC). Port B (JP22) has a parallel row of pins (JP23), each of which is connected to an LED through a 510-ohm series resistor to +5 VDC. Jumping any of the pins of JP22 to the corresponding pin of JP23 allows the use of the on-board LED s as an output. Because the LED s are connected to +5 VDC and the port is sinking the LED current, the LED will be on for any pin that outputs logic 0. Port B is also configured such that up to 4 standard R/C servos may be plugged in: JP21 provides 5VDC, JP4 provides GND and JP22 provides the PORTB output bits used as position signaling for the R/C servo. The PORTB.4-7 bits also function as PWM outputs allowing the Mega128 processor to generate the appropriate pulse output to the servo with minimum software overhead. Refer to the Atmel ATMega128 datasheet for details on the PWM operation. Be sure to check the plug configuration of the R/C servo before connecting it to the board. Most manufacturers have standardized on this connection scheme, but not all. Plugging in an incompatible servo, or plugging it in reversed, could damage the servo, the development board, or both.

7 To gain back some of the I/O lost to the network interface controller and external memory, two 8-bit output ports and two 8-bit input ports were added and can be found on the board as follows: OUT0 - JP6 OUT1 - JP8 IN0 - JP7 IN1 - JP9 JP10 and JP11 provide power and ground to what results as a 34-pin header. This makes for easy connectivity using a standard ribbon cable. These ports can be accessed as variables by using definitions like: unsigned char 0x9000; unsigned char 0x9400; // This is the LCD port too! unsigned char 0x9800; unsigned char 0x9C00; Memory Expansion Connection J3 is a dual-in-line connector that can serve two purposes. If the Mega128 is setup in external memory mode, the fully decoded address, data, and access strobes (RD, WR, and ALE) are available to J3 (along with VCC and GND). If the Mega128 is in internal memory mode, then ports A and C are available at the connector as general, digital I/O. J3-1 and J3-2 are used to enable or disable the on-board SRAM. If there is a jumper from J3-1 to J3-2, the on-board SRAM is disabled. This allows for entire external memory address space to be dedicated to whatever devices may be plugged in to the memory expansion connector. J3-1 (~RAMEN) can also be set to TTL high by offboard logic in order to disable the on-board SRAM for peripherals that may share the memory space. J3-33 and J3-34 carry the SCL and SDA signals for external I2C communications. These lines are shared with the on-board real time clock. System Clock As supplied, the system clock is MHz. U6 contains the crystal and caps necessary for the oscillator. Replacing U6 with a TTL, crystal, ceramic resonator, or RC oscillator, or a different integrated oscillator unit allows changing the system clock if necessary. Analog-to-Digital Converter Connections JP1 provides the connections to control the V ref for the ADC. A new V ref may be connected to JP1, pin 2, if desired. Or the internal connections to V ref may be controlled by software. 5V can be used as a reference by jumpering JP1-2 to JP1-3. LCD Interface Connections The SIP connector, U12, is provided as convenient connections for Optrex compatible LCD displays. The signaling definitions are as follows: OUT1.0 RS

8 OUT1.1 RW OUT1.2 E OUT1.4-7 DB4-DB7 Where OUT1 is a memory addressed, parallel, output only port. AVRBL-128, Mega128 AVR Boot Loader There are two methods of running the boot loader, upon reset and by a direct call from the application code. The boot loader runs on UART0 at baud, XON, XOFF handshaking, 8 data bits and 1 stop bit. The boot loader code is executed upon reset. If the boot loader does not receive instructions to load a new file with 5 seconds, then it jumps to the application code. To call the boot loader from your application code consider using a condition and jump instruction. For example: if (UDR0 == '$') // did I receive a $ on the USART? { // if true, then jump to the AVRBL #asm JMP 0xFC00 #endasm } This example code checks to see if the character received on USART is a $. If so, then the JMP instruction is executed, exiting the main application and entering the boot loader directly. If the boot loader does not receive any instructions within a selected amount of time it will jump to 0x0000, effectively resetting the processor and starting the main application code. Otherwise, if the boot loader does receive instructions, the opportunity is then provided to download new firmware. The PC application allows the user to establish what characters are used by the application to start the boot loader. After the AVBRL is started (via a reset, a power-up, or a jump from the main application), the following protocol must be observed. The PC application provided handles the protocol for you with its default settings or you can create a custom application. In either case the protocol is: 1. Upon power-up, reset, or as a result of a jump from the main application, the AVRBL sends a ^ (BOOTLOADER_ACTIVE_CHAR) at your selected baud rate. 2. The host is then required to send the three-character entry sequence. This is used to prevent an inadvertent attempt of reprogramming from taking place. If the AVRBL does not receive these characters within the timeout period, the AVRBL tests to see if there is code located in the main application area of flash. If there is, then the AVRBL jumps to it, otherwise, execution stays within the AVRBL indefinitely, waiting for the entry sequence.

9 3. Once the three-character entry sequence has been sent, the bootloader sends the version string (Vx.xx) followed by a? (READY_CHAR). 4. Upon receipt of the READY_CHAR, the host application should send the hex file for the new/updated application program observing an X-ON / X_OFF handshaking protocol to control data flow. The handshaking is very important as the flash memory area writes much more slowly than the serial port can send data. The programming software continues sending the hex file until it is all sent. After each line of.hex file is received by the bootloader, one of three characters is transmitted by the bootloader: - ~ Line received with no errors. - % Line received with no error, but an error occurred while flashing. - - Checksum error detected while receiving the line. 5. After the programming is complete, the AVRBL sends either a #, meaning the programming is all right, or indicating that an error has occurred and the program did not load successfully. In most cases an error during programming means that the main application program is corrupted and will need to be resent. 6. The AVRBL then starts the newly programmed application software. As stated in step 2, the AVRBL tests to see if there is code located in the main application area of flash. If there is, the AVRBL jumps to it, otherwise, execution stays within the AVRBL indefinitely, waiting for the entry sequence. One final note about the Mega128 AVR Boot Loader, the boot loader source code is available for purchase and as such provides the opportunity for customized boot loader solutions. The AVRBL-128 boot loader (as well as others) is available at

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