NS9210/NS9215. Overview. Block Diagram. NS µ CMOS, 265-pin BGA. Features/Benefits. Platforms and Services.

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1 NS9210/NS bit NET+ARM Processor Family Cost-efficient, small footprint ARM926EJ-S processor with integrated encryption and unique interface flexibility. Overview The NS9210/NS9215 processor family offers a cost-efficient, small-footprint 32-bit ARM9 solution that combines high performance, integrated Ethernet networking, strong security, and unique interface flexibility. It is the ideal choice for a broad range of applications such as security/access control, medical, industrial/building automation, transportation and remote monitoring. Two independent Flexible Interface Modules (FIMs) with 300 MHz DRPIC1655X processor cores provide a growing list of application-specific peripheral interface options. The NISTcompliant 256-bit hardware AES accelerator combines stateof-the-art data privacy services with superior performance, and Digi s patented dynamic power management addresses the needs of today s power budget-conscious designs. The complete and easy-to-use development kits for NET+OS are based on the field-proven ThreadX Real-Time Operating System and deliver a true and IPv6-ready turnkey embedded development solution with the Eclipse-based Digi ESP IDE. Block Diagram AES Accelerator 10/100 Ethernet MII MAC Vectored Interrupt Controller Bus Arbiter NS µ CMOS, 265-pin BGA 10 Timers/ Counters or 4 PWM IRQ PLL CLK Generator Power Management Boot SPI ARM 75 MHz, AHB Bus 32 bit A/D I/O Hub I 2 C GPIO ARM926EJ-S MHz 4k I-Cache/ 4k D-Cache ADC 12b-8ch Flexible Interface Module Program Data JTAG Test and Debug Real-Time Clock NVRAM 64 Byte Ext. Peripheral Controller Controller Flexible Interface Module Program Data GPIO Quadrature Decoder Features/Benefits Platforms and Services High-performance 150 MHz ARM926EJ-S core 10/100 Mbit Ethernet MAC integration On-chip hardware AES accelerator Software-configurable I/O flexibility through FIMs Power management modes with dynamic clock scaling Design Services Accessory Kits Support Rich set of integrated peripheral interfaces Complete and royalty-free NET+OS development NET OS platform for network-enabled embedded devices Upgrade path to ARM9 core performance for existing NS7520 designs through pin-compatible NS9210 Supported Software Platforms

2 Development Kits Development Kit Overview Development Kit for NET+OS NET+OS is a royalty-free turnkey solution for embedded software development based on the ThreadX Real-Time Operating System (RTOS), which is one of the most reliable and field-proven RTOS solutions available. In addition to ThreadX, NET+OS provides a complete set of integrated building blocks needed to create product solutions with leading network security using Digi embedded microprocessors and modules. For professional embedded software development, the Eclipse based Digi ESP Integrated Development Environment (IDE) for Microsoft Windows with graphical user interface and a high-speed USB 2.0 hardware debugger is provided out-of-thebox. A Green Hills MULTI IDE option is also available. Digi professional design and support services are also part of the development kit. The included professional design review service improves time-to-market by minimizing the traditional design risk for prototyping and production units. In addition, one year of premium support service covers any software development related questions through the assistance of Digi s technical support experts. Royalty-free turn-key solution for embedded development Built on field-proven and compact ThreadX RTOS Fully integrated support for secure, IPv4/IPv6 networking applications Eclipse-based Digi ESP IDE for Windows software development Professional hardware design review included Development Kit Contents NS9210 NS9215 Processor Module NS9210 processor module with 150 MHz, 4 MB Flash, 8 MB SDRAM NS9215 processor module with 150 MHz, 4 MB Flash, 8 MB SDRAM Development Board Ethernet connector, 4 serial ports (1 x RS-232/422/485, 1 x RS-232, 2 x TTL), User/Application connectors, I 2 C/SPI headers, ADC header, Screw terminal for access to 8 GPIO signals, 2 user push-buttons, 2 user LEDs, Wake-up button, Reset button, 802.3af PoE module connector, Prototyping area, Battery backup, 9-30VDC power supply, Power switch, Mounting holes CD/DVD Digi NET+OS CD: NET+OS 7, Digi ESP IDE, BSP source code, Sample code, Green Hills MULTI support option, User documentation Documentation Quick start guide, Digi ESP tutorial, NET+OS programmer s guide, NET+OS API documentation, Advanced Web Server, Hardware reference manual, Complete design schematics and bill of material Power Supplies and Accessories External wall power supply (110/240VAC) with interchangeable outlet adapters (North America, EU, UK and Australia), Ethernet cable, Serial cable Other Digi JTAG Link USB 2.0 hardware debugger, 802.3af PoE module, Professional Hardware Design Review, 1 year of Premium Support Service Kit Part Numbers NS-9210-NET NS-9215-NET Please refer to the feature specs on our website for detailed information about the NET+OS software platform capabilities.

3 General Processor Speed Grades Cache Process 32-bit ARMv5TEJ Instruction Set 16-bit Thumb Instruction Set MMU DSP Instruction Extensions ARM Jazelle Java Accelerator Embedded ICE-RT Debug Unit JTAG Boundary Scan, BSDL Power Management Modes ARM926EJ-S 75/150 MHz 4 KB I-cache / 4 KB D-cache 0.18µ CMOS (Improved divide, Single cycle multiply accumulate) AES Accelerator Key Length Cipher Modes Hardware Key Expander DMA-Enabled NIST-Compliant 128-, 192-, 256-bit ECB, CBC, OFB, CTR, CCM FIM (Flexible Interface Module) FIMs Cores Speed Data (SRAM) Program (SRAM) 1/2; Availability depending on application-specific use of external 16-/32-bit memory bus 8-bit DRPIC1655X Up to 300 MHz (4x bus speed) 192 Bytes 2 KB 2 Interface Options SD/SDIO,, 1-Wire, CAN, USB device (low-speed), Other; Please contact us for custom interface implementation options. Power Management Dynamic Clock Scaling (patent pending) Low-Power Sleep Modes Full, /2, /4, /8, /16 speeds, with hardware clock scale control (wake-up events) Configurable Wake-Up Conditions External IRQ, I 2 C, SPI,, Ethernet External IRQ, I 2 C, SPI,, Ethernet, RTC Disabling of Unused System Modules Controller Glue-less Interface Self-Refresh (Sleep Mode) (SDRAM, SRAM, Buffered DIMM, EEPROM, Flash) Dynamic/Static Chip Selects Selection of 5 4/4 Wait States Per Chip Select 0-32 Static Controller Extended Waits (EW) Up to 16,368 Automatic Dynamic Bus Sizing Burst Support 8-transfer, with automatic data width adjustment External DMA Channels 2 Chip Feature

4 System Bus DMA High-Speed Rotating AHB arbiter Deterministic Bus Bandwidth Allocation Multiple Bus Masters 16 channels Ethernet Tx/Rx, I/O Hub, Ext DMA, ARM core External DMA Independent DMA Channels 2 Transfer Modes AES DMA Support AHB Master External peripherals, External memory, AHB peripherals I/O Hub Low Latency DMA 8 channels DMA or Direct Access Mode, SPI, FIM, SPI, ADC, FIM Direct Access Mode Only I 2 C I 2 C, RTC AHB Master External Interrupts External Programmable Interrupts 4 Advanced Vectored Interrupt Controller Two-Tier Priority Low-Latency FIRQ (FIRQ/IRQ) Interrupt Sources 32 Ethernet MAC Data Rates Duplex PHY Interface Address Filtering FIFO Separate Tx and Rx DMA Channels Programmable 8-Entry Restrictive Multicast Filtering Access Modes AHB Master 10 / 100 Mbit/s Full and Half MII Station, Broadcast, Multicast 2 KB Rx / 256 Byes Tx Interrupt and DMA Ports Bit Rates 2 / 4; Availability depending on application-specific use of external 16-/32-bit memory bus Up to Mbps 4 Data Format Channel Modes Modem Control Signals Maskable Interrupt Conditions FIFO Transmit FIFO Bypass 5 to 8 data bits; Odd, Even, or No parity; 1 or 2 stop bits; MSB or LSB first Normal, Local loopback, Remote loopback RTS, CTS, DTR, DSR, DCD, RI Receiver idle; Transmitter idle; Receive error conditions; Character gap timeout; Character match events; State change detection: CTS, DSR, DCD, RI 2 KB Rx / 256 Byes Tx Chip Feature

5 I 2 C v1.0 Master/Slave Bit Rates Address Modes Bus Arbitration 100 kbit/s and 400 kbit/s modes 7-bit, 10-bit SPI (with Boot) Master/Slave Bit Rates 33 Mps (Master) / 7.5 Mpbs (Slave) max SPI Modes 0, 1, 2, 3 Maskable Interrupt Conditions Boot Support Patent Pending Serial Boot Circuit Serial EEPROM, High-speed ROM/flash Automatic configuration, Internal register setup, Boot code transfer to external memory POR 3.3V Voltage Monitoring Early Power-Loss Comparator with Alert for Main Power Shutdown Auxiliary Analog Comparator 2.4V trip point ADC Resolution/Conversion 12 bit/1 MHz Multiplexed Inputs Single-ended 8:1 Rail-to-Rail Input Range 12-Bit Output DMA/Direct External Reference Timers/Counters/PWM General Purpose Timers/Counters PWM Quadrature Decoder Software Watchdog Timer 10 (32-bit) Up to 4 with basic or enhanced functionality IRQ, FIQ, RESET GPIO Multiplexed GPIOs Up to 54 Up to 108 Real-Time Clock Alarm Masks and Event Detection Calendar Resolution 10 ms Integrated NVRAM 64 Bytes External Battery Backup External Clock Source Operating Voltage Core 1.8V I/O Ring 3.3V 5V-Tolerant GPIO and Inputs Chip Feature

6 Operating Temperature 75/150 MHz -40 C to +85 C Power Dissipation 150 MHz Core/75 MHz Bus W 75 MHz Core/75 MHz Bus W 112 MHz Core/56 MHz Bus W 56 MHz Core/56 MHz Bus W Sleep Mode, Wake on Ethernet Sleep Mode, Wake on Ext IRQ W W Main Power Down, Battery Draw 3.0V 32 µa; 1.8V 6 µa Package Type 177-pin BGA (Pin-compatible with NS7520) 265-pin BGA Ball Pitch 0.8 mm Size 13 x 13 mm 15 x 15 mm Lead-Free, RoHS Compliant Chip Feature NS9210 NS9215 You can purchase with confidence knowing that Digi is always available to serve you with expert technical support and our industry leading warranty. For detailed information visit B3/1209 Worldwide HQ France Japan Singapore China Inc. All rights reserved. All other trademarks are the property of their respective owners.