Two-wire Serial EEPROM AT24C01A AT24C02 AT24C04 AT24C08 (1) AT24C16 (2)

Transcription

1 Features Low-voltage and Standard-voltage Operation.7 (V CC =.7V to.v).8 (V CC =.8V to.v) Internally Organized 8 x 8 (K), 6 x 8 (K), x 8 (4K), 04 x 8 (8K) or 048 x 8 (6K) Two-wire Serial Interface Schmitt Trigger, Filtered Inputs for Noise Suppression Bidirectional Data Transfer Protocol 00 khz (.8V) and 400 khz (.V,.7V, V) Compatibility Write Protect Pin for Hardware Data Protection 8-byte Page (K, K), 6-byte Page (4K, 8K, 6K) Write Modes Partial Page Writes Allowed Self-timed Write Cycle ( ms max) High-reliability Endurance: Million Write Cycles Data Retention: 00 Years Automotive Grade, Extended Temperature and Lead-free/Halogen-free Devices Available 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead MAP, -lead SOT, 8-lead TSSOP and 8-ball dbg Packages Die Sales: Wafer Form, Waffle Pack and Bumped Wafers Description The AT4C0A/0/04/08/6 provides 04/048/4096/89/684 bits of serial electrically erasable and programmable read-only memory (EEPROM) organized as 8/6//04/048 words of 8 bits each. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. The AT4C0A/0/04/08/6 is available in space-saving 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead MAP, -lead SOT (AT4C0A/AT4C0/AT4C04), 8- lead TSSOP, and 8-ball dbg packages and is accessed via a Two-wire serial interface. In addition, the entire family is available in.7v (.7V to.v) and.8v (.8V to.v) versions. 8-lead TSSOP 8-lead SOIC Table. Pin Configuration Pin Name A0 - NC Function Address Inputs Serial Data Serial Clock Input Write Protect No Connect Ground Power Supply A0 A 4 8-ball dbg lead PDIP Bottom View A0 A A0 A 4 8-lead MAP Bottom View lead SOT A0 A Two-wire Serial EEPROM K (8 x 8) K (6 x 8) 4K ( x 8) 8K (04 x 8) 6K (048 x 8) AT4C0A AT4C0 AT4C04 AT4C08 () AT4C6 () Note:. This device is not recommended for new designs. Please refer to AT4C08A.. This device is not recommended for new designs. Please refer to AT4C6A. A0 A

2 Absolute Maximum Ratings Operating Temperature... C to + C Storage Temperature... 6 C to +0 C Voltage on Any Pin with Respect to Ground....0V to +7.0V Maximum Operating Voltage... 6.V *NOTICE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC Output Current....0 ma Figure. Block Diagram AT4C0A/0/04/08/6

3 AT4C0A/0/04/08/6 Pin Description SERIAL CLOCK (): The input is used to positive edge clock data into each EEPROM device and negative edge clock data out of each device. SERIAL DATA (): The pin is bidirectional for serial data transfer. This pin is open-drain driven and may be wire-ored with any number of other open-drain or opencollector devices. DEVICE/PAGE ADDRESSES (, A, A0): The, A and A0 pins are device address inputs that are hard wired for the AT4C0A and the AT4C0. As many as eight K/K devices may be addressed on a single bus system (device addressing is discussed in detail under the Device Addressing section). The AT4C04 uses the and A inputs for hard wire addressing and a total of four 4K devices may be addressed on a single bus system. The A0 pin is a no connect. The AT4C08 only uses the input for hardwire addressing and a total of two 8K devices may be addressed on a single bus system. The A0 and A pins are no connects. The AT4C6 does not use the device address pins, which limits the number of devices on a single bus to one. The A0, A and pins are no connects. WRITE PROTECT (): The AT4C0A/0/04/6 has a write protect pin that provides hardware data protection. The write protect pin allows normal read/write operations when connected to ground (). When the write protect pin is connected to V CC, the write protection feature is enabled and operates as shown in Table. Table. Write Protect Pin Status Part of the Array Protected 4C0A 4C0 4C04 4C08 () 4C6 () At V CC Full (K) Array Full (K) Array Full (4K) Array Normal Read/ Write Operation Upper Half (8K) Array At Normal Read/Write Operations Notes:. This device is not recommended for new designs. Please refer to AT4C08A.. This device is not recommended for new designs. Please refer to AT4C6A. Memory Organization AT4C0A, K SERIAL EEPROM: Internally organized with 6 pages of 8 bytes each, the K requires a 7-bit data word address for random word addressing. AT4C0, K SERIAL EEPROM: Internally organized with pages of 8 bytes each, the K requires an 8-bit data word address for random word addressing. AT4C04, 4K SERIAL EEPROM: Internally organized with pages of 6 bytes each, the 4K requires a 9-bit data word address for random word addressing. AT4C08, 8K SERIAL EEPROM: Internally organized with 64 pages of 6 bytes each, the 8K requires a 0-bit data word address for random word addressing. AT4C6, 6K SERIAL EEPROM: Internally organized with 8 pages of 6 bytes each, the 6K requires an -bit data word address for random word addressing.

4 Table. Pin Capacitance () Applicable over recommended operating range from T A = C, f =.0 MHz, V CC = +.8V. Symbol Test Condition Max Units Conditions C I/O Input/Output Capacitance () 8 pf V I/O = 0V C IN Input Capacitance (A 0, A, A, ) 6 pf V IN = 0V Note:. This parameter is characterized and is not 00% tested. Table 4. DC Characteristics Applicable over recommended operating range from: T AI = 40 C to +8 C, V CC = +.8V to +.V, V CC = +.8V to +.V (unless otherwise noted) Symbol Parameter Test Condition Min Typ Max Units V CC Supply Voltage.8. V V CC Supply Voltage.. V V CC Supply Voltage.7. V V CC4 Supply Voltage 4.. V I CC Supply Current V CC =.0V READ at 00 khz ma I CC Supply Current V CC =.0V WRITE at 00 khz.0.0 ma I SB Standby Current V CC =.8V V IN = V CC or V SS µa I SB Standby Current V CC =.V V IN = V CC or V SS µa I SB Standby Current V CC =.7V V IN = V CC or V SS µa I SB4 Standby Current V CC =.0V V IN = V CC or V SS µa I LI Input Leakage Current V IN = V CC or V SS µa I LO Output Leakage Current V OUT = V CC or V SS µa V IL Input Low Level () 0.6 V CC x 0. V V IH Input High Level () V CC x 0.7 V CC + 0. V V OL Output Low Level V CC =.0V I OL =. ma 0.4 V V OL Output Low Level V CC =.8V I OL = 0. ma 0. V Note:. V IL min and V IH max are reference only and are not tested. 4 AT4C0A/0/04/08/6

5 AT4C0A/0/04/08/6 Table. AC Characteristics Applicable over recommended operating range from T AI = 40 C to +8 C, V CC = +.8V to +.V, V CC = +.7V to +.V, CL = TTL Gate and 00 pf (unless otherwise noted) Symbol Parameter.8-volt.,.7,.0-volt Min Max Min Max f Clock Frequency, () khz t LOW Clock Pulse Width Low 4.7. µs t HIGH Clock Pulse Width High µs t I Noise Suppression Time () 00 0 ns t AA Clock Low to Data Out Valid µs t BUF Time the bus must be free before a new transmission can start () 4.7. µs t HD.STA Start Hold Time µs t SU.STA Start Setup Time µs t HD.DAT Data In Hold Time 0 0 µs t SU.DAT Data In Setup Time ns t R Inputs Rise Time ().0 0. µs t F Inputs Fall Time () ns t SU.STO Stop Setup Time µs t DH Data Out Hold Time 00 0 ns t WR Write Cycle Time ms Endurance ().0V, C, Byte Mode M M Note:. The 4C0A/0/04 bearing the process letter D on the package (the mark is located in the lower right corner on the top side of the package), guarantees 400 khz (..0V).. This parameter is characterized and is not 00% tested. Units Write Cycles

6 AT4C0A/0/04/08/6 AT4C0A Ordering Information () Ordering Code Package Operation Range AT4C0A-0PI-.7 AT4C0A-0SI-.7 AT4C0A-0TI-.7 AT4C0A-0PI-.8 AT4C0A-0SI-.8 AT4C0A-0TI-.8 AT4C0A-0PU-.7 () AT4C0A-0PU-.8 () AT4C0A-0SU-.7 () AT4C0A-0SU-.8 () AT4C0A-0TU-.7 () AT4C0A-0TU-.8 () AT4C0A-0TSU-.8 () AT4C0AU-0UU-.8 () AT4C0AY-0YU-.8 () AT4C0A-W.7- () AT4C0A-W.8- () TS 8U 8Y Die Sale Die Sale Lead-free/Halogen-free/ Notes:. For.7V devices used in the 4.V to.v range, please refer to performance values in the AC and DC characteristics table.. U designates Green Package & RoHS compliant.. Available in waffle pack and wafer form; order as SL79 for wafer form. Bumped die available upon request. Please contact Serial EEPROM Marketing. Package Type 8-lead, 0.00" Wide, Plastic Dual Inline Package (PDIP) 8-lead, 0.0" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8-lead, 4.4 mm Body, Plastic Thin Shrink Small Outline Package (TSSOP) 8Y 8-lead, 4.90 mm x.00 mm Body, Dual Footprint, Non-leaded, Miniature Array Package (MAP) TS -lead,.90 mm x.60 mm Body, Plastic Thin Shrink Small Outline Package (SOT) 8U- 8-ball, die Ball Grid Away Package (dbg) Options.7 Low-voltage (.7V to.v).8 Low-voltage (.8V to.v)

7 AT4C0 Ordering Information () Ordering Code Package Operation Range AT4C0-0PI-.7 AT4C0N-0SI-.7 AT4C0-0TI-.7 AT4C0-0PI-.8 AT4C0N-0SI-.8 AT4C0-0TI-.8 AT4C0-0PU-.7 () AT4C0-0PU-.8 () AT4C0N-0SU-.7 () AT4C0N-0SU-.8 () AT4C0-0TU-.7 () AT4C0-0TU-.8 () AT4C0Y-0YU-.8 () AT4C0-0TSU-.8 () AT4C0U-0UU-.8 () AT4C0-W.7- () AT4C0-W.8- () 8Y TS 8U- Die Sale Die Sale Lead-free/Halogen-free/ Notes:. For.7V devices used in the 4.V to.v range, please refer to performance values in the AC and DC characteristics table.. U designates Green Package & RoHS compliant.. Available in waffle pack and wafer form; order as SL79 for wafer form. Bumped die available upon request. Please contact Serial EEPROM Marketing. Package Type 8-lead, 0.00" Wide, Plastic Dual Inline Package (PDIP) 8-lead, 0.0" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8-lead, 4.4 mm Body, Plastic Thin Shrink Small Outline Package (TSSOP) 8Y 8-lead, 4.90 mm x.00 mm Body, Dual Footprint, Non-leaded, Miniature Array Package (MAP) TS -lead,.90 mm x.60 mm Body, Plastic Thin Shrink Small Outline Package (SOT) 8U- 8-ball, die Ball Grid Away Package (dbg) Options.7 Low-voltage (.7V to.v).8 Low-voltage (.8V to.v) 4 AT4C0A/0/04/08/6

8 AT4C0A/0/04/08/6 AT4C04 Ordering Information () Ordering Code Package Operation Range AT4C04-0PI-.7 AT4C04N-0SI-.7 AT4C04-0TI-.7 AT4C04-0PI-.8 AT4C04N-0SI-.8 AT4C04-0TI-.8 AT4C04-0PU-.7 () AT4C04-0PU-.8 () AT4C04N-0SU-.7 () AT4C04N-0SU-.8 () AT4C04-0TU-.7 () AT4C04-0TU-.8 () AT4C04Y-0YU-.8 () AT4C04-0TSU-.8 () AT4C04U-0UU-.8 () AT4C04-W.7- () AT4C04-W.8- () 8Y TS 8U- Die Sale Die Sale Lead-free/Halogen-free/ Notes:. For.7V devices used in the 4.V to.v range, please refer to performance values in the AC and DC characteristics table.. U designates Green Package & RoHS compliant.. Available in waffle pack and wafer form; order as SL79 for wafer form. Bumped die available upon request. Please contact Serial EEPROM Marketing. Package Type 8-lead, 0.00" Wide, Plastic Dual Inline Package (PDIP) 8-lead, 0.0" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8-lead, 4.4 mm Body, Plastic Thin Shrink Small Outline Package (TSSOP) 8Y 8-lead, 4.90 mm x.00 mm Body, Dual Footprint, Non-leaded, Miniature Array Package (MAP) TS -lead,.90 mm x.60 mm Body, Plastic Thin Shrink Small Outline Package (SOT) 8U- 8-ball, die Ball Grid Away Package (dbg) Options.7 Low-voltage (.7V to.v).8 Low-voltage (.8V to.v)

9 AT4C08 () Ordering Information Ordering Code () Package Operation Range AT4C08-0PI-.7 AT4C08N-0SI-.7 AT4C08-0TI-.7 AT4C08-0PI-.8 AT4C08N-0SI-.8 AT4C08-0TI-.8 Notes:. This device is not recommended for new designs. Please refer to AT4C08A.. For.7V devices used in the 4.V to.v range, please refer to performance values in the AC and DC characteristics table. Package Type 8-lead, 0.00" Wide, Plastic Dual Inline Package (PDIP) 8-lead, 0.0" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8-lead, 4.4 mm Body, Plastic Thin Shrink Small Outline Package (TSSOP) Options.7 Low-voltage (.7V to.v).8 Low-voltage (.8V to.v) 6 AT4C0A/0/04/08/6

10 AT4C0A/0/04/08/6 AT4C6 () Ordering Information Ordering Code () Package Operation Range AT4C6-0PI-.7 AT4C6N-0SI-.7 AT4C6-0TI-.7 AT4C6-0PI-.8 AT4C6N-0SI-.8 AT4C6-0TI-.8 Notes:. This device is not recommended for new designs. Please refer to AT4C6A.. For.7V devices used in the 4.V to.v range, please refer to performance values in the AC and DC characteristics table. Package Type 8-lead, 0.00" Wide, Plastic Dual Inline Package (PDIP) 8-lead, 0.0" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8-lead, 4.4 mm Body, Plastic Thin Shrink Small Outline Package (TSSOP) Options.7 Low-voltage (.7V to.v).8 Low-voltage (.8V to.v) 7

11 Packaging Information PDIP E E N Top View c ea End View D D e A COMMON DIMENSIONS (Unit of Measure = inches) SYMBOL MIN NOM MAX NOTE A b b b c b 4 PLCS b b L D D 0.00 E E Side View e 0.00 BSC ea 0.00 BSC 4 L Notes: R. This drawing is for general information only; refer to JEDEC Drawing MS-00, Variation BA, for additional information.. Dimensions A and L are measured with the package seated in JEDEC seating plane Gauge GS-.. D, D and E dimensions do not include mold Flash or protrusions. Mold Flash or protrusions shall not exceed 0.00 inch. 4. E and ea measured with the leads constrained to be perpendicular to datum.. Pointed or rounded lead tips are preferred to ease insertion. 6. b and b maximum dimensions do not include Dambar protrusions. Dambar protrusions shall not exceed 0.00 (0. mm). Orchard Parkway San Jose, CA 9 TITLE, 8-lead, 0.00" Wide Body, Plastic Dual In-line Package (PDIP) DRAWING NO. 0/09/0 REV. B 8 AT4C0A/0/04/08/6

12 TSSOP Pin indicator this corner E E L N Top View L End View b e D Side View A COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX NOTE D , E 6.40 BSC E , A b e 0.6 BSC L L.00 REF Notes:. This drawing is for general information only. Refer to JEDEC Drawing MO-, Variation AA, for proper dimensions, tolerances, datums, etc.. Dimension D does not include mold Flash, protrusions or gate burrs. Mold Flash, protrusions and gate burrs shall not exceed 0. mm (0.006 in) per side.. Dimension E does not include inter-lead Flash or protrusions. Inter-lead Flash and protrusions shall not exceed 0. mm (0.00 in) per side. 4. Dimension b does not include Dambar protrusion. Allowable Dambar protrusion shall be 0.08 mm total in excess of the b dimension at maximum material condition. Dambar cannot be located on the lower radius of the foot. Minimum space between protrusion and adjacent lead is 0.07 mm.. Dimension D and E to be determined at Datum Plane H. /0/0 R Orchard Parkway San Jose, CA 9 TITLE, 8-lead, 4.4 mm Body, Plastic Thin Shrink Small Outline Package (TSSOP) DRAWING NO. REV. B 0 AT4C0A/0/04/08/6

13 TS SOT e 4 C E E C L L Top View End View b A Seating Plane e A NOTES:. This drawing is for general information only. Refer to JEDEC Drawing MO-9, Variation AB, for additional information.. Dimension D does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0. mm per end. Dimension E does not include interlead flash or protrusion. Interlead flash or protrusion shall not exceed 0. mm per side.. The package top may be smaller than the package bottom. Dimensions D and E are determined at the outermost extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs, and interlead flash, but including any mismatch between the top and bottom of the plastic body. 4. These dimensions apply to the flat section of the lead between 0.08 mm and 0. mm from the lead tip.. Dimension "b" does not include Dambar protrusion. Allowable Dambar protrusion shall be 0.08 mm total in excess of the "b" dimension at maximum material condition. The Dambar cannot be located on the lower radius of the foot. Minimum space between protrusion and an adjacent lead shall not be less than 0.07 mm. D Side View COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX NOTE A.0 A c D.90 BSC, E.80 BSC, E.60 BSC, L 0.60 REF e 0.9 BSC e.90 BSC b , R 0 E. Cheyenne Mtn. Blvd. Colorado Springs, CO TITLE TS, -lead,.60 mm Body, Plastic Thin Shrink Small Outline Package (SHRINK SOT) 6//0 DRAWING NO. REV. POTS A AT4C0A/0/04/08/6