Introduction Construction State of the Art. Virtualization. Bernhard Kauer OS Group TU Dresden Dresden,

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1 Virtualization Bernhard Kauer OS Group TU Dresden Dresden,

2 Motivation The vision: general-purpose OS secure trustworthy small fast fancy

3 First problem: Legacy Application Supporting old applications users expect to run on your new OS Mail Reader and Browser, Word and itunes, specialized business App latest Direct-X and old DOS games ;-) porting all of them is not possible big effort closed source

4 Second problem: Drivers Supporting any device users expect to run your OS an any PC plenty of devices Input: USB, PS2, Keyboards, Mice, Keypads Graphics: Framebuffer, 3D Acceleration Disks: SATA, SCSI, IDE, USB Network: Ethernet, Wireless, GPRS, DSL, Serial Modems Printer: PS, GDI, Plotter Scanner: USB, Firewire, SCSI, ParallelPort... writing a driver for all of them big effort no documentation, binary driver only

5 1 Introduction Motivation Virtualization Original Implementation Hardware Support

6 A Solution By virtualizing a commodity OS over a low-level kernel, we gain support for legacy applications, and devices we don t want to write drivers for. Roscoe et al., Hype and Virtue, HOTOS XI 2007 Keywords virtualizing the technique is virtualization low-level kernel we use a microkernel

7 Overview LApp LApp VM Kernel VM Hypervisor LApp - Legacy Application, Legacy Drivers VM - Virtual Machine, Guest OS low-level kernel - hypervisor

8 Original Implementation Idea Idea: VM run in Address-Spaces But run the OS as normal application sensitive instructions trap to the hypervisor guest OS clashes with hypervisor in page-table certain x86 instructions do not trap example: popf drops the interrupt flag result: either invalid behavior or unsecure virtualization

9 Original Implementation Solutions Emulation fetch, decode and execute instruction one after another needs only be done for kernel code binary translation used to speedup this process Para-virtualization link kernel to lower address patch sensitve instructions with traps at compile time But: emulation slow and complex para-virtualization needs the source

10 CPU Support General Guest OS executes and traps to the hypervisor on events Hypervisor inspects VM state, emulates and resumes VM CPU extensions new processor modi: root vs. non-root mode control structure for guest state and intercepts special instruction for running a VM save the current host state load the guest state from VMCS/VMCB #VMExit restores host state available from Intel and AMD since 2005/2006

11 CPU Support Intel VT vs AMD SVM Control structure VT: VMCS accessed with vmread/vmwrite instructions SVM: VMCB just a normal page Reason: VMCS state can be cached on die Other Differences SVM: more intercepts, intercept on sti, lgdt VT: shadow registers for selective register intercepts vmresume vs. vmrun

12 2 Construction Architecture Hypervisor Interface VMM Considerations Misc

13 Virtualization Architecture LApp LApp VM Kernel VM non-root Hypervisor root Hypervisor supported by the Hardware Virtual Machine in non-root mode

14 Microkernel Architecture App Driver Micro-Kernel GUI user kernel Small Kernel Applications and Servers

15 Combined Architecture LApp LApp VM Kernel VM non-root root App Driver Hypervisor+Kernel GUI user kernel Applications and Virtual Machines supported Disadvantage: Big Kernel

16 NOVA OS Virtualization Architecture LApp LApp VM Kernel VM non-root root App VMM Driver VMM GUI user kernel Micro-Hypervisor Externalize virtualization functionality from kernel One Virtual Machine Monitor per Guest OS

17 Hypervisor Interface What needs to be implement at the hypervisor level? Ideally nothing! VMCS access and vmresume only possible in hypervisor hypervisor has to validate guest state to avoid VM escapes Run vs Trap semantic run VM until a #VMExit happens trap to the VMM only when needed run simpler, but more round-trips due to external IRQ trap needs a way to force VM into VMM - recall

18 Hypervisor Interface - State Transfer (1) State Transfer need to transfer CPU state from HV to VMM and back reason: splitted Hypervisor and VMM simplest solution shared memory page between HV and VMM VMM writes directly into VMCB but: HV has to validate whole VM state on any VM run Intel VMCS inaccessible by VMM

19 Hypervisor Interface - State Transfer (2) Performance Argument transfer of whole CPU and FPU state expensive even the VMCS read-out costs many cycles Solution selective state transfer VMM requests only state it needs depending on the #VMExit Reason Example: cpuid needs only EIP, instruction len, EAX produces new EIP, EAX, ECX, EDX, EBX

20 VMM - CPU Virtualization Simple Cases most #VMExit are simple to handle Example: rdmsr EDX:EAX get value of a virtual MSR skip original instruction by advancing the EIP Difficult: MMIO instructions not enough context information from the hardware unknown whether it was an mov or xor solution: instruction emulation similar for unsupported CPU modes, e.g. realmode on Intel

21 VMM - Device Emulation Guest OS expects access to hardware devices hypervisor can not allow the VM to directly access most HW security reason: VM could take over host Solution VMM virtualizes devices virtual device models have to behave like real hardware implement hardware state machine in software

22 Device Emulation Example: PIC 8259 case 0x20: // outb to port 0x20 if (value & 0x10) { _icw[icw1] = value; _icw_mode = ICW2; }... case 0x21: // outb to port 0x21 switch (_icw_mode) { case ICW2: _icw[icw2] = value & 0xf8; _icw_mode = ICW3; break; case ICW3: _icw_mode = ICW4; if (~_icw[icw1] & ICW1_SNGL) { _icw[icw3] = value; break; } case ICW4: _icw_mode = OCW1; if (_icw[icw1] & ICW1_IC4) { _icw[icw4] = value; break; } case OCW1: _imr = value; propagate_irq(true); break; }

23 VMM Needed Features Device Models Timer: PIT, RTC, HPET, PMTimer Interrupt Controller: PIC, LAPIC, IOAPIC PCI hostbridge, MSI support Input+Output: keyboard, mouse, serial port, VGA Network card Disk controller Virtual BIOS Screen output and Keyboard input Memory discovery: e820 memory map Disk access ACPI tables and BIOS data area

24 Further Topics Device Backends Direct Assigned Devices Shadow Paging: VTLB and VTLB2 Nested Paging: EPT and NPT IRQ handling Nested Virtualization Generating the instruction decoder Hypervisor optimizations

25 3 State of the Art Projects NOVA Results Future Work

26 State of the Art Virtualization Projects No Hardware Support Emulation only: Qemu, Bochs, VMware Workstation Para-Virtualization: L4Linux, Xen, VMware Tools Using x86 Hardware Extensions Research: NOVA, L4-KVM, SecVisor, Palacios, Luvalley,... Commercial: KVM, Xen, Hyper-V, Vmware ESX, VirtualBox

27 State of the Art Source-code Size Lines of Source Code Qemu VMM Dom0 Linux Qemu VMM Qemu VMM L4 Linux 2008 Server Linux User Env. Hyper visor Hyper Hyper VMM visor L4 visor NOVA Xen KVM KVM-L4 ESXi Hyper-V NOVA aimed for a small Trusted Computing Base Virtualization can be implemented within 30 ksloc

28 State of the Art Performance: Linux-Kernel Compile Relative native performance (%) s s NOVA Direct Native s s s s Hyper-V ESXi XEN KVM s s KVM NOVA s s KVM NOVA s s KVM NOVA s s s L4Linux XEN s s KVM-L4 NOVA Native s Intel Core i7 EPT with VPID Intel Core i7 Intel Core i7 Intel Core i7 EPT w/o VPID EPT, Small Pages Shadow Paging Intel Core i7 Paravirtualization AMD Phenom NPT with ASID Parallel Linux-Kernel Compile on a single CPU Memory and CPU-bound benchmark

29 State of the Art Performance: Network I/O CPU Utilization (%) Bandwidth (MBit/s) Native Direct VF Model E1000 Network streaming benchmark with NOVA Virtualization doubles the CPU Overhead

30 Challenges For you to solve Bridging the performance gap between real and virtual-i/o Scalable Virtualization Building Driver VMs Accelerating nested virtualization Testing instruction emulators and device models

31 References Robert P. Goldberg. Survey of Virtual Machine Research. Computer, 7(6):34 45, Hermann Härtig, Michael Hohmuth, Jochen Liedtke, Jean Wolter, and Sebastian Schönberg. The Performance of µ-kernel-based Systems. In Proceedings of the 16th ACM Symposium on Operating Systems Principles (SOSP), pages ACM, Udo Steinberg and Bernhard Kauer. NOVA: A Microhypervisor-Based Secure Virtualization Architecture. In Proceedings of the 5th ACM SIGOPS/EuroSys European Conference on Computer Systems. ACM, 2010.

VIRTUALIZATION. Dresden, 2011/6/23. Julian Stecklina

VIRTUALIZATION. Dresden, 2011/6/23. Julian Stecklina Department of Computer Science Institute of Systems Architecture, Operating Systems Group VIRTUALIZATION Julian Stecklina (jsteckli@os.inf.tu-dresden.de) Dresden, 2011/6/23 00 Goals Give you an overview