EECS 140 Laboratory Exercise 5 Prime Number Recognition

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1 1. Objectives EECS 140 Laboratory Exercise 5 Prime Number Recognition A. Become familiar with a design process B. Practice designing, building, and testing a simple combinational circuit 2. Discussion In this exercise you will design and build a simple combinational circuit that recognizes 4-bit binary prime numbers. The circuit must be implemented exclusively with NAND gates and INVERTERs in a two level logic format. Part of your objective in this design is to implement the circuit with as few gates as possible. To test your recognizer, you will use the outputs from your 4-bit counter from Lab 4 to cycle through all possible 4-bit values. Designing and implementing a combinational circuit at first can seem like a daunting task. You are given a verbal description of a system, and asked to build it. Luckily, designers have developed a standard approach for attacking these types of design problems that helps take the guess work out of the design process, and provides a roadmap for steering you through. The general approach consists of: 1) Determining Requirements This step answers the general question of what is it that you are designing. It is very important to understand what you are trying to design before you start to formulate a solution and build hardware. 2) Performing the Design This step answers the general question of where and how. In formal structured design processes, this step consists of first performing a top-level design that breaks the overall system into more manageable subsystems, followed by a detailed design of each subsystem. Breaking the system into subsystems answers the question of where, and designing each subsystem answers the how. For this lab, we are only concerned with the how of designing a particular subsystem, so no top-level design is needed. A critical component of this step is generating supporting documentation. From this point on in the design process, you will work solely from this documentation. For this lab, the documentation will consist of properly formatted schematics and a netlist. 3) Implementation

2 This step represents the transition from a paper design, to implementing your design with chips, wires, and physical components. This step depends on you having performed your design correctly and having generated accurate and complete documentation. 4) Testing and Verification This step represents the point where you demonstrate that your design is correct. It may seem obvious to you why you would need this step, but you would be surprised at how often this step is not performed correctly. It is necessary for you to choose test inputs that exercise your design as completely as possible. Remember that it is up to you to demonstrate that your design works properly. 5) Report Results After you have designed and tested your circuit, you should write up the results of your effort. If you do an excellent design and do not document the results, you might as well have skipped the entire exercise. A good report should state what the circuit was designed to do (requirements), include all supporting documentation (schematics, netlist), and the results of the testing and verification. A well written technical report is organized, clear, concise, and complete. Think about what an engineer modifying your design would need to know to quickly understand your design. Generally, the first step in performing a design is to understand what the verbal description of the problem is asking. The verbal description is then translated into a set of technical requirements. Understanding the verbal description and deriving the technical requirements is the hardest part of a design. These steps generally require much head scratching, and a certain amount of experience in order to be performed efficiently. After the technical requirements have been derived, then standard techniques can be applied to guide you through the remainder of the design. From this point on, the design process proceeds through very organized steps. For this lab, you have been given a fairly detailed technical description of the desired circuit, and you should be able to begin applying the standard techniques you have learned in lecture to design your circuit. This is a two week lab exercise. During week one you will design your prime number recognition circuit. During week two, you will implement and test your circuit. Please note that all design steps can be completed prior to week one. 3. Description Design a combinational circuit that inputs a 4-bit binary number, and outputs TRUE whenever the input value is a prime number, e.g. 1, 2, 3, 5, 7, 11, or 13. The four inputs to your circuit will be the outputs QA, QB, QC, QD from the counter circuit designed in Lab 3. To view the four outputs together as a single binary number, we will assume that QA is the least significant bit (1's), QB is the next least significant (2's), QC is the next (4's), and QD is the most significant bit (8's). So, if QA and QC are on and QB and QD are off, we add to get a value of 5. By looking at the

3 outputs in this manner, the counter will cycle through the numbers 0, 1, 2,... 14, 15, 0, 1, 2,... continuously. Week 1: Designing a Prime Recognizer Circuit During week 1 you will complete the design of a prime number recognition circuit. In the following steps, you will use standard techniques presented in class to design a simple two level logic circuit. At the end of week one, you will be required to show your lab TA the results of your design. Note that all steps can be completed prior to coming to lab. It is highly recommended that you start your design before the lab session. Step 1 - Design your Prime Recognizer Circuit So far, the standard design techniques you have been given are: (i) Truth tables for specifying the behavior of a circuit in terms of inputs and outputs; (ii) K-maps for generating efficient and minimal expressions; and (iii) AND/OR, NAND/NOR circuits to implement logic expressions. You should also be familiar with the basic Axioms of Boolean Algebra and Karnaugh maps that can be used to manipulate and reduce logic expressions. Your design should flow through each of these techniques, starting from the truth table representation, through K-maps and the Axioms of Boolean Algebra. In order to practice this part of the design flow, perform the following steps in order for your design: 1. Generate a truth table for the prime number recognition function. For each possible input combination, specify what the respective output should be. Remember to identify the most significant and least significant input bit. 2. From the truth table, generate a Boolean algebra expression for the Prime Recognizer Circuit (PRC) function using sum of products notation. 3. Simplify your PRC function using Boolean algebra simplification techniques or Karnaugh maps. When simplifying, remember that you must implement a two level logic system. Additionally, you will be using only NAND gates and inverters in your implementation. As you simplify, make certain you maintain the general sum of products form. Remember, you are searching for a minimal circuit. 4. Convert your function into a two level logic circuit using standard components. As you design your circuit, remember that you want as simple a circuit as possible. Using Boolean algebra simplification may not assure a minimal circuit. Proper use of Karnaugh maps will guarantee a minimal circuit. Think about the characteristics of a Karnaugh map that indicate when it is minimal. At the end of this step in the design process, you should be comfortable with how your circuit will work. The successful completion of this step is an important point in the design process. All remaining steps will be focused on documenting and implementing the resulting design. If the design is

4 good, then the amount of effort from now on will be reasonable. If the design has flaws, you will spend considerable time in correcting and re-doing each of the following steps. Therefore, you should spend enough time in this first step to convince yourself that you have a really good design! Spending an additional hour in this step convincing yourself that you have a proper design will save you many hours of head scratching trying to debug and correct a faulty design. Step 2 Draw a schematic for your Prime Recognizer Circuit Documenting a design is also very important in the design process. A well documented design can be picked up by any competent engineer and understood. This is important as most designs are performed in teams. Each team must be able to pick up and understand other teams designs in order to modify the original design, add an additional component, or debug and test the design. You may also have to pick up a schematic you have previously drawn, and continue on with the design. Although companies generally develop their own unique standards, all schematics adhere to basic rules and contain the same information. The standard developed for this class was given in Lab 4, and contains the same basic information found in all schematics. Draw a schematic for your PRC. Show each gate in the design and all interconnects between gates. Follow the instructions for drawing schematics given in Lab 4. Step 3 - Select your components Decide which components you need to build your circuit. For this exercise, you must use only NAND and INVERTER operations. Select from the following available components to construct your circuit: For the INVERT function, use 74LS04 or equivalent For 2-input NAND function, use 74LS00 or equivalent For 3-input NAND function, use 74LS10 or equivalent For 4-input NAND function, use 74LS20 or equivalent Cost is an important issue in any engineering design. Therefore, you should implement your circuit using as few packages as possible. Recall that any two level logic circuit implementing a function in sum of products form can be implemented using NAND gates and INVERTERs exclusively. This technique can be understood using either DeMorgan s Law or by using rules for bubble manipulation in a schematic diagram as covered in class. Step 4 Develop a netlist for your circuit In addition to schematics, netlists are also an important component of a properly documented design. Develop a netlist describing how your components will be interconnected using techniques learned in Lab 4. Assign each gate in your schematic to a device on a chip. Label your schematic to indicate the chip and pin numbers associated with each logic gate. Use these

5 results to generate a netlist. Don t forget to include power and ground connections in your netlist. No Lab Report is required at the end of week one. However, you are required to show your TA the results of your preliminary design activities. This includes truth tables, equations, K-maps and/or logic simplification, schematic, parts list and netlist. Note that much of this can be completed prior to coming to lab. Week 2: Build and Test Your PRC Circuit Having completed your design in week one, it is now time to construct and test your implementation. The construction of your circuit proceeds in the same manner as previous weeks. However, testing and debugging this circuit may be more complicated than previous circuits. Remember that each NAND gate corresponds to a single product term in your design. This can dramatically simplify your circuit debugging task. Step 1 Build your combinatorial circuit Now you are finally ready to start implementing your design! At this point, you have invested a considerable amount of time in developing and documenting your design. If each previous step has been performed correctly, you should be able to directly implement your design from your schematics and netlist without modification. In this case, if the circuit does not function properly, errors are due to improper connections or faulty parts. Although this is what the designer ultimately shoots for, slight modifications to the original design are sometimes required, and are not uncommon. If you have design errors (as opposed to errors resulting from wiring or bad chips) you may be required to traverse back to the very first step in the design process to uncover logic errors etc. If you are convinced that your design was correct and the circuit is properly wired, then you may have incorrectly drawn your schematic or netlist. In any of these cases, you must update your previous documentation to reflect any required fixes or modifications. Obtain the ICs you selected in Step 4 and wirewrap sockets for each chip from the EECS Shop. Make a list of the components and for each IC obtain a 14-pin or 16-pin wirewrap socket. Take your list to the EECS Shop and obtain the parts you need. You must be specific in asking for the circuits you need. Build your combinatorial circuit by stepping through each connection in your netlist and making the indicated connection. As you make each connection, make a check mark by that connection in your netlist. Finally, ring out your circuit to determine if your wiring is correct. To test your circuit, you will use the outputs from your 4-bit counter implemented in Lab 4. Connect QD to the most significant bit, QC to the 4 s bit, QB to the 2 s bit, and QA to the least significant bit of your recognizer. Observe the outputs of the counter and the output of your PRC to determine if the PRC is operating correctly. Note that we choose to test the PRC with the counter because it systematically steps through each possible 4-bit value. By observing the

6 circuit output associated with each input, you are assured that your testing will cover all possible input values. Step 3 - Verify operation Once reached, this step represents the final stage of your design effort. You should feel a strong sense of accomplishment after this step has been successfully completed. This is what design is all about!! Check the operation of your circuit. First, verify that your counter is still operating: A. Verify that your oscillator is operating. Note the frequency of your oscillator. B. Verify that your counter is counting. Second, verify that your prime number recognition circuit is correct: D. For each product in you minimized Boolean expression, check the output of the NAND gate generating that product. Does it match what you expect? Does the NAND gate output a positive or a negative logic value? How does this affect your testing activity? If any of your NAND gates produce incorrect values, stop and determine why the gate is producing an incorrect value. E. Check the output of the entire circuit. Does it match your expected output? To check the circuit output you may want to put the RCO (Ripple Carry Out) signal from your counter on Channel 1 of the oscilloscope and the output of your circuit on Channel 2. Trigger the 'scope on the positive edge of Channel 1 and move the trigger point to the left side of the display. Adjust the horizontal scale to see a second RCO pulse on the right side of the display. You should see RCO go high when the counter contains the value 15. You can then relate your expected output to what you observe on the scope. Draw the output signal form. If you have questions about using the oscilloscope in this manner, please ask your TA for help. Step 3 - Write your lab report Write your lab report per instructions from your TA. Remember to include all of your schematics, netlists and other design documentation. Use a logic template and straight edge to neatly draw each circuit.

EECS 140 Laboratory Exercise 4 3-to-11 Counter Implementation

EECS 140 Laboratory Exercise 4 3-to-11 Counter Implementation 1. Objectives A. To apply knowledge of combinatorial design. B. Gain expertise in designing and building a simple combinatorial circuit This