The World Leader in High Performance Signal Processing Solutions. Development Tools.

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1 The World Leader in High Performance Signal Processing Solutions Development Tools 2004

2 What is CROSSCORE? Analog Devices DSP Development Tools CROSSCORE Components VisualDSP++ Emulators Evaluation Boards CROSSCORE Functions Systems development Systems optimization 2

3 Cont. VisualDSP++ Emulator Evaluation Boards Software IDDE Development Debugging Hardware ICE Connecter PC -> DSP target board USB PCI EZ-KIT Lite Hardware Development board Cable Software Fundamental debugging software Evaluator 3

4 The World Leader in High Performance Signal Processing Solutions VisualDSP++

5 What is VDSP++ TM? VisualDSP++ is an integrated development environment that delivers efficient project management so programmers can easily move between editing, building, and debugging. Key Features Include: IDDE with integrated VDK core C/C++ compiler Assembler & Linker Simulation software & Code example VisualDSP++ offers programmers a powerful programming tool with flexibility that significantly decreases the time required to port software code to a DSP, reducing time to market. 5

6 6

7 Processors & Platforms Supported 21XX 16 Bit Family: VDSP-21XX-PC-FULL Family: VDSP-SHARC-PC-FULL Family: VDSP-Blackfin-PC-FULL Platforms Supported Windows 98, 2000 Window NT,ME,XP Family: VDSP-TS-PC-FULL 7

8 Cont. VisualDSP++ Version VisualDSP VisualDSP VisualDSP (Latest) Support for new processor Multiple project support License management in IDDE Profile-guided optimization in IDDE 8

9 Features of VisualDSP Integrated Development and Debugger Environment (IDDE) Simulator High level language support including C and C++ Expert Linker Graphical support for managing linker description files Easy to use Online Help Interfacing to VisualDSP++ via Active X Plug-Ins Easy to test and verify applications with TCL scripts VisualDSP Component Software Engineering (VCSE) VisualDSP++ RTOS/Kernel/Scheduler (VDK) Integrated Source Code Control 9

10 Invoking the Software Tools Software tools may be configured and called by the IDDE Software tools are configured via property pages The IDDE calls the software tools it needs to complete the build Software tools can be invoked from a Command line C Compiler: ccblkfn sourcefile -switch [-switch...] Assembler: easmblkfn sourcefile -switch [-switch...] Linker: linker object [object ] -switch [-switch ] Loader: elfloader executable -switch [-switches...] For the complete list of switches see the appropriate tools manual 10

11 IDDE Features IDDE manages the project The user configures the project and the development tools via property pages Project Property pages configure the project Project Property Page General Property Page Development Tools Property Pages are used to configure the development tools Assembler Property Page Compiler Property Page Linker Property Page Loader Property Page Post Build Property Page VCSE Interface Definition Language (VIDL) Property Page 11

12 Project Development Create a project All development in VisualDSP++ occurs within a project. The project file (.DPJ) stores your program s build information: source files list and development tools option settings 12

13 Project Property Page Configure project options Define the target processor and set up your project options (or accept default settings) before adding files to the project. The Project Options dialog box provides access to project options, which enable the corresponding build tools to process the project s files correctly 13

14 Property Pages Assembler Property Page C/C++ Compiler Property Page Linker Property Page Loader Property Page 14

15 General Property Page Property Pages Compiled Simulation Property Page Post Build Property Page VCSE Interface Definition Language (VIDL) Property Page 15

16 Selecting VisualDSP++ Sessions Sessions define Debug Environments Select Sessions pull down menu Choose Sessions List Select Session to activate Define New Session from Session List Select New Session Configure session as required e.g. Debug target : ADSP-BF53x Family Simulator Platform : ADSP-BF53x Single Processor Simulator Session name : ADSP-BF533 ADSP-BF53x Single Processor Simulator Click OK Session name will appear in Session List Click Activate IDDE session will open 16

17 Debug Features Single Step Run Halt Set Breakpoints Profiling Plotting Pipeline Viewer Cache Viewer Memory Viewing Register Viewing Compiled Simulation 17

18 VisualDSP Software Development Flow Code Generation Generate Assembly Source (.ASM) and / or Generate C/C++ Source (.C/CPP) Assembler.DOJ C/C++ Compiler.S Software Verification Linker Description File.LDF.DXE Linker.DXE VisualDSP++ Simulator Software Build process.dxe.dxe System Verification Hardware Evaluation EZ-Kit Lite Target Verification ICE NO Working Code? YES.DXE ROM Production LOADER.LDR PROM Burner 18

19 VisualDSP C-Compiler Function Source Code File (.C) Include Files C Compiler Assembly File (.s) ASCII 19

20 VisualDSP Software Build Process Source Files (.C and.asm) Object Files (.DOJ) cfile1.c C - Compiler cfile1.doj asmfile1.doj.s asmfile1.asm Assembler 20

21 Software Development Flow Step 1- Compiling & Assembling Source Files (.C and.asm) Compiler & Assembler Object Files (.DOJ) Linker Executable (.DXE) Debugger (In-Circuit Emulator, Simulator, or Parallel Port ) Loader / Splitter Linker Description File (.LDF) Boot Kernel (.DXE) Boot Image (.LDR) 21

22 Software Development Flow Step 2 - Linking Source Files (.C and.asm) Compiler & Assembler Object Files (.DOJ) Linker Executable (.DXE) Debugger (In-Circuit Emulator, Simulator, or Parallel Port ) Loader / Splitter Linker Description File (.LDF) Boot Kernel (.DXE) Boot Image (.LDR) 22

23 VisualDSP Software Linking Process cfile1.doj Object Files (.DOJ) Executable (.DXE) FOO EXTERN asmfile1.doj OUTPUT SECTION SEG_PMCO SEG_DMDA OBJECT SECTION SEG_STAK OBJECT SECTION OBJECT SECTION OBJECT SECTION OBJECT SEGMENT OBJECT SECTION OBJECT SECTION OBJECT SEGMENT OBJECT SEGMENT OBJECT SECTION OBJECT SEGMENT OBJECT SEGMENT OBJECT SECTION OBJECT SEGMENT OBJECT SEGMENT OBJECT SECTION OBJECT SECTION 23 DATA1 CODE1 OBJECT SECTION LINKER LDF OUTPUT SECTION OUTPUT SECTION OUTPUT SECTION OUTPUT SECTION

24 VisualDSP Linker Features Generates a DSP Executable Program (filename.dxe) Resolves All External References Assigns Addresses to relocatable Code and Data spaces Generates Optional Memory Map Supports Multi-Processor Shared Memory and Overlays Controlled by linker commands contained in a linker description file (LDF) Memory setup Libraries Files to link 24

25 VisualDSP Linker Description File ( LDF ) Features The link process is controlled by a linker command language The LDF provides a complete specification of mapping between the linker's input files and its output. It controls input files output file target memory configuration Preprocessor Support 25

26 VisualDSP LDF consists of three primary parts Global Commands Defines architecture or processor Directory search paths Libraries and object files to include Memory Description Defines memory segments Link Project Commands Mapping of input sections to memory segments Output file name Link against object file list 26

27 Expert Linker Graphical alternative to Linker Definition File (LDF) text format Though powerful, the LDF format is intimidating to new users, especially those with limited experience in embedded programming Graphical tools to create a memory map, place objects, create overlays, etc. LDF auto-generated for linker consumption Round tripping possible (GUI will consume existing LDF) Will support pre-link visualization May not support all LDF features in initial release 27

28 Control Mapping of Sections Unmapped sections can be mapped simply by dragging to an appropriate memory segment. Graphical Memory Map View 28 Memory Map Tree View

29 Pipeline Viewer 29

30 Errors 30

31 Debug Features and MP Support Debug features Setting breakpoints and watchpoints allows you to halt the processor on various conditions For instance you can set a watchpoint on a location in memory, if the memory location gets written too or read from the processor will halt. Multiprocessor support features Supports memory sharing among processors Simple visual feedback for focusing on particular processor Processor Status windows Ability to control groups of processor together 31

32 Statistical Profiling Non-intrusive statistical profiling (Patent Pending) Does not halt the DSP No extra coded added to the application The Debugger has the ability to randomly sample the target processors PC and then present the user with a graphical display of the resultant samples. This will let the user easily see where their application in spending most of its time. Since the JTAG sampling is completely non-intrusive, this process will not incur any additional run-time overhead. Allows developer to passively gather important metrics without interrupting the real-time characteristics Programmer can focus on those areas in the program that impact performance and take corrective action 32

33 33

34 Easy to Learn with Online Help Fully searchable and indexed online help Includes quick overviews on using VisualDSP++ and all of its features. Excellent supplement to the manual for things that are better represented visually such as what various plot windows should look like. Customizable by using the Favorites window 34

35 The World Leader in High Performance Signal Processing Solutions Emulators for Analog Devices DSPs

36 EMULATOR USB HP-USB Emulator ADDS-HPUSB-ICE USB Emulator ADDS-USB-ICE PCI HP-PCI Emulator ADDS-HPPCI-ICE 36

37 EMULATOR HP USB-Based Emulator HP USB-ICE Package HP USB-ICE or USB-ICE assembly 5 volt power supply 3 meter USB type-a to mini-b cable Registration card 37

38 EMULATOR HP PCI-Based Emulator HP PCI-ICE Package HP PCI-ICE JTAG daughter card HP PCI-ICE pod assembly CD containing emulation driver software Registration card 38

39 Apex-ICE USB Emulator Universal Serial Bus (USB)-based emulator for Analog Devices JTAG DSPs First portable solution for Analog Devices JTAG DSPs Small hand-held unit Small diameter cable, 5 meters in length, for hard to reach targets Powered externally For Analog Devices JTAG DSPs Windows 98, Windows 2000, ME, XP VisualDSP++ and VisualDSP Part # ADDS-APEX-ICE 39

40 Summit-ICE PCI Emulator 32-bit PCI interface add-in card Four inch, flexible shielded target board cable for easy access to a 14-pin JTAG header Embedded ICEPAC technology provides a rugged and reliable solution Remote 3V/5V JTAG Pod with extended, shielded cable (1.5 m) Windows 9x, Windows 2000 and Windows NT, ME, XP PNP For Analog Devices JTAG DSPs VisualDSP++ and VisualDSP Part # ADDS-SUMMIT-ICE 40

41 The World Leader in High Performance Signal Processing Solutions EZ-KIT LITES for Analog Devices DSPs

42 Evaluation Board All EZ-KIT Lite products BF533 EZ-KIT Lite BF535 EZ-KIT Lite BF561 EZ-KIT Lite TS101 EZ-KIT Lite TS201 EZ-KIT Lite 21XX EZ-KIT Lite 21065L EZ-KIT Lite EZ-KIT Lite 21161N EZ-KIT Lite EZ-KIT Lite 2181 EZ-KIT Lite 2189M EZ-KIT Lite 2191 EZ-KIT Lite EZ-KIT Lite 42

43 ADSP-BF535 EZ-KIT Lite Hardware Features Single ADSP Digital Signal Processor 16 MB SDRAM 8Kx16 of SRAM memory 256Kx16 of dual FLASH memory AD kHz AC 97 SoundMax codec ADP3088 Analog Devices switching regulator for core power management USB version 1.1 compliant interface JTAG ICE 14 Pin Header Evaluation suite of VisualDSP++ External Power Supply Desktop standalone operation Software Features Support for Win2000 and WinNT Evaluation suite of VisualDSP++: compiler, assembler, linker, prom splitter (loader), VisualDSP++ debugger interface. VisualDSP++ limited to use with EZ-KIT Lite hardware. Part# ADDS-BF535-EZLITE 43

44 EZ-KIT Lite Processor ADSP-BF531 ADSP-BF532 ADSP-BF533 ADSP-BF535 Evaluation Kit/Reference Board BF533 EZ-KIT Lite 1 BF535 EZ-KIT Lite ADSP-BF561 BF561 EZ-KIT Lite 1 1 BF533 EZ-Extender daughter card for ADSP-BF533 EZ-KIT Lite and ADSP-BF561 (only sold separately). 44

45 BF533 EZ-KIT Lite System Architecture 45

46 Green Hills Development Tools Partnership MULTI IDE integrated with Visual DSP++ compiler and simulator Graphical display of compiler options Full debugging support Green Hills Probe Full run control and download support Complete GHS IDE and toolset Includes fully validated GHS C and C++ compiler 46

47 VisualDSP++3.5 Hands on Hands on Name: 2-1 Software platform: VisualDSP++3.5 Hardware platform: BF533 EZKIT Target Using Blackfin develop environment How to open and run a project in VisualDSP++ How to use flash programmer 47

48 Q & A 48

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