A23W8308. Document Title 262,144 X 8 BIT CMOS MASK ROM. Revision History. Rev. No. History Issue Date Remark
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1 Preliminary 262,144 X 8 BIT CMOS MASK ROM Document Title 262,144 X 8 BIT CMOS MASK ROM Revision History Rev. No. History Issue Date Remark 0.0 Initial issue November 11, 1999 Preliminary PRELIMINARY (November, 1999, Version 0.0) AMIC Technology, Inc.
2 Preliminary 262,144 X 8 BIT CMOS MASK ROM Features 262,144 x 8 bit organization Wide power supply range : +2.7V to +5.5V Access time: 120 ns (max.)/5v 150 ns (max.)/3v Current: Operating: 50mA (max.)/5v 15mA (max.)/3v Standby: 50µA (max.)/5v 25µA (max.)/3v General Description The A23W8308 high-performance Read Only Memory is configured as 262,144 x 8 bits. It is designed to be compatible with all microprocessors and similar applications where high-performance, large-bit storage, and simple interfacing are important design considerations. This device is designed for use with operating voltage from 3V to 5V. Mask Programmed for Chip Enable (power-down) CE/ CE, Output Enable OE/ OE /NC Three-state outputs for wired-or expansion Full static operation All inputs and outputs are directly TTL-compatible Available in 32-pin DIP, 32-pin SOP, 32-pin PLCC packages or in DICE FORM. The A23W8308 offers an automatic POWER-DOWN controlled by the Chip Enable CE/ CE input. When CE/ CE goes low/high, the device will automatically POWER-DOWN and remain in a low power STANDBY mode as long as CE/ CE remains low/high. A23W8308 also offers OE/ OE /NC (Active High or Low or No Connection), which eliminates bus contention in multiple bus microprocessor systems. Pin Configurations P-DIP / SOP PLCC NC 1 32 VCC A12 A15 A16 NC VCC NC A17 A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 O0 O A23W NC A17 A14 A13 A8 A9 A11 OE/OE/NC A10 CE/CE O7 O6 O5 A7 A6 A5 A4 A3 A2 A1 A0 O A23W A14 A13 A8 A9 A11 OE/OE/NC A10 CE/CE O7 O2 GND O4 O3 O1 O2 GND O3 O4 O5 O6 PRELIMINARY (November, 1999, Version 0.0) 1 AMIC Technology, Inc.
3 Block Diagram ROW DECODER DRIVER MEMORY CELL ARRAY 262,144 A0 - A17 ADDRESS INPUTS COLUMN DECODER DRIVER COLUMN SELECTOR CIRCUITRY CE/CE OE/OE/NC POWER-DOWN OR OUTPUT ENABLE CIRCUITRY O0 O1 O2 O3 O4 O5 O6 O7 PRELIMINARY (November, 1999, Version 0.0) 2 AMIC Technology, Inc.
4 Pin Descriptions 32L DIP/SOP 2-12, 23, Pin No. 32L PLCC 2-12, 23, Symbol A0 - A17 Address Inputs CE/ CE Chip Enable Input (Note 1) OE/ OE /NC Output Enable (Note 1) 13-15, , O0 - O7 Data Outputs VCC Power Supply GND Ground 1, 31 1, 31 NC No Connection (Note 2) Notes: 1. This pin is user-definable as active high or active low. 2. NC indicates "No Connection." Description Recommended DC Operating Conditions (TA = 0 C to + 70 C) Symbol Parameter Min. Max. Unit VCC Supply Voltage V GND Ground 0 0 V VIH Input High Voltage 0.7* VCC VCC+0.3 V VIL Input Low Voltage V PRELIMINARY (November, 1999, Version 0.0) 3 AMIC Technology, Inc.
5 Absolute Maximum Ratings* Ambient Operating Temperature C to + 80 C Storage Temperature C to C Supply Voltage to Ground Potential V to + 7.0V Output Voltage V to VCC + 0.5V Input Voltage V to VCC + 0.5V Power Dissipation mW *Comments Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to this device. These are stress ratings only. Functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is not implied or intended. Exposure to the absolute maximum rating conditions for extended periods may affect device reliability. DC Electrical Characteristics (TA = 0 C to + 70 C, GND = 0V) Symbol Parameter 5.0V ± 10% 3.0V ± 10% Unit Conditions Note Min. Max. Min. Max. VOH Output High Voltage V IOH = -1mA (5V) IOH = -0.4mA (3V) VOL Output Low Voltage V IOL = 3.2mA (5V) IOL = 1.6mA (3V) VlH Input High Voltage 2.2 VCC * VCC VCC+0.5 V VlL Input Low Voltage V lli Input Leakage Current µa VCC = max. VIN = VCC to GND llo Output Leakage Current µa VCC = max. VOUT = VCC to GND 1 ICC Operating Supply Current ma tcyc = min. 2 ISB Standby Supply Current (TTL) ma CE = VIH, CE = VIL ISB1 Standby Supply Current (CMOS) µa CE = VCC - 0.2V, CE = 0.2V PRELIMINARY (November, 1999, Version 0.0) 4 AMIC Technology, Inc.
6 Capacitance Symbol Parameter Min. Max. Unit Test Conditions Note CI Input Capacitance 10 pf CO Output Capacitance 10 pf TA = 25 C 3 f = 1.0MHz AC Characteristics (TA = 0 C to +70 C, GND = 0V) Symbol Parameter 5.0V ± 10% 3.0V ± 10% Unit Note Min. Max. Min. Max. tcyc Cycle Time ns taa Address Access Time ns tace Chip Enable Access Time ns taoe Output Enable Access Time ns toh Output Hold after Address Change ns tlz Output Low Z Delay ns 4, 6 thz Output High Z Delay* ns 5, 6 * thz is specified from either OE / OE or CE / CE going disabled, whichever occurs first. Notes: 1. OE/CE = VIL, OE / CE = VIH (Output is unloaded) 2. VIN = VIH/VIL, but OE/CE = VIH, OE / CE = VIL (Output is unloaded) 3. This parameter is periodically sampled and is not 100% tested. All pins, except pins under test, are tied to AC ground. 4. Output LOW impedance delay (tlz) is measured from CE or OE going active. 5. Output HIGH impedance delay (thz) is measured from CE or OE going inactive. 6. This parameter is sampled and not 100% tested. PRELIMINARY (November, 1999, Version 0.0) 5 AMIC Technology, Inc.
7 Timing Waveforms Propagation Delay from Address (CE/ CE = Active, OE/ OE = Active) tcyc ADDRESS INPUTS VALID taa toh DATA OUT VALID Propagation Delay from Chip Enable or Output Enable (Address Valid) CHIP ENABLE VALID tace OUTPUT ENABLE VALID taoe thz tlz DATA OUT tlz VALID AC Test Conditions Applied Voltage 5.0V ± 10% 3.0V ± 10% Input Pulse Levels 0.4V to 2.4V 0.4V to 2.4V Input Rise and Fall Time 10 ns 10 ns Timing Measurement Reference Level VIH = 2.2V VIL = 0.8V VOH = 2.0V VOL = 08V VIN = 1.5V VOUT = 1.5V Output Load 1 TTL gate and CL = 100pF PRELIMINARY (November, 1999, Version 0.0) 6 AMIC Technology, Inc.
8 Function Table CE/ CE OE/ OE /NC O0 - O7 Mode A A Data Out Read I X Hi - Z Power-down A I Hi - Z Output Disable 1. CE/ CE and OE/ OE /NC are mask programmable as either active low, active high, or no connection. 2. "A" means "Active," "I" means "Inactive," and "X" means "Either." Ordering Information Part No. Access Time (ns) 5.0V 3.0V Package A23W L DIP A23W8308M L SOP A23W8308L L PLCC A23W8308H DICE FORM PRELIMINARY (November, 1999, Version 0.0) 7 AMIC Technology, Inc.
9 Pad Configurations A4 A5 A6 A7 A12 A15 A16 VCC VCC NC A17 A14 A13 A8 A9 A Y (0,0) X A3 A2 A1 A0 O0 O1 O2 GND GND O3 O4 O5 O6 O7 CE/CE A10 OE/OE/NC Pad Location Pad No. Pad Name Coordinate (um) Coordinate (um) Pad No. Pad Name X Y X Y 1 VCC O A O A O A O A O A CE/ CE A A A OE/ OE /NC A A A A A A A A O A O A O NC GND VCC GND PRELIMINARY (November, 1999, Version 0.0) 8 AMIC Technology, Inc.
10 Package Information P-DIP 32L Outline Dimensions unit: inches/mm D E 1 16 E1 C A A2 A1 Base Plane L Seating Plane B B1 e θ EA Symbol Dimensions in inches Dimensions in mm Min Nom Max Min Nom Max A A A B B C D E E EA e L θ Notes: 1. The maximum value of dimension D includes end flash. 2. Dimension E does not include resin fins. PRELIMINARY (November, 1999, Version 0.0) 9 AMIC Technology, Inc.
11 Package Information SOP (W.B.) 32L Outline Dimensions unit: inches/mm E HE θ L 1 b 16 Detail F D c S Seating Plane D y e A1 A2 A See Detail F LE Dimensions in inches Dimensions in mm Symbol Min Nom Max Min Nom Max A A A b c D E e HE L LE S y θ Notes: 1. The maximum value of dimension D includes end flash. 2. Dimension E does not include resin fins. 3. Dimension S includes end flash. PRELIMINARY (November, 1999, Version 0.0) 10 AMIC Technology, Inc.
12 Package Information PLCC 32L Outline Dimension unit: inches/mm 13 HD D E HE e GD b b1 D y A1 A2 A θ GE c L Symbol Dimensions in inches Dimensions in mm Min Nom Max Min Nom Max A A A b b C D E e GD GE HD HE L y θ Notes: 1. Dimensions D and E do not include resin fins. 2. Dimensions GD & GE are for PC Board surface mount pad pitch design reference only. PRELIMINARY (November, 1999, Version 0.0) 11 AMIC Technology, Inc.
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ACT S512K32 High Speed 16 Megabit SRAM Multichip Module
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VSS VSS D15/A-1 D7 D14 D6 D13 D5 D12 D4 VCC VCC VSS VSS NC A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE BYTE A16 A15 A14 A13 A12 A11 A10 A19 VSS A21 A20
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