RS 232 PINOUTS. 1. We use RJ12 for all of our RS232 interfaces (Link-2-Modbus & Link-2-PC- Serial/RS232). The diagram below shows our pin out.

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1 RS 232 PINOUTS 1. We use RJ12 for all of our RS232 interfaces (Link-2-Modbus & Link-2-PC- Serial/RS232). The diagram below shows our pin out. 2. A DB9 Female to RJ12 Female Serial/Terminal Modular Adaptor is normally needed for one to be able to connect it to the computer s serial port. If the computer does not have a serial port, a Serial to USB adaptor may be used. DB9 Female to RJ12 Female Adaptor Serial to USB Adaptor 3. A typical DB9 Female to RJ12 Female Adaptor pin out is outlined below Female RJ 12 Side DB9 Side White Pin 1 Pin 1 Data Carrier Detect Black Pin 2 Pin 2 Receive Data (RX) Red Pin 3 Pin 3 Transmit Data (TX) Green Pin 4 Pin 4 Data Terminal Ready Yellow Pin 5 Pin 5 Signal Ground Blue Pin 6 Pin 6 Data Set Ready Pin 7 Request to Send Pin 8 Clear to Send Pin 9 Ring Indicator 4. Therefore on the DB9 to RJ12 Adaptor, Black wire goes to #5, Yellow wire goes to #3, & Blue wire goes to #2 on the DB9 side. 5. You will notice that our pin 5 is RX(in) but yet we are connecting it to Pin 3 on the DB9 which is Transmit (TX), and our pin 6 is TX (out) but yet we are connecting it to Pin 2 on the DB9 which is Receive (RX). This is correct because it should be vice versa, TX-out to RX-in.

2 Dimmer and Relay controls via Link-To PC card. This document assumes that one is communicating to a GR 2400 bus via a LINK to PC- RS 232/USB card. The method of controlling a GR 2404 idim card is described first followed by the data on switching and polling status of a relay panel. Nomenclature: In this document hexadecimal values are represented as in ANSI C programming due to its wide usage in embedded environments. In this format each hexadecimal value is preceded by 0x. (E.g.: decimal value 10 would be represented as 0x0a instead of just simply 0a) WHEN PHYSICALLY SENDING CHARACTERS TO THE Link-To PC Card ALL 0x MUST BE OMITTED. Also note that apostrophes are never sent. They are strictly used as separators in this document. RS-232 command structure of the Link-To PC: The link-to PC accepts commands sent as hexadecimal byte values in 2 character ASCII representation. This means that every value sent must be converted into hexadecimal and that hexadecimal number must be sent as 2 ASCII characters. The Link-To PC accepts the hexadecimal values in both lower and uppercase format. Thus the valid characters are: 0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f,A,B,C,D,E,F) The Link-To PC sends hexadecimal data in lower case format. All command and data must be in this format no exception. Each command consists of a series of bytes followed by an enter character. (Character value 0x0d note that this is the enter character itself that is ASCII character number 13 (decimal) which is a single character and NOT the 2 char representation of the value 0x0d) Other than the previously mentioned this is the only other character recognized by the Link-To PC. Each command must have a valid checksum byte as the last byte of the command. This is the last byte sent before the enter character. The checksum must be calculated for every command properly. Bad checksum will result in the rejection of the command. Checksum Calculation: Generate a the sum of each byte in a command using simple addition. (That is take the all the bytes of a command one by one and add them together) Take the least significant 8 bits (modulo 8) value of that sum. As with all the bytes sent to the Link-To PC send this value right after all the other bytes of the command (but before the enter character) in hexadecimal as 2 ASCII characters.

3 Each command to the Link-To PC must begin with a command selector byte which selects the required function such as Set dimmer level or Set fade rate. After each command some number of data bytes must be supplied. The number of bytes vary for each command and will be described in detail. Note that the function of the data bytes vary. Response format of the Link-To PC: Each valid command successfully received will cause a response be sent. The rules and format of the responses are the same as the commands. Each response begins with the 0x3f value followed by a single ASCII character hexadecimal value. This single character value informs about the buffer status of the Link-To PC. The Link-To PC has a 256 byte receive buffer. The single ASCII character (4 bit) value is always set in each response to indicate the number of 16 byte block used of the receive buffer. When sending large amount of data to the card this value must be used to throttle the traffic in order to avoid command loss. After the 0x3f and the buffer indicator (nibble) the result or acknowledge is sent as it was received from the target device. These can be used to detect missed commands. A missed command would indicate a possible faulty system as the GR2400 Link-To PC attempts to deliver each command several times in case of communication errors. If no acknowledge or answer is received by the Link-To PC the 0x3f and the usage indicator are still sent followed by an enter character for each command received by the Link-To PC. COMMANDS: First things first: Very important! The Link-To PC by default relays certain commands from the GR2400 system that are used for fast updates in our system. If unused this relaying feature should be disabled as they are constantly present and may appear as a bunch of useless data at first look. Instead of having to filter them it is best to send the following command to disable this data stream from the card: Send the following four ASCII characters: Then send a carriage return character. Taking this as an example command this is what it looks like:

4 The command is 0x38 and is followed by a value 0x20 then enter. Note that there is no checksum. This command is to the Link-TO PC itself and not the GR2400 system that is the reason why. Using the format that the rest of this document uses this command would look like this: 0x38-0x20 - <CR> Where we list each byte separated by a - and the enter as <CR>. In this format Labels (simple names) will be used instead of bytes when describing the format. Each of these labels will be described in detail to show their usage and how to create the byte content that must be sent in place of that label. Set dimmer fade rate command: Format: 0x3a - BUSADDR - SEL - FADE2 - FADE1 - FADE0 - Checksum BUSADDR = The base GR2400 bus address of the target. SEL = This is a limited value and it selects the target channel of the dimmer as follows: 0x14 = selects channel 1 0x15 = selects channel 2 0x16 = selects channel 3 0x17 = selects channel 4 FADE2,FADE1,FADE0 = These 3 bytes are used combined into one 24 bit value as the fade rate. FADE2 is the most significant byte. Fade rate is given in 60Hz cycle steps. Each count is a duration of 1/60 second. Checksum = See the checksum calculation section Response: 0x3f USED 0xa4 - <CR> USED is the 1 ASCII character buffer usage indicator. Set dimmer level: Format: 0x3a - BUSADDR - SEL LEV1 LEV0 Checksum BUSADDR = The base GR2400 bus address of the target. SEL = This is a limited value and it selects the target channel of the dimmer as follows: 0x10 = selects channel 1 0x11 = selects channel 2 0x12 = selects channel 3 0x13 = selects channel 4 LEV1,LEV0 = these two bytes are combined into one 16 bit value to give the required level. The valid range is decimal. (0-0x3e8) LEV1 is the most significant byte. Checksum = See the checksum calculation section Response: 0x3f USED 0xa4 - <CR>

5 USED is the 1 ASCII character buffer usage indicator. Raise and Lower functions: These functions are available via remote controlling the scenes that are programmed on a particular dimmer. One must first program the proper raise and lower scenes (or know how they are programmed) then remotely emulate the button push and release commands to those scenes. Note: LC & D will dial in and program these scenes for you if you wish. The suggested/conventional programming would be: Scene 9: raise channel 1 Scene 10: lower channel 1 Scene 11: raise channel 2 Scene 12: lower channel 2 Scene 13: raise channel 3 Scene 14: lower channel 3 Scene 15: raise channel 4 Scene 16: lower channel 4 In which case one would have to send proper button push and release commands to the corresponding virtual buttons/relay of that dimmer. Raise and lower are usually controlled via a push button where the duration of the button push must be detected in some way. The method used here is to detect both button push and release event and deliver them individually at the time it happens. To raise channel 1 (being that above mentioned dimmer programming is done) one would have to send an on/push command to virtual button 9 of the dimmer card then as soon as the source raise button is released the off/release command would have to be delivered to virtual button 9. The command used for this is 0x05: On/push and off/release command. Format: 0x05 BUSADDR SEL Checksum BUSADDR = The base GR2400 bus address of the target. SEL = This byte is a dual feature one. Bit 7 of this byte (MSB) selects on or off function. 0 = off (release) 1 = on (push) Bits2-0 of this byte select the virtual button as follows: MSB LSB

6 000 = selects button = selects button = selects button = selects button = selects button = selects button = selects button = selects button 8 Bits6-3 must be 0 Checksum = See the checksum calculation section. Button selection gets a little tricky so please read this carefully: Each dimmer panel occupies 2 bus addresses on the GR2400 bus. The address labeled on the dimmer controller is its base (first) address. All dimmers occupy the next (one greater) address as well. Each dimmer has a total of 16 virtual buttons/relays. The first 8 (virtual buttons -8) are accessible only via the base address. The second 8 (virtual buttons 9-16) are accessible only via base address +1. Thus virtual button 9 of the dimmer card is accessed as button 1 of the second address. EXAMPLE: Dimmer is addressed at GR2400 bus address 5. (This is what its label says) Scene 9 is programmed as channel 1 raise. To start raising channel 1 of this dimmer one would have to send: 0x05 0x06 0x80 0x8b - <CR> Then a release must be sent as follows: 0x05 0x06 0x00 0x0b - <CR> Note that 0x05 is the command. 0x06 is the address as we must operate on the second address occupied by that dimmer which is 0x06. We know this by looking at the dimmers label (in this case 0x05) and incrementing it by one. The third byte in case of push (raise start) is 0x80. Note that bit7 is 1 and the rest are 0. Thus we select virtual button 1 of the second address which is really virtual button 9 of the whole dimmer. Then we just have the checksum calculated and added. Important to note that if none of the first 8 virtual buttons are used from the total 16 on the dimmer then ONE MAY view the second 8 as the only set and just simply always add 1 to the address of the dimmer at all times when controlling it Response: 0x3f USED 0xa4 - <CR>

7 USED is the 1 ASCII character buffer usage indicator. =============================================================== = Relay controls: Important addressing caveats: Each Bus address is limited to 8 relays maximum. Thus any relay card that has more than 8 relays will occupy more than one Bus Addresses. On any relay card take the number of relays and divide it by 8 to get the number of Bus addresses the card occupies. E.g.: a GR-2432 occupies 4 Bus addresses. Note that the Bus addresses occupied by any particular card are always sequential. To control a relay one must first calculate the address and relay index of that relay. The base address (lowest value address occupied) of every Relay card is the one displayed on it. The rest of the addresses are sequential. Step one is to get the base address of the Relay to be controlled. The steps to calculate the address offset are based on which Relay is to be controlled. This can be done as follows: 1. Take the number of the relay. 2. Subtract one from it. 3. Divide that number by The result of the division must be added to the base address. 5. The remainder of the division must be used as the relay index. EXAMPLE: controlling relay #26 of a GR-2432 card. (that is relay #26 as labeled on the card) Suppose for this example that this GR-2432 relay card is at Bus address 5. (That is the number 5 is labeled by that card as the bus address) GR-2432 cards have 32 relays. Thus we know that the card will occupy 4 Bus Addresses starting at address 5. Thus this card occupies addresses 5,6,7 and 8. on the GR-2400 Bus. The 32 relays of that card can be accessed as follows: Relay 1-8 can be accessed via Bus address 5. Relay 9-16 can be accessed via Bus address 6. Relay can be accessed via Bus address 7. Relay can be accessed via Bus address 8. To control Relay #26 we must: Take the number 26 and subtract 1 from it.

8 This is the result of zero referenced indexing which means that the relays within any address are selected by a number from (it is never 1 through 8 it is always 0 through 7) After the subtraction we will have the number 25. To get the Address through which we control that relay we divide this number (25) by 8. (8 is the number of relays per each address) Thus we get 3 as the result of the division and 1 as the remainder. To get the address we add the number 3 (result of division) and 5 (the base address) and we get 8. The remainder of the division - number 1 in our example - is used as the relay index which selects which of the 8 relays of that particular BUS address do we manipulate. Relay On Off commands: Step one to turn a relay On or Off is to obtain the target address and Relay index of that Relay. Please first review the section above labeled as 'Important addressing caveats' including the Example then return to this section. Once the Target address and Relay index are calculated one can issue an on or off command in the following format: 0x05 - BUSADDR - SEL - Checksum BUSADDR is the target Bus address of the relay. As calculated in our example above. SEL is a combined 8 bit field. The lowest 3 bits (bits 0,1 and 2) select the relay to be operated as follows: Bits = 1st relay of that address = 2nd relay of that address = 3rd relay of that address = 4th relay of that address = 5th relay of that address = 6th relay of that address = 7th relay of that address = 8th relay of that address Bit 7 of the SEL field selects the required function as '1' for On command and '0' for Off command. The rest of the bits (bits 3,4,5 and 6) must be zero. Checksum = See the checksum calculation section This command results in a fixed response as follows:

9 Response: 0x3f 0xa4 - <CR> =============================================================== = To finalize our example the following command should be sent to control relay #26 of the GR-2432 card at address 5: On command to Relay #26: 0x05-0x08-0x81-0x8e Off command to Relay #26: 0x05-0x08-0x01-0x0e Relay Status Poll Step one of polling the status of a relay is to obtain the target address and Relay index of that Relay. Please first review the section labeled as 'Important addressing caveats' including the Example then return to this section. Once the Target address and Relay Index of the relay to be polled for status is known the following command can be issued to poll the relay status: 0x08 - BUSADDR - SEL - Checksum BUSADDRESS is the calculated target address. As calculated in the Example. SEL is an 8 bit field to select which of the 8 relay of the selected address to poll. The selection is done by bits 1,2 and 3 of this 8 bit field as follows: Bits = 1st relay of that address = 2nd relay of that address = 3rd relay of that address = 4th relay of that address = 5th relay of that address = 6th relay of that address = 7th relay of that address = 8th relay of that address The rest of the bits (3,4,5,6 and 7) must be zero This command has a varying response based on the status of the Relay being polled as follows: 0x3f - STU - STU - <CR>

10 Example: To poll the status of Relay #26 of a GR-2432 card at address 5 send: 0x08-0x08-0x01-0x11 STU is sent twice for error detection purposes. IMPORTANT!!! Only bit 0 of the STU field is relevant for status polls. The rest of the bits (bits 1,2,3,4,5,6 and 7) must be IGNORED!!!! Bit 0 is cleared if the load is Off and Set if the load is On. The rest of the bits will have various values and even though they may be cleared most of the time they must be ignored. (They carry various other information about the Relay/Loads and since this document does not cover their functionality they must be ignored) To be sure that communication errors are detected the two STU values should be compared. Since they will only differ from each other if a communication error exists the communication should be repeated if the first STU value does not equal the second STU value. This should only occur if the GR-2400 Bus which uses the RS-485 media is exposed to extreme noise. Note that erronous communications detected by any GR-2400 cards will be disposed of. The method of detection includes checksum comparison and frame error detection. Other proprietary error detections are used as well. It is important to note that the GR-2400 protocol is well protected against accepting data damaged by an extremely noisy environment. In which case the command will be ignored and NO acknowledge/answer will be sent from the GR-2400 card. The sending party should wait for the answer/acknowledgement with a 100ms timeout. If the NO answer/acknowledge is received during that time the command must be repeated.

11 GR2400 ADDRESS # ON COMMAND OFF COMMAND <CR> <CR> <CR> <CR> <CR> <CR> <CR> <CR> A <CR> A <CR> B <CR> B <CR> C <CR> C <CR> D <CR> D <CR> <CR> <CR> <CR> <CR> <CR> <CR> A <CR> A <CR> B <CR> B <CR> C <CR> C <CR> D <CR> D <CR> E <CR> E <CR> <CR> <CR> <CR> <CR> A <CR> A <CR> B <CR> B <CR> C <CR> C <CR> D <CR> D <CR> E <CR> E <CR> F <CR> F <CR> <CR> <CR> A <CR> A <CR> B <CR> B <CR> C <CR> C <CR> D <CR> D <CR> E <CR> E <CR> F <CR> F <CR> <CR> <CR> A <CR> A <CR> B <CR> B <CR> C <CR> C <CR> D <CR> D <CR> E <CR> E <CR> F <CR> F <CR> <CR> <CR> <CR> <CR> B <CR> B <CR> C <CR> C <CR> D <CR> D <CR>

12 E <CR> E <CR> F <CR> F <CR> <CR> <CR> <CR> <CR> <CR> <CR> C <CR> C <CR> D <CR> D <CR> E <CR> E <CR> F <CR> F <CR> <CR> <CR> <CR> <CR> <CR> <CR> <CR> <CR> D <CR> D <CR> E <CR> E <CR> F <CR> F <CR> <CR> <CR> <CR> <CR> <CR> <CR> <CR> <CR> <CR> <CR> E <CR> E <CR> F <CR> F <CR> <CR> <CR> <CR> <CR> <CR> <CR> <CR> <CR> <CR> <CR> <CR> <CR> A 80 8F <CR> 05 0A 00 0F <CR> A <CR> 05 0A <CR> A <CR> 05 0A <CR> A <CR> 05 0A <CR> A <CR> 05 0A <CR> A <CR> 05 0A <CR> A <CR> 05 0A <CR> A <CR> 05 0A <CR> B <CR> 05 0B <CR> B <CR> 05 0B <CR> B <CR> 05 0B <CR> B <CR> 05 0B <CR> B <CR> 05 0B <CR> B <CR> 05 0B <CR> B <CR> 05 0B <CR>

13 B <CR> 05 0B <CR> C <CR> 05 0C <CR> C <CR> 05 0C <CR> C <CR> 05 0C <CR> C <CR> 05 0C <CR> C <CR> 05 0C <CR> C <CR> 05 0C <CR> C <CR> 05 0C <CR> C <CR> 05 0C <CR> D <CR> 05 0D <CR> D <CR> 05 0D <CR> D <CR> 05 0D <CR> D <CR> 05 0D <CR> D <CR> 05 0D <CR> D <CR> 05 0D <CR> D <CR> 05 0D <CR> D <CR> 05 0D <CR> E <CR> 05 0E <CR> E <CR> 05 0E <CR> E <CR> 05 0E <CR> E <CR> 05 0E <CR> E <CR> 05 0E <CR> E <CR> 05 0E <CR> E <CR> 05 0E <CR> E 87 9A <CR> 05 0E 07 1A <CR> F <CR> 05 0F <CR> F <CR> 05 0F <CR> F <CR> 05 0F <CR> F <CR> 05 0F <CR> F <CR> 05 0F <CR> F <CR> 05 0F <CR> F 86 9A <CR> 05 0F 06 1A <CR> F 87 9B <CR> 05 0F 07 1B <CR> <CR> <CR> <CR> <CR> <CR> <CR> <CR> <CR> <CR> <CR> A <CR> A <CR> B <CR> B <CR> C <CR> C <CR> <CR> <CR> <CR> <CR> <CR> <CR>

14 <CR> <CR> A <CR> A <CR> B <CR> B <CR> C <CR> C <CR> D <CR> D <CR> <CR> <CR> <CR> <CR> <CR> <CR> A <CR> A <CR> B <CR> B <CR> C <CR> C <CR> D <CR> D <CR> E <CR> E <CR> <CR> <CR> <CR> <CR> A <CR> A <CR> B <CR> B <CR> C <CR> C <CR> D <CR> D <CR> E <CR> E <CR> F <CR> F <CR> <CR> <CR> A <CR> A <CR> B <CR> B <CR> C <CR> C <CR> D <CR> D <CR> E <CR> E <CR> F <CR> F <CR> A0 <CR> <CR> A <CR> A <CR> B <CR> B <CR> C <CR> C <CR> D <CR> D <CR> E <CR> E <CR> F <CR> F <CR> A0 <CR> <CR> A1 <CR> <CR> B <CR> B <CR> C <CR> C <CR> D <CR> D <CR> E <CR> E <CR> F <CR> F <CR> A0 <CR> <CR> A1 <CR> <CR>

15 A2 <CR> <CR> C <CR> C <CR> D <CR> D <CR> E <CR> E <CR> F <CR> F <CR> A0 <CR> <CR> A1 <CR> <CR> A2 <CR> <CR> A3 <CR> <CR> D <CR> D <CR> E <CR> E <CR> F <CR> F <CR> A0 <CR> <CR> A1 <CR> <CR> A2 <CR> <CR> A3 <CR> <CR> A4 <CR> <CR> E <CR> E <CR> F <CR> F <CR> A0 <CR> <CR> A1 <CR> <CR> A2 <CR> <CR> A3 <CR> <CR> A4 <CR> <CR> A5 <CR> <CR> A 80 9F <CR> 05 1A 00 1F <CR> A 81 A0 <CR> 05 1A <CR> A 82 A1 <CR> 05 1A <CR> A 83 A2 <CR> 05 1A <CR> A 84 A3 <CR> 05 1A <CR> A 85 A4 <CR> 05 1A <CR> A 86 A5 <CR> 05 1A <CR> A 87 A6 <CR> 05 1A <CR> B 80 A0 <CR> 05 1B <CR> B 81 A1 <CR> 05 1B <CR> B 82 A2 <CR> 05 1B <CR> B 83 A3 <CR> 05 1B <CR> B 84 A4 <CR> 05 1B <CR> B 85 A5 <CR> 05 1B <CR> B 86 A6 <CR> 05 1B <CR> B 87 A7 <CR> 05 1B <CR> C 80 A1 <CR> 05 1C <CR> C 81 A2 <CR> 05 1C <CR> C 82 A3 <CR> 05 1C <CR>

16 C 83 A4 <CR> 05 1C <CR> C 84 A5 <CR> 05 1C <CR> C 85 A6 <CR> 05 1C <CR> C 86 A7 <CR> 05 1C <CR> C 87 A8 <CR> 05 1C <CR> D 80 A2 <CR> 05 1D <CR> D 81 A3 <CR> 05 1D <CR> D 82 A4 <CR> 05 1D <CR> D 83 A5 <CR> 05 1D <CR> D 84 A6 <CR> 05 1D <CR> D 85 A7 <CR> 05 1D <CR> D 86 A8 <CR> 05 1D <CR> D 87 A9 <CR> 05 1D <CR> E 80 A3 <CR> 05 1E <CR> E 81 A4 <CR> 05 1E <CR> E 82 A5 <CR> 05 1E <CR> E 83 A6 <CR> 05 1E <CR> E 84 A7 <CR> 05 1E <CR> E 85 A8 <CR> 05 1E <CR> E 86 A9 <CR> 05 1E <CR> E 87 AA <CR> 05 1E 07 2A <CR> F 80 A4 <CR> 05 1F <CR> F 81 A5 <CR> 05 1F <CR> F 82 A6 <CR> 05 1F <CR> F 83 A7 <CR> 05 1F <CR> F 84 A8 <CR> 05 1F <CR> F 85 A9 <CR> 05 1F <CR> F 86 AA <CR> 05 1F 06 2A <CR> F 87 AB <CR> 05 1F 07 2B <CR> A5 <CR> <CR> A6 <CR> <CR> A7 <CR> <CR> A8 <CR> <CR> A9 <CR> <CR> AA <CR> A <CR> AB <CR> B <CR> AC <CR> C <CR> A6 <CR> <CR> A7 <CR> <CR> A8 <CR> <CR> A9 <CR> <CR> AA <CR> A <CR> AB <CR> B <CR> AC <CR> C <CR>

17 AD <CR> D <CR> A7 <CR> <CR> A8 <CR> <CR> A9 <CR> <CR> AA <CR> A <CR> AB <CR> B <CR> AC <CR> C <CR> AD <CR> D <CR> AE <CR> E <CR> A8 <CR> <CR> A9 <CR> <CR> AA <CR> A <CR> AB <CR> B <CR> AC <CR> C <CR> AD <CR> D <CR> AE <CR> E <CR> AF <CR> F <CR> A9 <CR> <CR> AA <CR> A <CR> AB <CR> B <CR> AC <CR> C <CR> AD <CR> D <CR> AE <CR> E <CR> AF <CR> F <CR> B0 <CR> <CR> AA <CR> A <CR> AB <CR> B <CR> AC <CR> C <CR> AD <CR> D <CR> AE <CR> E <CR> AF <CR> F <CR> B0 <CR> <CR> B1 <CR> <CR> AB <CR> B <CR> AC <CR> C <CR> AD <CR> D <CR> AE <CR> E <CR> AF <CR> F <CR> B0 <CR> <CR> B1 <CR> <CR> B2 <CR> <CR> AC <CR> C <CR> AD <CR> D <CR> AE <CR> E <CR>

18 AF <CR> F <CR> B0 <CR> <CR> B1 <CR> <CR> B2 <CR> <CR> B3 <CR> <CR> AD <CR> D <CR> AE <CR> E <CR> AF <CR> F <CR> B0 <CR> <CR> B1 <CR> <CR> B2 <CR> <CR> B3 <CR> <CR> B4 <CR> <CR> AE <CR> E <CR> AF <CR> F <CR> B0 <CR> <CR> B1 <CR> <CR> B2 <CR> <CR> B3 <CR> <CR> B4 <CR> <CR> B5 <CR> <CR> A 80 AF <CR> 05 2A 00 2F <CR> A 81 B0 <CR> 05 2A <CR> A 82 B1 <CR> 05 2A <CR> A 83 B2 <CR> 05 2A <CR> A 84 B3 <CR> 05 2A <CR> A 85 B4 <CR> 05 2A <CR> A 86 B5 <CR> 05 2A <CR> A 87 B6 <CR> 05 2A <CR> B 80 B0 <CR> 05 2B <CR> B 81 B1 <CR> 05 2B <CR> B 82 B2 <CR> 05 2B <CR> B 83 B3 <CR> 05 2B <CR> B 84 B4 <CR> 05 2B <CR> B 85 B5 <CR> 05 2B <CR> B 86 B6 <CR> 05 2B <CR> B 87 B7 <CR> 05 2B <CR> C 80 B1 <CR> 05 2C <CR> C 81 B2 <CR> 05 2C <CR> C 82 B3 <CR> 05 2C <CR> C 83 B4 <CR> 05 2C <CR> C 84 B5 <CR> 05 2C <CR> C 85 B6 <CR> 05 2C <CR> C 86 B7 <CR> 05 2C <CR>

19 C 87 B8 <CR> 05 2C <CR> D 80 B2 <CR> 05 2D <CR> D 81 B3 <CR> 05 2D <CR> D 82 B4 <CR> 05 2D <CR> D 83 B5 <CR> 05 2D <CR> D 84 B6 <CR> 05 2D <CR> D 85 B7 <CR> 05 2D <CR> D 86 B8 <CR> 05 2D <CR> D 87 B9 <CR> 05 2D <CR> E 80 B3 <CR> 05 2E <CR> E 81 B4 <CR> 05 2E <CR> E 82 B5 <CR> 05 2E <CR> E 83 B6 <CR> 05 2E <CR> E 84 B7 <CR> 05 2E <CR> E 85 B8 <CR> 05 2E <CR> E 86 B9 <CR> 05 2E <CR> E 87 BA <CR> 05 2E 07 3A <CR> F 80 B4 <CR> 05 2F <CR> F 81 B5 <CR> 05 2F <CR> F 82 B6 <CR> 05 2F <CR> F 83 B7 <CR> 05 2F <CR> F 84 B8 <CR> 05 2F <CR> F 85 B9 <CR> 05 2F <CR> F 86 BA <CR> 05 2F 06 3A <CR> F 87 BB <CR> 05 2F 07 3B <CR> B5 <CR> <CR> B6 <CR> <CR> B7 <CR> <CR> B8 <CR> <CR> B9 <CR> <CR> BA <CR> A <CR> BB <CR> B <CR> BC <CR> C <CR> B6 <CR> <CR> B7 <CR> <CR> B8 <CR> <CR> B9 <CR> <CR> BA <CR> A <CR> BB <CR> B <CR> BC <CR> C <CR> BD <CR> D <CR> B7 <CR> <CR> B8 <CR> <CR> B9 <CR> <CR>

20 BA <CR> A <CR> BB <CR> B <CR> BC <CR> C <CR> BD <CR> D <CR> BE <CR> E <CR> B8 <CR> <CR> B9 <CR> <CR> BA <CR> A <CR> BB <CR> B <CR> BC <CR> C <CR> BD <CR> D <CR> BE <CR> E <CR> BF <CR> F <CR> B9 <CR> <CR> BA <CR> A <CR> BB <CR> B <CR> BC <CR> C <CR> BD <CR> D <CR> BE <CR> E <CR> BF <CR> F <CR> C0 <CR> <CR> BA <CR> A <CR> BB <CR> B <CR> BC <CR> C <CR> BD <CR> D <CR> BE <CR> E <CR> BF <CR> F <CR> C0 <CR> <CR> C1 <CR> <CR> BB <CR> B <CR> BC <CR> C <CR> BD <CR> D <CR> BE <CR> E <CR> BF <CR> F <CR> C0 <CR> <CR> C1 <CR> <CR> C2 <CR> <CR> BC <CR> C <CR> BD <CR> D <CR> BE <CR> E <CR> BF <CR> F <CR> C0 <CR> <CR> C1 <CR> <CR> C2 <CR> <CR>

21 C3 <CR> <CR> BD <CR> D <CR> BE <CR> E <CR> BF <CR> F <CR> C0 <CR> <CR> C1 <CR> <CR> C2 <CR> <CR> C3 <CR> <CR> C4 <CR> <CR> BE <CR> E <CR> BF <CR> F <CR> C0 <CR> <CR> C1 <CR> <CR> C2 <CR> <CR> C3 <CR> <CR> C4 <CR> <CR> C5 <CR> <CR> A 80 BF <CR> 05 3A 00 3F <CR> A 81 C0 <CR> 05 3A <CR> A 82 C1 <CR> 05 3A <CR> A 83 C2 <CR> 05 3A <CR> A 84 C3 <CR> 05 3A <CR> A 85 C4 <CR> 05 3A <CR> A 86 C5 <CR> 05 3A <CR> A 87 C6 <CR> 05 3A <CR> B 80 C0 <CR> 05 3B <CR> B 81 C1 <CR> 05 3B <CR> B 82 C2 <CR> 05 3B <CR> B 83 C3 <CR> 05 3B <CR> B 84 C4 <CR> 05 3B <CR> B 85 C5 <CR> 05 3B <CR> B 86 C6 <CR> 05 3B <CR> B 87 C7 <CR> 05 3B <CR> C 80 C1 <CR> 05 3C <CR> C 81 C2 <CR> 05 3C <CR> C 82 C3 <CR> 05 3C <CR> C 83 C4 <CR> 05 3C <CR> C 84 C5 <CR> 05 3C <CR> C 85 C6 <CR> 05 3C <CR> C 86 C7 <CR> 05 3C <CR> C 87 C8 <CR> 05 3C <CR> D 80 C2 <CR> 05 3D <CR> D 81 C3 <CR> 05 3D <CR> D 82 C4 <CR> 05 3D <CR>

22 D 83 C5 <CR> 05 3D <CR> D 84 C6 <CR> 05 3D <CR> D 85 C7 <CR> 05 3D <CR> D 86 C8 <CR> 05 3D <CR> D 87 C9 <CR> 05 3D <CR> E 80 C3 <CR> 05 3E <CR> E 81 C4 <CR> 05 3E <CR> E 82 C5 <CR> 05 3E <CR> E 83 C6 <CR> 05 3E <CR> E 84 C7 <CR> 05 3E <CR> E 85 C8 <CR> 05 3E <CR> E 86 C9 <CR> 05 3E <CR> E 87 CA <CR> 05 3E 07 4A <CR> F 80 C4 <CR> 05 3F <CR> F 81 C5 <CR> 05 3F <CR> F 82 C6 <CR> 05 3F <CR> F 83 C7 <CR> 05 3F <CR> F 84 C8 <CR> 05 3F <CR> F 85 C9 <CR> 05 3F <CR> F 86 CA <CR> 05 3F 06 4A <CR> F 87 CB <CR> 05 3F 07 4B <CR> C5 <CR> <CR> C6 <CR> <CR> C7 <CR> <CR> C8 <CR> <CR> C9 <CR> <CR> CA <CR> A <CR> CB <CR> B <CR> CC <CR> C <CR> C6 <CR> <CR> C7 <CR> <CR> C8 <CR> <CR> C9 <CR> <CR> CA <CR> A <CR> CB <CR> B <CR> CC <CR> C <CR> CD <CR> D <CR> C7 <CR> <CR> C8 <CR> <CR> C9 <CR> <CR> CA <CR> A <CR> CB <CR> B <CR> CC <CR> C <CR> CD <CR> D <CR>

23 CE <CR> E <CR> C8 <CR> <CR> C9 <CR> <CR> CA <CR> A <CR> CB <CR> B <CR> CC <CR> C <CR> CD <CR> D <CR> CE <CR> E <CR> CF <CR> F <CR> C9 <CR> <CR> CA <CR> A <CR> CB <CR> B <CR> CC <CR> C <CR> CD <CR> D <CR> CE <CR> E <CR> CF <CR> F <CR> D0 <CR> <CR> CA <CR> A <CR> CB <CR> B <CR> CC <CR> C <CR> CD <CR> D <CR> CE <CR> E <CR> CF <CR> F <CR> D0 <CR> <CR> D1 <CR> <CR> CB <CR> B <CR> CC <CR> C <CR> CD <CR> D <CR> CE <CR> E <CR> CF <CR> F <CR> D0 <CR> <CR> D1 <CR> <CR> D2 <CR> <CR> CC <CR> C <CR> CD <CR> D <CR> CE <CR> E <CR> CF <CR> F <CR> D0 <CR> <CR> D1 <CR> <CR> D2 <CR> <CR> D3 <CR> <CR> CD <CR> D <CR> CE <CR> E <CR> CF <CR> F <CR>

24 D0 <CR> <CR> D1 <CR> <CR> D2 <CR> <CR> D3 <CR> <CR> D4 <CR> <CR> CE <CR> E <CR> CF <CR> F <CR> D0 <CR> <CR> D1 <CR> <CR> D2 <CR> <CR> D3 <CR> <CR> D4 <CR> <CR> D5 <CR> <CR> A 80 CF <CR> 05 4A 00 4F <CR> A 81 D0 <CR> 05 4A <CR> A 82 D1 <CR> 05 4A <CR> A 83 D2 <CR> 05 4A <CR> A 84 D3 <CR> 05 4A <CR> A 85 D4 <CR> 05 4A <CR> A 86 D5 <CR> 05 4A <CR> A 87 D6 <CR> 05 4A <CR> B 80 D0 <CR> 05 4B <CR> B 81 D1 <CR> 05 4B <CR> B 82 D2 <CR> 05 4B <CR> B 83 D3 <CR> 05 4B <CR> B 84 D4 <CR> 05 4B <CR> B 85 D5 <CR> 05 4B <CR> B 86 D6 <CR> 05 4B <CR> B 87 D7 <CR> 05 4B <CR> C 80 D1 <CR> 05 4C <CR> C 81 D2 <CR> 05 4C <CR> C 82 D3 <CR> 05 4C <CR> C 83 D4 <CR> 05 4C <CR> C 84 D5 <CR> 05 4C <CR> C 85 D6 <CR> 05 4C <CR> C 86 D7 <CR> 05 4C <CR> C 87 D8 <CR> 05 4C <CR> D 80 D2 <CR> 05 4D <CR> D 81 D3 <CR> 05 4D <CR> D 82 D4 <CR> 05 4D <CR> D 83 D5 <CR> 05 4D <CR> D 84 D6 <CR> 05 4D <CR> D 85 D7 <CR> 05 4D <CR> D 86 D8 <CR> 05 4D <CR>

25 D 87 D9 <CR> 05 4D <CR> E 80 D3 <CR> 05 4E <CR> E 81 D4 <CR> 05 4E <CR> E 82 D5 <CR> 05 4E <CR> E 83 D6 <CR> 05 4E <CR> E 84 D7 <CR> 05 4E <CR> E 85 D8 <CR> 05 4E <CR> E 86 D9 <CR> 05 4E <CR> E 87 DA <CR> 05 4E 07 5A <CR> F 80 D4 <CR> 05 4F <CR> F 81 D5 <CR> 05 4F <CR> F 82 D6 <CR> 05 4F <CR> F 83 D7 <CR> 05 4F <CR> F 84 D8 <CR> 05 4F <CR> F 85 D9 <CR> 05 4F <CR> F 86 DA <CR> 05 4F 06 5A <CR> F 87 DB <CR> 05 4F 07 5B <CR> D5 <CR> <CR> D6 <CR> <CR> D7 <CR> <CR> D8 <CR> <CR> D9 <CR> <CR> DA <CR> A <CR> DB <CR> B <CR> DC <CR> C <CR> D6 <CR> <CR> D7 <CR> <CR> D8 <CR> <CR> D9 <CR> <CR> DA <CR> A <CR> DB <CR> B <CR> DC <CR> C <CR> DD <CR> D <CR> D7 <CR> <CR> D8 <CR> <CR> D9 <CR> <CR> DA <CR> A <CR> DB <CR> B <CR> DC <CR> C <CR> DD <CR> D <CR> DE <CR> E <CR> D8 <CR> <CR> D9 <CR> <CR> DA <CR> A <CR>

26 DB <CR> B <CR> DC <CR> C <CR> DD <CR> D <CR> DE <CR> E <CR> DF <CR> F <CR> D9 <CR> <CR> DA <CR> A <CR> DB <CR> B <CR> DC <CR> C <CR> DD <CR> D <CR> DE <CR> E <CR> DF <CR> F <CR> E0 <CR> <CR> DA <CR> A <CR> DB <CR> B <CR> DC <CR> C <CR> DD <CR> D <CR> DE <CR> E <CR> DF <CR> F <CR> E0 <CR> <CR> E1 <CR> <CR> DB <CR> B <CR> DC <CR> C <CR> DD <CR> D <CR> DE <CR> E <CR> DF <CR> F <CR> E0 <CR> <CR> E1 <CR> <CR> E2 <CR> <CR> DC <CR> C <CR> DD <CR> D <CR> DE <CR> E <CR> DF <CR> F <CR> E0 <CR> <CR> E1 <CR> <CR> E2 <CR> <CR> E3 <CR> <CR> DD <CR> D <CR> DE <CR> E <CR> DF <CR> F <CR> E0 <CR> <CR> E1 <CR> <CR> E2 <CR> <CR> E3 <CR> <CR>

27 E4 <CR> <CR> DE <CR> E <CR> DF <CR> F <CR> E0 <CR> <CR> E1 <CR> <CR> E2 <CR> <CR> E3 <CR> <CR> E4 <CR> <CR> E5 <CR> <CR> A 80 DF <CR> 05 5A 00 5F <CR> A 81 E0 <CR> 05 5A <CR> A 82 E1 <CR> 05 5A <CR> A 83 E2 <CR> 05 5A <CR> A 84 E3 <CR> 05 5A <CR> A 85 E4 <CR> 05 5A <CR> A 86 E5 <CR> 05 5A <CR> A 87 E6 <CR> 05 5A <CR> B 80 E0 <CR> 05 5B <CR> B 81 E1 <CR> 05 5B <CR> B 82 E2 <CR> 05 5B <CR> B 83 E3 <CR> 05 5B <CR> B 84 E4 <CR> 05 5B <CR> B 85 E5 <CR> 05 5B <CR> B 86 E6 <CR> 05 5B <CR> B 87 E7 <CR> 05 5B <CR> C 80 E1 <CR> 05 5C <CR> C 81 E2 <CR> 05 5C <CR> C 82 E3 <CR> 05 5C <CR> C 83 E4 <CR> 05 5C <CR> C 84 E5 <CR> 05 5C <CR> C 85 E6 <CR> 05 5C <CR> C 86 E7 <CR> 05 5C <CR> C 87 E8 <CR> 05 5C <CR> D 80 E2 <CR> 05 5D <CR> D 81 E3 <CR> 05 5D <CR> D 82 E4 <CR> 05 5D <CR> D 83 E5 <CR> 05 5D <CR> D 84 E6 <CR> 05 5D <CR> D 85 E7 <CR> 05 5D <CR> D 86 E8 <CR> 05 5D <CR> D 87 E9 <CR> 05 5D <CR> E 80 E3 <CR> 05 5E <CR> E 81 E4 <CR> 05 5E <CR> E 82 E5 <CR> 05 5E <CR>

28 E 83 E6 <CR> 05 5E <CR> E 84 E7 <CR> 05 5E <CR> E 85 E8 <CR> 05 5E <CR> E 86 E9 <CR> 05 5E <CR> E 87 EA <CR> 05 5E 07 6A <CR> F 80 E4 <CR> 05 5F <CR> F 81 E5 <CR> 05 5F <CR> F 82 E6 <CR> 05 5F <CR> F 83 E7 <CR> 05 5F <CR> F 84 E8 <CR> 05 5F <CR> F 85 E9 <CR> 05 5F <CR> F 86 EA <CR> 05 5F 06 6A <CR> F 87 EB <CR> 05 5F 07 6B <CR> E5 <CR> <CR> E6 <CR> <CR> E7 <CR> <CR> E8 <CR> <CR> E9 <CR> <CR> EA <CR> A <CR> EB <CR> B <CR> EC <CR> C <CR> E6 <CR> <CR> E7 <CR> <CR> E8 <CR> <CR> E9 <CR> <CR> EA <CR> A <CR> EB <CR> B <CR> EC <CR> C <CR> ED <CR> D <CR> E7 <CR> <CR> E8 <CR> <CR> E9 <CR> <CR> EA <CR> A <CR> EB <CR> B <CR> EC <CR> C <CR> ED <CR> D <CR> EE <CR> E <CR> E8 <CR> <CR> E9 <CR> <CR> EA <CR> A <CR> EB <CR> B <CR> EC <CR> C <CR> ED <CR> D <CR> EE <CR> E <CR>

29 EF <CR> F <CR> E9 <CR> <CR> EA <CR> A <CR> EB <CR> B <CR> EC <CR> C <CR> ED <CR> D <CR> EE <CR> E <CR> EF <CR> F <CR> F0 <CR> <CR> EA <CR> A <CR> EB <CR> B <CR> EC <CR> C <CR> ED <CR> D <CR> EE <CR> E <CR> EF <CR> F <CR> F0 <CR> <CR> F1 <CR> <CR> EB <CR> B <CR> EC <CR> C <CR> ED <CR> D <CR> EE <CR> E <CR> EF <CR> F <CR> F0 <CR> <CR> F1 <CR> <CR> F2 <CR> <CR> EC <CR> C <CR> ED <CR> D <CR> EE <CR> E <CR> EF <CR> F <CR> F0 <CR> <CR> F1 <CR> <CR> F2 <CR> <CR> F3 <CR> <CR> ED <CR> D <CR> EE <CR> E <CR> EF <CR> F <CR> F0 <CR> <CR> F1 <CR> <CR> F2 <CR> <CR> F3 <CR> <CR> F4 <CR> <CR> EE <CR> E <CR> EF <CR> F <CR> F0 <CR> <CR>

30 F1 <CR> <CR> F2 <CR> <CR> F3 <CR> <CR> F4 <CR> <CR> F5 <CR> <CR> A 80 EF <CR> 05 6A 00 6F <CR> A 81 F0 <CR> 05 6A <CR> A 82 F1 <CR> 05 6A <CR> A 83 F2 <CR> 05 6A <CR> A 84 F3 <CR> 05 6A <CR> A 85 F4 <CR> 05 6A <CR> A 86 F5 <CR> 05 6A <CR> A 87 F6 <CR> 05 6A <CR> B 80 F0 <CR> 05 6B <CR> B 81 F1 <CR> 05 6B <CR> B 82 F2 <CR> 05 6B <CR> B 83 F3 <CR> 05 6B <CR> B 84 F4 <CR> 05 6B <CR> B 85 F5 <CR> 05 6B <CR> B 86 F6 <CR> 05 6B <CR> B 87 F7 <CR> 05 6B <CR> C 80 F1 <CR> 05 6C <CR> C 81 F2 <CR> 05 6C <CR> C 82 F3 <CR> 05 6C <CR> C 83 F4 <CR> 05 6C <CR> C 84 F5 <CR> 05 6C <CR> C 85 F6 <CR> 05 6C <CR> C 86 F7 <CR> 05 6C <CR> C 87 F8 <CR> 05 6C <CR> D 80 F2 <CR> 05 6D <CR> D 81 F3 <CR> 05 6D <CR> D 82 F4 <CR> 05 6D <CR> D 83 F5 <CR> 05 6D <CR> D 84 F6 <CR> 05 6D <CR> D 85 F7 <CR> 05 6D <CR> D 86 F8 <CR> 05 6D <CR> D 87 F9 <CR> 05 6D <CR> E 80 F3 <CR> 05 6E <CR> E 81 F4 <CR> 05 6E <CR> E 82 F5 <CR> 05 6E <CR> E 83 F6 <CR> 05 6E <CR> E 84 F7 <CR> 05 6E <CR> E 85 F8 <CR> 05 6E <CR> E 86 F9 <CR> 05 6E <CR>

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