Survey of Codebreaking Machines. Swathi Guruduth Vivekanand Kamanuri Harshad Patil
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1 Survey of Codebreaking Machines Swathi Guruduth Vivekanand Kamanuri Harshad Patil
2 Contents Introduction Motivation Goal Machines considered Comparison based on technology used Brief description of machines FPGA machines ASICs and GPU Results Conclusions
3 Introduction Cryptography has been around for thousands of years Cryptanalysis is the study of breaking codes and ciphers Study of state of the art machines used for cryptanalysis
4 Motivation Useful for improvements for cryptosystem design Helpful to improve cryptosystem security
5 Goal Study of several parameters in cryptosystems and their comparison The project aims to give an overview of the possible hardware attacks on cryptosystems
6 Machines considered bcrypt password search (BPS) using special purpose hardware: 2014 Cryptanalysis of full AES using GPU like hardware (CAESAR): 2012 Cryptohaze GPU Rainbow (CGR) cracker: 2012 Cryptanalysis of KeeLoq with COPACOBANA (CKC): 2010 COPACOBANA: A fundamental evaluation of 80 bit keys employed by hardware oriented stream ciphers (EEK): 2006 Implementing the elliptic curve method of factoring in reconfigurable hardware (ECMF): 2006
7 Comparison based on technology used FPGA BPS using special purpose hardware: 2014 Cryptanalysis of KeeLoq with COPACOBANA: 2010 COPACOBANA: A fundamental evaluation of 80 bit keys employed by hardware oriented stream ciphers: 2006 Implementing the ECM of factoring in reconfigurable hardware: 2006 ASICs CAESAR: 2012 GPUs Cryptohaze GPU Rainbow cracker: 2012
8 Brief description of machines BPS using special purpose hardware (2014) Ø This is a flexible high-speed implementation of a bcrypt password search system on a low-power Xilinx Zynq 7020 FPGA. Ø The design consists of 40 parallel bcrypt cores running at 100 Mhz. Ø This implementation outperforms all currently available implementations and improves password attacks on the same platform by at least 42%. CAESAR (2012) Ø Cryptanalysis of the full AES using GPU like hardware. It is a hypothetical supercomputer Ø The paper investigates the feasibility of large-scale hardware attacks on AES-128 and AES-256 bounded by a time complexity of 2^100, but memory complexity of less than 2^70 (and as little data as possible)
9 Contd.. Cryptohaze GPU Rainbow cracker (2012) Ø The Cryptohaze tools are a set of GPU accelerated password cracking tools Ø Cryptohaze rainbow tables are a fully GPU accelerated implementation of the rainbow tables concept Ø The tools are cross platform and work with nvidia GPUs with CUDA, ATI GPUs with OpenCL, and both Intel & AMD CPUs with OpenCL Cryptanalysis of KeeLoq with COPACOBANA (2010) Ø In this paper a hardware architecture for the cryptanalysis of KeeLoq was developed Ø The brute-force attack, implemented on the cost-optimized parallel codebreaker COPACOBANA, is able to reveal the secret key of a remote control in less than 0.5 seconds if a 32-bit seed is used and in less than 6 hours in case of a 48-bit seed
10 Contd.. COPACOBANA (2008) Ø Cost-optimized parallel code breaker is an FPGA-based machine which is optimized for running cryptanalytic algorithms Ø It is suitable for parallel computation problems which have low communication requirements (2007) Ø is a fast FPGA-based SHA-1 and MD5 brute-force cracker. Ø Capable of searching the full 8-character keyspace (from a 64-character set) in about a day in the current configuration for 800 hashes concurrently, using about 240W of power
11 Contd.. A fundamental evaluation of 80 bit keys employed by hardware oriented stream ciphers (2006) Ø In this paper the security afforded by the 80 bit keys of hardware focused stream cipher is analyzed from the perspective of brute force attack susceptibility Implementing the ECM of factoring in reconfigurable hardware (2006) Ø A novel hardware architecture for the ECM of factoring has been proposed Ø The ECM architecture has been ported across five different families of FPGA devices in order to select the family with the best performance to cost ratio Ø A timing comparison with the highly optimized software implementation, GMP- ECM, has been performed
12 FPGA Machines Machine Technology type of codes it can crack Time costs power CKC Cluster COPACOBANA (Xilinx Spartan 3 FPGAs) Block Ciphers Less than 0.5sec for a 32-bit seed and less than 6hrs in case of a 48-bit seed Less than $10, W ECMF Xilinx Spartan 3 FPGA RSA Factorization 33.5msec using a Spartan 3 XC3S $130 COPACOBANA Xilinx Spartan 3 with microblaze Any symmetric cipher with up to roughly 64 key bits 6.4 days Less than $10, W
13 Contd.. Machine Technology type of codes it can crack Time costs power bcrypt Zedboard, Xilinx Zynq 7020 FPGA bcrypt passwords Virtex 7 6,511 hashes per sec $ W 51,437 hashes per sec $3,495 20W NSA@home FPGA Virtex II pro hash function 8 character keyspace in about a day 240W EEK Altera s Stream Cyclone II and Ciphers HardCopy II 80 bit keys in 1hr using EP2C35 FPGA and in 1min using HC210 FPGA Cyclone II - $68 billion and for HardCopy II - $240 billion by 2015 Cyclone II approx. 180 mw and 360 mw for on-chip system and off-chip respectively
14 ASICs and GPU Machine Technology Type of codes it can crack Time Costs Power CAESAR ASIC AES operations 9*10^29 AES operations can be done in 3*10^7secs Expected to be $1 trillion 4 TW CGR GPUs and Open CL Passwords A hash function can be cracked in under 2mins Cost of a personal computer (Less than $1000) 60W to 250W
15 Results: Power 700 Machine v/s power in W for FPGA machines 4.5 Machine v/s power in TW for ASIC Machine v/s power in W for GPU (avg.) CAESAR CGR
16 Results: Costs $12,000 $10,000 $8,000 $6,000 $4,000 $2,000 Machine v/s cost for FPGA machines Machine v/s costs for ASIC $1,200,000,000,000 $1,000,000,000,000 $800,000,000,000 $600,000,000,000 $400,000,000,000 $200,000,000,000 $1,200 $1,000 Machine v/s costs GPU $800 $600 $400 $200 $0 $0 CAESAR $0 CGR
17 Conclusions Altera s cyclone II and HardCopy II are the machine which uses minimum power to break stream ciphers. CAESAR consumes most power: 4TW 700 Approx. power consumption in W
18 Conclusions Implementing the Elliptic Curve Method of Factoring on a Spartan 3 FPGA is the most cost effective at $130 Least cost effective is CEASAR costing close to 1 trillion USD $12,000 Approx. costs $10,000 $8,000 $6,000 $4,000 $2,000 $0 CKC COPACOBANA BPS-zynq2070 BPS-virtex 7 CGR
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