Introduction To MCS-51
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1 Introduction To MCS-51 By Charoen Vongchumyen Department of Computer Engineering Faculty of Engineering KMITLadkrabang
2 8051 Hardware Basic Content Overview Architechture Memory map Register Interrupt Timer/Counter Serial communication 02/18/ Hardware Basic
3 8051 Overview What is 8051? 8051 is a famous microcontroller series from Intel 8 bit architecture and instruction set Easy to use and learning Widely use in many application Suitable for Embedded and Controller application 02/18/ Hardware Basic
4 8051 Feature 8 Bit architecture Up to 64KB of external code and data 4KB of internal code, EPROM (8751), ROM (8051), Flash (8951) 128 Bytes of internal RAM 32 bits inport/output port 2 Timer/Counter 11 Serial communication (Full Duplex) 6 Sources of interrupt 02/18/ Hardware Basic
5 8051 Series 02/18/ Hardware Basic
6 8051 Series 02/18/ Hardware Basic
7 8051 Pin Port 0 Data and Address bus / Port Port 1 Bidirectional port Port 2 Address bus / Port Port 3 Alternate Function / Port ALE Address latch enable EA\ External memory access RST Reset PSEN\ Program strobe enable XTAL1,2 Crystal in/out 02/18/ Hardware Basic
8 8051 Architecture 02/18/ Hardware Basic
9 8051 Ports 02/18/ Hardware Basic
10 8051 Ports 02/18/ Hardware Basic
11 8051 Ports 02/18/ Hardware Basic
12 8051 Ports 02/18/ Hardware Basic
13 8051 Machine Cycles Clock P1 P2 P1 P2 P1 P2 P1 P2 P1 P2 P1 P2 State 1 S1 State 2 S2 State 3 S3 State 4 S4 State 5 S5 State 6 S6 ALE Fetch Opcode Fetch Opcode S1 S2 S3 S4 S5 S6 02/18/ Hardware Basic
14 8051 Machince Cycles (Cont) T = ( C * 12 ) / CF C = Machine Cycle of instrution CF = Crystal Frequency Such as ADD A,R1 -> use 1 Machine Cycle XTAL 12 MHz -> use 1 usec XTAL 16 MHz -> use 0.75 usec Note* Sometime we use XTAL of serial communication 02/18/ Hardware Basic
15 Code Memory 8051 Memory External Code memory FFFFh Internal Code memory FFFh Data Memory External Data memory FFFFh Internal Data memory? Register Bank 00-1Fh? Bit addressable 20h - 2Fh? Byte addressable 30h - 7Fh? Special function register 80h - 7Fh 02/18/ Hardware Basic
16 8051 Code Memory FFFFh External code memory 1000h 0FFFh 0000h Internal code EA\ = 1 External code EA\ = 0 02/18/ Hardware Basic
17 8051 External Code Fetches 02/18/ Hardware Basic
18 8051 Data Memory FFFFh Overlab Memory FFh 80h 7Fh 0 Special Function Register Internal Data RAM 0000 External Data Memory 02/18/ Hardware Basic
19 8051 Internal Data Memory 7Fh FFh FFh 20h 20h 18h 10h 8h 0 Byte Addressable RAM Bit Addressable RAM Bank 3 Bank 2 Bank 1 Bank 0 80h Special Function Register 80h Extend RAM Access by Indirect addressing only 02/18/ Hardware Basic
20 8051 Register Bank Bank 3 Bank 2 R0 R0 R1 R1 R2 R2 R3 R3 R4 R4 R5 R5 R6 R6 R7 R7 18h - 1Fh 10h - 17h Bank 1 R0 R1 R2 R3 R4 R5 R6 R7 08h - 0Fh Bank 0 R0 R1 R2 R3 R4 R5 R6 R7 00h - 07h Bank 0 -> RS0, 1 = 00 Bank 1 -> RS0, 1 = 01 Bank 2 -> RS0, 1 = 10 Bank 3 -> RS0, 1 = 11 All bank has same name of register 02/18/ Hardware Basic
21 8051 Bit Addressable RAM 2Eh 2Ch 2Ah 28h 26h 24h 22h 20h A 3B 3C 3D 3E 3F A 2B 2C 2D 2E 2F A 1B 1C 1D 1E 1F A 0B 0C 0D 0E 0F A 7B 7C 7D 7E 7F A 6B 66 6D 6E 6F A 5B 5C 5D 5E 5F A 4B 4C 4D 4E 4F Fh 2Dh 2Bh 29h 27h 25h 23h 21h Bit addressable Byte addressable 02/18/ Hardware Basic
22 8051 SFR ( ) In 8052 Only 02/18/ Hardware Basic
23 8051 SFR (cont) P0 (Port 0, Address 80h, Bit-Addressable) P1 (Port 1, Address 90h, Bit-Addressable) P2 (Port 2, Address A0h, Bit-Addressable) P3 (Port 3, Address B0h, Bit-Addressable) ACC (Accumulator, Addresses E0h, Bit-Addressable) B (B Register, Addresses F0h, Bit-Addressable) SP (Stack Pointer, Address 81h) DPL/DPH (Data Pointer Low/High, Addresses 82h/83h) TL0/TH0 (Timer 0 Low/High, Addresses 8Ah/8Bh) TL1/TH1 (Timer 1 Low/High, Addresses 8Ch/8Dh) SBUF (Serial Control, Addresses 99h) 02/18/ Hardware Basic
24 8051 SFR (cont) PSW (Program Status Word, Addresses D0h, Bit-Addressable) PCON (Power Control, Addresses 87h) TCON (Timer Control, Addresses 88h, Bit-Addressable) TMOD (Timer Mode, Addresses 89h) SCON (Serial Control, Addresses 98h, Bit-Addressable) IE (Interrupt Enable, Addresses A8h) IP (Interrupt Priority, Addresses B8h, Bit-Addressable) 02/18/ Hardware Basic
25 Program Status Word (PSW) 02/18/ Hardware Basic
26 Power Control (PCON) 02/18/ Hardware Basic
27 Timer Control (TCON) 02/18/ Hardware Basic
28 Timer Mode (TMOD) 02/18/ Hardware Basic
29 Serial Control (SCON) 02/18/ Hardware Basic
30 Interrupt Enable (IE) 02/18/ Hardware Basic
31 Interrupt Priority (IP) 02/18/ Hardware Basic
32 8051 Software Basic Register and memory Addressing mode Instructionset Arithmetic Logical Boolean Data transfer Program control flow 02/18/ Software Basic
33 8051 Register & Memory Register R0 R7 A (Accumulator) B DPTR (DPH, DPL) Memory General purpose register R0 - R7 (00h - 1Fh) Bit addressable RAM (20h - 2Fh) General purpose memory (30-7Fh) 02/18/ Software Basic
34 8051 Addressing Mode Immediate addressing mode MOV A,#20h Direct addressing mode MOV A,20h Indirect addressing mode MOV Register addressing mode MOV A,R0 02/18/ Software Basic
35 8051 Instruction Set Arithmetic instruction set Logical instruction set Boolean instruction set Data transfer instruction set Program flow control (jump instruction set) 02/18/ Software Basic
36 Arithmetic Instruction Set Byte = register or one byte memory 02/18/ Software Basic
37 Logical Instruction Set 02/18/ Software Basic
38 Boolean Instruction Set 02/18/ Software Basic
39 Data Transfer Instruction Set Accessing internal data memory x,xx xx Accessing external data memory x,xx xx Lookup table read instruction x,xx xx 02/18/ Software Basic
40 Data Transfer Instruction Set (con( cont) Accessing internal data memory 02/18/ Software Basic
41 Data Transfer Instruction Set (con( cont) Accessing external data memory 02/18/ Software Basic
42 Data Transfer Instruction Set (con( cont) Table Lookup read instruction 02/18/ Software Basic
43 Program Flow Control Uncondition jump jmp,, call, ret Condition jump jz, jnz, djnz, cjne Bit condition jump jc, jnc, jb, jnb, jbc 02/18/ Software Basic
44 Program Flow Control (con( cont) Uncondition jump 02/18/ Software Basic
45 Program Flow Control (con( cont) Condition jump 02/18/ Software Basic
46 Program Flow Control (con( cont) Bit condition jump 02/18/ Software Basic
47 8051 Assembler (SXA51) Defination & Preprocessor Lable & Comment End statement & Predefine Assembly 02/18/ Assembler (SXA51)
48 Defination & Preprocessor EQU EQU use to define variable or contant value Counter EQU 20h -> define value of Counter Setting EQU b -> define setting as 1Ah mov -> use Counter as variable mov -> use Counter as constant value DW, DB use to define constant value DB Hello -> define string Hello in Code DW, mov mov DW -> define value in word ll get 48h (H) ( 02/18/ Assembler (SXA51)
49 Lable and Comment Use :to make lable to jmp or call Use ;to make comment in code Main: mov r0,#05h ;load r0 with 5 djnz r0,$ ;decrement r0 and jmp if = 0 cpl P1.4 ;complement P1.4 jmp Main ;always jump to main 02/18/ Assembler (SXA51)
50 End Statement And Predefine Use END at end of program to indicate end for assembler Predefine Register Bank -> r0, r1. R7 Register -> A, B, DPTR, TH0 SFR -> PCON, TMOD, PSW Flag -> C, Z, P 02/18/ Assembler (SXA51)
51 8051 Basic Code Delay Loop Delay: Loop: push 0 ;save register r0 push 1 ;save register r1 mov r0,#00h ;r0 = 00 mov r1,#20h ;r1 = 20h djnz r1,$ ;loop r1 32 times djnz r0,loop ;loop r0 256 times pop 1 ;restore register r1 pop 0 ;restore register r0 ret ;return 02/18/ Basic Code
52 Delay Loop Cycle Time 8051 Basic Code Delay: push 0 ;2 push 1 ;2 mov r0,#00h ;1 Loop: mov r1,#20h ;1 X 256 = 256 djnz r1,$ ;2 X 32 X 256 = 16,384 djnz r0,loop ;2 X 256 = 512 pop 1 ;2 pop 0 ;2 ret ;2 Total time = , = 17,163 us 02/18/ Basic Code
53 8051 Basic Code Pulse generator Main: cpl p1.0 ;toggle p1.0 call delay ;delay jmp Main ;infinite loop Duty cycle = 50% Pulse width = 17,163 us Frequency = Hz Cystals = 12 MHz 02/18/ Basic Code Delay: Loop: push 0 push 1 mov r0,#00h mov r1,#20h djnz r1,$ djnz r0,loop pop 1 pop 0 ret
54 Pulse generator use timer Main: ORG 0000H jmp Main ORG 000BH jmp T0_ISR setb EA setb ET0 mov TMOD,# mov TH,#20h mov TL,#20h setb TR0 jmp $ 8051 Basic Code 02/18/ Basic Code T0_ISR: push psw cpl p1.0 pop psw ret Duty cycle = 50% Pulse width = 32 us Frequency = Hz Cystals = 12 MHz
55 8051 Basic Code External Interrupt ORG jmp ORG jmp 0000H Main 0003H INT0_ISR INT0_ISR: push inc pop reti psw P0 psw Main: setb EA setb EX0 setb IT0 mov P0,#0 jmp $ Count pulse on INT0 pin (external Interrupt 0) and display counter on 02/18/ Basic Code
56 8051 Interface C1, C pf 02/18/ Interface
57 8051 Interface Power On Reset 02/18/ Interface
58 8051 Interface 02/18/ Interface
59 8051 Interface External Program Memory Read Cycle 02/18/ Interface
60 8051 Interface 02/18/ Interface
61 8051 Interface Exteranl Data Memory Read Cycle 02/18/ Interface
62 8051 Interface Exteranl Data Memory Write Cycle 02/18/ Interface
63 8051 Interface 8051 P0 VCC 10K Input/Output P1-P3 Mov Mov a,p0 P1,a 02/18/ Interface
64 8051 Interface Input with switch, Output with LED 8051 VCC 10K VCC Mov a,p0 Mov P1,a P0 P1-P3 300 LED Mov P1,#00 Mov P1,#FFh 02/18/ Interface
65 8051 P1.0, Row0 P1.1, Row1 P1.2, Row2 P1.3, Col0 P1.4, Col1 P1.5, Col Interface Matrix keyboard by scanning techinque Mov P1,#FEh Jnb P1.3,Key1 Jnb P1.4,Key2 Jnb P1.5,Key3 Mov P1,#FDh Jnb P1.3,Key4 Jnb P1.4,Key5 Jnb P1.5,Key6 Mov P1,#FBh Jnb P1.3,Key7 Jnb P1.4,Key8 Jnb P1.5,Key9 02/18/ Interface
66 8051 Interface 7-Segment Display by Scan Tecnique 8051 P1 P2.0 P2.1 P2.2 P2.3 02/18/ Interface 8 7-Segment (common Anode) Loop: Mov P1,#Num1 Mov P2,#00h Call Delay Mov P1,#Num2 Mov P2,#01h Call Delay Mov P1,#Num2 Mov P2,#01h Call Delay Mov P1,#Num2 Mov P2,#01h Call Delay Jmp Loop
67 Interface Serial Communication Via RS-232C Port TX RX GND PC Use null modem connector And XTAL = MHz 02/18/ Interface
68 8051 Interface Serial Communication Via RS-232C Port 02/18/ Interface
69 Start: 8051 Interface Serial Communication Via RS-232C Port ORG 0000H Jmp Start ORG 0023H Jmp Serial_ISR ORG 0040H Clr PCON.7 ;clear SMOD Mov SCON,#52h ;set mode Mov TMOD,#20h;timer mode 2 Mov TH1,#FDh ;set reload value Setb EA ;enable all Int. Setb REN ;enable Receive Setb TR1 ;start Timer Mov DPTR,#0000h Serial_ISR: TX_Evnt Evnt: End_ISR: Push Push Jnb Mov jnb Mov Clr Jmp Inc Pop Pop Reti PSW Acc RI,TX_Evnt A,SBUF TI,$ SBUF,A TI End_ISR DPTR Acc PSW 02/18/ Interface
70 8051 Interface Baud Rate 02/18/ Interface
71 Assigment Bubble Sort 0000h = Counter, 0001h - 00xxh = External Data (< 256 bytes) Start N = Data[0] Data = Data[1-N] For I = 1 to N-1 If I > J then Swap End For J = 1 to I-1
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