STEVAL-IPE005V1, STPM01 programmer board - hardware

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1 User manual STEVAL-IPE005V, STPM0 programmer board - hardware Introduction The STPM0 - programmer kit works in conjunction with the STPM0 energy meter ASSP device and with the STPM0 manager software. It is an integrated system designed to provide the user with a complete, ready-to-use energy meter application. The reference design is a high-end solution for power metering based on the STR70 microcontroller with an embedded RTC and an external memory interface (EMI) ready to drive Mbyte of onboard SRAM. The kit also integrates an on-board optical insulated serial line allowing isolation of the board ground reference in order to avoid propagation of overvoltage on the PC side. Moreover, the on-board charge pump allows burning the STPM0 energy meter ASSP device registers. Access to the STPM0 device registers is ensured using a dedicated SPI bus interface. The STPM0 programmer kit demonstrates how effectively the STPM0 can be used in real-world energy meter applications and it helps the user to develop his own application. The STPM0 programmer kit can be used in two ways: For demonstration purposes, by connecting the reference design to an AC power source and changing all the settings parameters through the GUI interface and the hardware programmer/reader board To evaluate and develop a custom application March 008 Rev /

2 Contents UM0509 Contents Overview Recommended reading Getting technical support STPM0 kit components Package checklist Debug Reset Power supplies Opto-isolated RS SPI connector Status LEDs Jumper placement Jumper position Description of push-buttons and default value Description of connectors Boot configuration Connectors Power UARTx Debug STPM0 programmer kit schematics Microcontroller and main parts schematic Power management Reset and clock circuits Boot management and Jtag circuit External RAM memory SPI signals buffering Charge pump and SPI connector Revision history /

3 List of figures List of figures Figure. STPM0 programmer kit option jumper placement Figure. Jumper position Figure. STPM0 programmer kit: placement of connectors Figure 4. Power jack connector: CN Figure 5. RS transmit and receive connectors Figure 6. JTAG standard interface: CN Figure 7. Microcontroller and main parts schematic Figure 8. Power management schematic Figure 9. Reset and clock circuits Figure 0. Boot management and Jtag circuits Figure. Opto-isolated UART Figure. External RAM memory Figure. SPI signals buffering Figure 4. Charge pump and SPI connector /

4 Overview UM0509 Overview. Recommended reading This documentation describes how to configure and use the STPM0 programmer kit hardware. Additional information can be found in the following documents: Datasheets of ST devices Datasheets of third party devices Dedicated application notes STPM0 programmer firmware user manual STPowerMeter user manual. Getting technical support Technical assistance is provided free to all customers. For technical assistance, documentation, information and upgrades about products and services, please refer to your local ST distributor/office. STMicroelectronics offers its customers a free technical support service at metering@st.com and on 4/

5 STPM0 kit components STPM0 kit components. Package checklist The STPM0 kit package includes the following items: The STPM0 board A CD-ROM with software and documentation. Debug Software debug is via a standard 0-pin JTAG connection.. Reset The reset sources are: Power-on reset Push-button reset JTAG reset from an in-circuit emulator.4 Power supplies Power to the board is supplied using a lump in cord power supply providing 5 V to the board. All other required voltages are provided by on-board voltage regulators or voltage convectors. An isolated 5 V DC/DC provides the isolated voltage supply for the opto-coupler devices..5 Opto-isolated RS- A general-purpose, asynchronous serial I/O data port is connected through 9-pin D-type male connectors. The port is opto-isolated in order to avoid overvoltage on the PC side..6 SPI connector A devoted SPI connector allows interfacing the STPM0 device. It provides all the SPI signals required to communicate with the STPM0 interface registers. Moreover it provides a 4 V line which allows burning the STPM0 configuration registers. 5/

STPM0 kit components UM0509.7 Status LEDs Table.

6 STPM0 kit components UM Status LEDs Table. Status LEDs LED D D D Description +5 V power +. V power.8 V power.8 Jumper placement Figure. STPM0 programmer kit option jumper placement 6/

7 STPM0 kit components.9 Jumper position Figure. Jumper position Table. Jumpers (refer to Figure ) Jumper Description Default J J J J8 SW8 SW9 SW0. V power supply for external SRAM Fitted: power to the SRAM Not fitted: no power to the SRAM Enable VBKP (stabitization for low power voltage) Fitted: stabilization enabled Not fitted: stabilization disabled Enable.8 V to microcontroller Fitted:.8 V to microcontroller enabled Not fitted:.8 V to microcontroller disabled Power supply to the charge pump: Fitted (-): Internal power supply to charge pump and SPI signals buffer Fitted (-): power supply to charge pump and SPI signals buffer from STPM0 board BOOT EN: Fitted (-): Fitted (-):. V BOOT: Fitted (-):. V Fitted (-): BOOT0: Fitted (-):. V Fitted (-): Fitted Not fitted Fitted Fitted (-) Not fitted Not fitted Not fitted 7/

STPM0 kit components UM0509.0 Description of push-buttons and default value Table.

8 STPM0 kit components UM Description of push-buttons and default value Table. Push-buttons (refer to Figure ) Jumper Description Default SW SW SW Wakeup: When pushed, wakes up microcontroller Application default: When pushed, forces default conditions Reset button: When pushed, forces microcontroller reset Fitted. Description of connectors Figure. STPM0 programmer kit: placement of connectors P J7 J4 CN CN Table 4. Connectors (refer to Figure ) Connector P J4 CN CN J7 Description Opto - isolated RS female connector DC-IN 5 V connector DC-IN 5 V connector JTAG connector SPI connector 8/

9 STPM0 kit components. Boot configuration Table 5. Boot mode BOOT EN SW8 BOOT SW9 BOOT0 SW0 Mode BOOT memory mapping Note 0 (-)) Any Any User (-) 0 (-) 0 (-) (-) 0 (-) (-) System memory Flash mapped at 0h System memory mapped at 0h (-) (-) 0 (-) RAM RAM mapped at 0h (-) (-) (-) EXTMEM EXTMEM mapped at 0h System executes code from Flash System executes a factory installed boot loader from system memory (reserved mode) Clock frozen System executes code from internal RAM For lab development System executes code from external memory Not allowed 9/

10 Connectors UM0509 Connectors. Power Figure 4. Power jack connector: CN. UARTx Figure 5. RS transmit and receive connectors Table 6. Pin RS connector pinout P Description Shorted to pins 6 and Shorted to pins and 6 TX-0_PC (RIN) 4 RX-0_PC (TOUT) 5 6 Shorted to pins and 7 Shorted to pin 8 8 Shorted to pin 7 9 Not connected 0/

11 Connectors. Debug Figure 6. JTAG standard interface: CN Table 7. Pin JTAG interface pinout: CN0 Description Even pins Ground VTref+. V Vsupply+. V nottrst 5 TDI 7 TMS 9 TCK RTCK (ground) TDo 5 notreset 7 DBGRQS - pulled down 9 Pulled down /

12 STPM0 programmer kit schematics UM STPM0 programmer kit schematics 4. Microcontroller and main parts schematic Figure 7. Microcontroller and main parts schematic CK RTCXT TCXTI RTCXT TCXTO BOOTEN TX I/0 Tx_ x_0 Rx_0 D5 VOUT D5 D4 VOUT D4 D A9 D D A8 A9 D D A7 A8 D D0 A6 A7 D0 D9 A5 A6 D9 D8 A4 A5 D8 D7 A A4 D7 D6 A A D6 D5 A A D5 D4 A0 A D4 D A9 A0 D D A8 A9 D D A7 A8 D D0 A6 A7 D0 A5 A6 A4 A5 A A4 nwe0 A A WE0 nwe A A WE nrd A not OE CS. not CS_SRAM JTDI JTDO JTCK JTDI JTMS not JTRST JTDO not Reset JTCK DBGRQS JTMS not JTRst not Reset DBGRQS U JTDI JTCK I/O I/O5 JTMS JTDO I/O4 not JTRST I/O I/O MISO U not Reset DBGRQS MOSI I/O I/O5 SCLK I/O4 I/O I/O +V8 +V8 VBKP VBKP CK CK 46 P P P.0/USBCLK 06 9 USBDN 9 90 USBDP 90 not Reset RSTIN 5 45 CKOUT 45 RTCXTI RTCXTI 49 RTCXTO RTCXTO 50 BOOTEN BOOTEN 6 JTDI JTDI 0 JTDO JTDO JTCK JTCK JTMS JTMS not JTRST JTRST 4 P.0 P.0/T.OCMPB/AIN.0 7 P. P./T.ICAPA/AIN. 7 P. P./T.OCMPA/AIN P./T.ICAPB/AIN P./CANRX P./CANTX P./HCLK/IO.SCL P.4/HCLK/IO.SCL 08 P.4/HTXD P0.0 P0. P0.0/S0.MISO/U.TX P0. P0./S0.MOSI/U.RX 4 6 P0./S0.SCLK/I.SCL 5 P0./S0.SSN/I.SDA 6 P0.4 P0.5 P0.4/S.MISO 7 P0.6 P0.5/S.MOSI 40 P0.7 P0.6/S.SCLK 4 P0.7/S.SSN 4 Rx_0 Tx_0 P0.8/U0.RX/U0.TX 4 P0.9/U0.TX/BOOT.0 44 P0.0 TX I/0 P0.0/U.RX/U.TX P0./U.TX/BOOT. P0./SCCLK 4 SYSTEM_DEFAULT P0.4/U4.TX/T.ICAPA 0 DBGRQS DBGROS 44 NC 5 TEST 6 9 TEST 8 0 NC 9 7 NC 0 9 NC 7 4 NC 9 4 NC 4 48 NC 4 not Reset RESET VBKP VBKP +V8 +V8 P0.5.V 5V P0.6 P0.0 STR7_SCS STPM0_SCS P0. STR7_MOSI STPM0_SDA P0.4 STR7_MISO STPM0_SCLK STR7_SCL STPM0_SYN P0.0 STR7_SYN P0.7 STR7_WRITE_EN STR7_READ_EN P.0 P. P. WAKEUP ORANGE +V8 VBKP CS. R5 Cn A0 A A A A4 A5 A6 A7 A8 A9 A0 A A A A4 A5 A6 A7 A8 A9 A0 A A A D0 D D D D4 D5 D6 D7 D8 D9 D0 D D D D4 D5 nrd rn nwe0 rn nwe rn P P0./U.RX/T.OCMPA POWER J9 BOOT BOOT_EN SW SW BOOT EMI_SRAM ESD ESDA6V-5W6-SOT-6L ESDA6V-5W6-SOT-6L R7 R9 R 560 SW R MOMENTARY 560 WAKEUP C R 00n 560 SW R4 MOMENTARY 560 SYSTEM_DEFAULT POWER MANAGEMENT CHARGE PUMP 0 STPM0_SCS STPM0_SDA STPM0_SCL STPM0_SYN STR7_SBG STR7_SBS STR7_OTP_EN ChargePump Enable UART0 TX TIMER GPIO PORT EMI DEBUG UART UART UART0 SPI SPI0 IC0 CAN ADC STS RTC SYSTEM USB GENERAL P.0/CS.0 P./CS. P./CS. P./CS. A.0 A. A. A. A.4 A.5 A.6 A.7 A.8 A.9 A.0 A. A. A. A.4 A.5 A.6 A.7 A.8 A.9 P.4/A.0 P.5/A. P.6/A. P.7/A. D.0 D. D. D. D.4 D.5 D.6 D.7 D.8 D.9 D.0 D. D. D. D.4 D.5 RD WE.0 WE. P.8 P.9 P.0 P. P. P. P.4 P.5 P.4/T.ICAPA P.5/T.ICAPB P.6/T.OCMPB P.7/T.OCMPA SUPPLY U STR70FZT6-TQFP44 NC VSS VSS P0.5/WAKEUP 47 STBY VSS V VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSSBKP AVSS NC NC NC NC V. V. V.4 V.5 V.6 V.7 AVDD 66 V8. V8. V8BKP NC NC NC NC NC NC CLK - RTC CK RTCXTI RTCXTO CLK TP0 R8 0uF C49 C R6 00n 560 RESET OPTO ISOLATED UART TX_0 RX_0 UARTx JTAG SPI_BUFFER SPI_BUFFER /

13 STPM0 programmer kit schematics 4. Power management Figure 8. Power management schematic U5 C 50V 0n VIN VOUT LD DPAK-A U6 C0 50V 0n J4 CN DC-IN9V DC-IN9V D6 N400 C 50V 0n C 50V 0n C4 47uF J Enable VBKP C5 5V 00n L FBEAD J Enable V8 VBKP VBKP C5 5V 00n +V8 +V8 C7 5V 00n R4 560 R V8 R6 560 TP TEST POINT TP4 TEST POINT D BLU D YELLOW VIN VOUT LD085 - DPAK-A LF0 B PSG CB 4 CG CG 5 CG 6 BNX00 D GREEN /

14 STPM0 programmer kit schematics UM Reset and clock circuits Figure 9. Reset and clock circuits 4/

15 STPM0 programmer kit schematics 4.4 Boot management and Jtag circuit Figure 0. Boot management and Jtag circuits 5/

16 STPM0 programmer kit schematics UM0509 Figure. Opto-isolated UART 6/

17 STPM0 programmer kit schematics 4.5 External RAM memory Figure. External RAM memory 7/

18 STPM0 programmer kit schematics UM SPI signals buffering Figure. SPI signals buffering SPI SIGNALS BUFFER SPI BUFFER FROM STR7 TO STPM0 SPI BUFFER FROM STPM0 TO STR7 CHARGE PUMP 5V STR7_SCL STPM0_SCLK STR7_SYN STPM0_SYN sclkv sclk5v synv sy n5v STR7_READ_EN STR7_MISO rev_0_c8 read_env sda5v misov U4 G A Y G A Y M74HC6 VCC 4 4G 4A 4Y G 0 9 A 9 8 Y U5 G A Y G A Y M74HC6 VCC 4 4G 4A 4Y G 0 9 A 9 8 Y 5V scsv scs5v write_env mosiv sda5v.v.v.v 5V 5V STR7_SCS STPM0_SCS STR7_MOSI STPM0_SDA.V R4 4.7k rev_0_c0 STR7_WRITE_EN 8/

19 STPM0 programmer kit schematics 4.7 Charge pump and SPI connector Figure 4. Charge pump and SPI connector STR7_SBG STPM0_SCS SCS SCS VOTP STR7_SBG STR7_SBS STPM0_SDA SCL SYN VCC STR7_SBG STR7_OTP_EN R0 K VCC SCL SYN STPM0_SYN STR7_SBG STPM0_SCL STPM0_SYN STR7_OTP_EN STR7_SBS STPM0_SCS STR7_SBG STPM0_SCL STPM0_SDA 0 VCC VCC STPM0_SYN STR7_OTP_EN STR7_SBS STPM0_SCS STR7_SBG STPM0_SCL STPM0_SDA VOTP D4 BAS70-04/SOT D5 BAS70-04/SOT VCC J8 CON C5 0n C7 0n C8 0n R8 0 R7 47K Q4 BC807-5 R9 K C u Q BC U G A Y G A Y M74HC6 VCC 4 4G 4A 4Y G 0 A 9 Y 8 J CON U G A Y G A Y M74HC6 VCC 4 4G 4A 4Y G 0 A 9 Y 8 00nF C 00nF C0 C6 56p U A Y A Y A Y M74HC4 VCC 4 6A 6Y 5A 5Y 0 4A 9 4Y 8 C4 00nF R K + C 0uF 9/

20 Revision history UM Revision history Table 8. Document revision history Date Revision Changes 4-Mar-008 Initial release 0/

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