S-2900A. Rev CMOS 512-bit SERIAL E 2 PROM
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1 Rev.1.11 CMOS 512-bit SERIAL E 2 PROM S-29A The S-29A is a wide operating voltage range, low power consumption 512-bit E 2 PROM. The organization is 64-word 8-bit, and can be read or written serially. It is easily interfaced with a serial port because the instruction is composed of eight-bit units. Features Operating voltage Read : 1.5 to 5.5 V Write : 2.7 to 5.5 V Power consumption Standby : 1 µa max. Read : 1.4 ma max. (V CC =5.5 V).4 ma max. (V CC =1.5 V) Operating Frequency 2 MHz (V CC =4.5 V to 5.5 V) 5 khz (V CC =2.7 V to 4.5 V) 1 khz (V CC =1.5 V to 2.7 V) Memory configuration 512 bits (64-word 8-bit) Byte writing/byte reading Data retention: 1 years Package : 8-pin DIP/SOP SOT-89-5 Bare chip Package y 8-pin DIP (PKG drawing code : DP8-A) y 8-pin SOP PKG drawing code : FE8-A) ysot-89-5 PKG drawing code : UP5-A) Pin Assignment CS GND NC pin DIP/SOP VC C NC SK 5 1 SOT-89-5 Top view : CS 2 : GND 3 : 4 : SK 5 : VCC Data input/output CS Chip select SK Serial clock Vcc Power supply voltage GND Ground ( V) Figure 1 Block Diagram Memory array Address decoder Input/Output buffer Data register CS SK Clock generator Mode decode logic V CC GND Figure 2 Seiko Instruments Inc. 1
2 S-29A Instruction Set Table 1 Instruction Op code Address Data READ (Read data) 1 A 5 to A D 7 to D output PROGRAM (Program) 1 A 5 to A D 7 to D input PEN (Program enable) STRD (Status read) output Absolute Maximum Ratings Table 2 Parameter Symbol Ratings Unit Power supply voltage V CC -.3 to +7. V Input voltage V IN -.3 to V CC +.3 V Output voltage V OUT -.3 to V CC V Storage temperature under bias T bias -5 to +95 C Storage temperature T stg -65 to +15 C Recommended Operating Conditions Table 3 Parameter Symbol Conditions Min. Typ. Max. Unit Power supply voltage V CC Read Write V V High level input voltage V IH V CC =2.7 to 5.5 V V CC =1.5 to 2.7 V.8 V CC. V CC V CC V CC V V Low level input voltage V IL V CC =2.7 to 5.5 V V CC =1.5 to 2.7 V...2 V CC.15 V CC V V Operating temperature T opr -4 + C 2 Seiko Instruments Inc.
3 DC Electrical Characteristics Table 4 CMOS 512-bit SERIAL E 2 PROM S-29A (Ta=-4 C to C) Parameter Smbl Conditions Read/Write operations Read operation Unit Current consumption (READ) Current consumption (PROGRAM) V CC =5. V±1 % V CC =3 V ± 1 % V CC =1.5 to 2.7 V Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. I CC1 DO unloaded ma I CC2 DO unloaded ma Table 5 (Ta=-4 C to C) Parameter Smbl Conditions Read/Write operations Read operation Unit Standby current consumption Input leakage current Output leakage current Low level output voltage High level output voltage V CC =5. V±1 % V CC =2.7 to 4.5 V V CC =1.5 to 2.7 V Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. I SB Input: V CC or GND µa I LI V IN =GND to V CC µa I LO V OUT =GND to V CC µa V OL CMOS I OL =1 µa V V OH TTL I OL =2.1 ma.45 V CMOS V CC =2.7 to 5.5 V: I OH =-1 µa V CC =1.5 to 2.7 V: I OH =-1 µa V CC -.7 V CC -.7 V CC -.3 V TTL, I OH =-4 µa 2.4 V Rewriting Times Table 6 ( Ta=-4 C to + C) Parameter Symbol Min. Typ. Max. Unit Rewriting times N W 1 5 times/word Pin Capacitance Table 7 (Ta=25 C, f=1. MHz, V CC =5 V) Parameter Symbol Conditions Min. Typ. Max. Unit Input capacitance C IN V IN = V 8 pf Input/Output C I/O V I/O = V 1 pf capacitance Seiko Instruments Inc. 3
4 S-29A AC Electrical Characteristics Table 8 Measuring conditions Input voltage level.1 V CC to.9 V CC Output voltage level.5 V CC Output load 1 pf Table 9 (Ta=-4 C to C) Parameter Symbol Read / Write operations Read operations Unit V CC =5. V±1% V CC =2.7 to 4.5 V V CC =1.5 to 2.7 V Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. CS setup time t CSS µs CS hold time t CSH µs CS deselect time t CDS µs Data setup time t DS µs Data hold time t DH µs 1 data output delay t PD µs data output delay t PD µs Clock frequency f SK MHz Clock pulse width t SKH, t SKL µs Output disable time t HZ1, t HZ ns Program time t PR ms CS t CSS t SKH t SKL t CSH t CDS SK (Input) t DS t DH Valid data Valid data (Output) t PD t PD1 Input data is fetched at the rise of SK. Output data is triggered at the fall of SK. Figure 3 Timing chart 4 Seiko Instruments Inc.
5 S-29A Operation (1) Read (READ) mode After changing CS from L to H, this mode inputs the op code and address into, synchronized with the rise of SK. When A is input at the rise of the eighth SK clock cycle, eight-bit data in the specified address is output from the pin, synchronized with the falling of SK. The pin changes to high impedance after CS changes to L. CS t CSS t SKH tskl t CSH SK t DS t DH t PD t HZ2 1 A5 A4 A3 A2 A1 A D7 D6 D5 D4 D3 D2 D1 D t HZ1 Figure 4 (2) Write (PROGRAM) mode After changing CS from L to H, this mode inputs the op code, address, and data (eight -bit) into, synchronized with the rise of SK. After data is input, by changing CS from H to L again, data is written to the chip (the write operation). The write operation time is decided by the timer inside of the IC (1 ms max.). After the write operation, The S-29A is automatically in program disable mode. Therefore, the S-29A must be in program enable mode through executing the PEN instruction before the write operation. For confirming completion of the write operation, check the status read mode described later. CS t CSS t CSH t CDS t SKH t SKL SK t DS t DH 1 A5 A4 A3 A2 A1 A D7 D6 D5 D4 D3 D2 D1 D t PR Figure 5 Seiko Instruments Inc. 5
6 S-29A (3) Program enable (PEN) mode After being in program enable mode through executing the PEN instruction, data can be written (programmed). Before executing a program instruction, the PEN instruction must be executed. After changing CS from L to H, this mode inputs the op code and address H into, synchronized with the rise of SK. When instruction is received at the rise of the eighth SK clock cycle, the S-29A is in program enable mode. CS t CSS tcsh SK t DS tdh Figure 6 (4) Status read (STRD) mode STRD confirms whether or not the write operation has been completed. During the write (Busy) operation, low level is output from, and after completing the write operation (Ready status), high level is output. After changing CS from L to H, this mode inputs the op code and address 3F H into, synchronized with the rise of SK. From the falling edge of the eighth SK clock cycle, the S-29A outputs the write operation status. C t CSS SK t DS t t t HZ2 DH PD t HZ1 Busy Ready Figure 7 Please refer Application Note S-29 & S-93C series EEPROMs Tips, Tricks & Traps for equivalent circuit of each pin. 6 Seiko Instruments Inc.
7 S-29A Ordering Information S-29A XX Package DP : DIP FE : SOP UP : SOT-89-5 CA : Bare chip Product name Note : Each bit is set to 1 before delivery (except bare chip). Seiko Instruments Inc. 7
8 S-29A Characteristics 1. DC characteristics 1.1 Current consumption (READ) I CC1 1.2 Current consumption (READ) I CC1 V CC =5.5V f SK =2 MHz =11 V CC =3.3V f SK =5kHz = I CC1 I CC Current consumption (READ) I CC1 Power supply voltage V CC 1.4 Current consumption (READ) I CC1 Clock frequency f SK Ta=25 C f SK =1 MHz =11 V CC =5.V Ta=25 C I CC1 I CC V CC (V) 1K 1K 1M 2M fsk (Hz) 1.5 Current consumption (PROGRAM) I CC2 I CC V CC =5.5V Continuous PROGRAM mode 1.6 Current consumption (PROGRAM) I CC2 I CC V CC =3.3V Continuous PROGRAM mode 1.7 Current consumption (PROGRAM) I CC2 Power supply voltage V CC I CC Ta=25 C 1.8 Standby current consumption I SB I SB (A) V CC =5.5V V CC (V) 8 Seiko Instruments Inc.
9 S-29A 1.9 Input leakage current I LI 1.1 Input leakage current I LI 1. V CC =5.5V CS, SK, DI=V 1. V CC =5.5V CS, SK, DI=5.5V I LI (µa) I LI (µa) Output leakage current I LO I LO (µa) 1..5 V CC =5.5V DO=V 1.12 Output leakage current I LO I LO (µa) 1..5 V CC =5.5V DO=5.5V 1.13 High level output voltage V OH 1.14 High level output voltage V OH 4.6 V CC =4.5V I OH =-4µA 2.7 V CC =2.7V I OH =-1µA 4.4 V OH (V) 2.6 V OH (V) Low level output voltage V OL 1.16 Low level output voltage V OL.3 V CC =4.5V I OL =2.1mA.3 V CC =1.5V I OL =1µA.2 V OL (V) V OL (V) Seiko Instruments Inc. 9
10 S-29A 1.17 High level output current I OH 1.18 High level output current I OH -5. V CC =4.5V V OH =3.8V -4 V CC =2.7V V OH =2.V I OH -2.5 I OH Low level output current I OL 1.2 Low level output current I OL 2 V CC =4.5V V OL =.45V 1. V CC =1.5V V OL =.1V I OL I OL Input reversal voltage V INV Power supply voltage V CC V INV (V) Ta=25 C CS, SK and DI pins 1.22 Input reversal voltage V INV V INV (V) V CC =5.V CS, SK and DI pins V CC (V) 1 Seiko Instruments Inc.
11 S-29A 2. AC characteristics 2.1 Maximum operating frequency f max Power supply voltage V CC Ta=25 C 2.2 Program time t PR Power supply voltage V CC Ta=25 C f max (Hz) 2M 1M 1K 1K t PR (ms V CC (V) V CC (V) 2.3 Program time t PR 2.4 Program time t PR V CC =5.V V CC =3.V 6 6 t PR (ms) t PR (ms) data output delay time t PD1 t PD1 (µs).3.2 V CC =4.5V data output delay time t PD1 t PD1 (µs).3.2 V CC =2.7V data output delay time t PD t PD (µs).3.2 V CC =4.5V data output delay time t PD t PD (µs).3.2 V CC =2.7V Seiko Instruments Inc. 11
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15 The information described herein is subject to change without notice. Seiko Instruments Inc. is not responsible for any problems caused by circuits or diagrams described herein whose related industrial properties, patents, or other rights belong to third parties. The application circuit examples explain typical applications of the products, and do not guarantee the success of any specific mass-production design. When the products described herein are regulated products subject to the Wassenaar Arrangement or other agreements, they may not be exported without authorization from the appropriate governmental authority. Use of the information described herein for other purposes and/or reproduction or copying without the express permission of Seiko Instruments Inc. is strictly prohibited. The products described herein cannot be used as part of any device or equipment affecting the human body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus installed in airplanes and other vehicles, without prior written permission of Seiko Instruments Inc. Although Seiko Instruments Inc. exerts the greatest possible effort to ensure high quality and reliability, the failure or malfunction of semiconductor products may occur. The user of these products should therefore give thorough consideration to safety design, including redundancy, fire-prevention measures, and malfunction prevention, to prevent any accidents, fires, or community damage that may ensue.
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64 k SRAM (8-kword 8-bit) ADE-203-454B (Z) Rev. 2.0 Nov. 1997 Description The Hitachi HM6264B is 64k-bit static RAM organized 8-kword 8-bit. It realizes higher performance and low power consumption by
AT49BV004(T) TSOP Top View Type 1 1. AT49BV4096A(T) TSOP Top View Type 1 A16 BYTE GND I/O7 I/O14 I/O6 I/O13 I/O5 I/O12 I/O4 VCC I/O11 I/O3 I/O10 I/O2
Features 2.7V to 3.6V Read/Write Operation Fast Read Access Time - 120 ns Internal Erase/Program Control Sector Architecture One 8K Words (16K bytes) Boot Block with Programming Lockout Two 4K Words (8K
Distributed by: www.jameco.com 1-800-831-4242 The content and copyrights of the attached material are the property of its owner. 16,384-BIT EPROM WITH I/O! 2048 Words x 8 Bits! Single + 5V Power Supply
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PYA28C K x 8 EEPROM FEATURES DESCRIPTION. Access Times of 150, 200, 250 and 350ns. Software Data Protection. Single 5V±10% Power Supply
PYA28C256 32K x 8 EEPROM FEATURES Access Times of 150, 200, 250 and 350ns Single 5V±10% Power Supply Simple Byte and Page Write Low Power CMOS: - 60 ma Active Current - 300 µa Standby Current Fast Write
Two-wire Serial EEPROM 4K (512 x 8) 8K (1024 x 8) AT24C04B AT24C08B. Features. Description. Low-voltage and Standard-voltage Operation 1.
Features Low-voltage and Standard-voltage Operation.8 (V CC =.8V to.v) Internally Organized x 8 (K), or 0 x 8 (8K) Two-wire Serial Interface Schmitt Trigger, Filtered Inputs for Noise Suppression Bidirectional
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UNISONIC TECHNOLOGIES CO., LTD
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GT25C64 SPI. 64K bits. Serial EEPROM
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16-megabit 2.5-volt or 2.7-volt DataFlash AT45DB161D
Features Single 2.5V - 3.6V or 2.7V - 3.6V Supply RapidS Serial Interface: 66 MHz Maximum Clock Frequency SPI Compatible Modes 0 and 3 User Configurable Page Size 512 Bytes per Page 528 Bytes per Page
512K bitstwo-wire Serial EEPROM
General Description The provides 524,288 bits of serial electrically erasable and programmable read-only memory (EEPROM), organized as 65,536 words of 8 bits each. The device is optimized for use in many
79C Megabit (512K x 40-Bit) EEPROM MCM FEATURES: DESCRIPTION: Logic Diagram. 512k x 40-bit EEPROM MCM
79C24 2 Megabit (512K x 4-Bit) EEPROM MCM FEATURES: 512k x 4-bit EEPROM MCM RAD-PAK radiation-hardened agait natural space radiation Total dose hardness: - >1 krad (Si) - Dependent upon orbit Excellent
Fremont Micro Devices, Inc.
FEATURES Low voltage and low power operations: FT24C02/04/08/16: V CC = 2.5V to 5.5V FT24C02A/04A/08A/16A: V CC = 1.8V to 5.5V Maximum Standby current < 1µA (typically 0.02µA and 0.06µA @ 1.8V and 5.5V
1 Megabit Serial Flash EEPROM SST45LF010
EEPROM FEATURES: Single.0-.V Read and Write Operations Serial Interface Architecture SPI Compatible: Mode 0 and Mode Byte Serial Read with Single Command Superior Reliability Endurance: 00,000 Cycles (typical)
DS1258Y/AB 128k x 16 Nonvolatile SRAM
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2-Mbit (128K x 16) Static RAM
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28LV Megabit (128K x 8-Bit) EEPROM. Memory DESCRIPTION: FEATURES: 28LV011. Logic Diagram
28LV11 1 Megabit (128K x 8-Bit) EEPROM V CC V SS High Voltage Generator I/O I/O7 RDY/Busy RES OE I/O Buffer and Input Latch CE WE Control Logic Timing RES 28LV11 A A6 Y Decoder Y Gating A7 Address Buffer
LAPIS Semiconductor ML9298
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OTP MATRIX 3-D MEMORY - 32PIN TSOP 16MB, 32MB, 64MB DATA SHEET DOCUMENT NUMBER: DS004 REVISION: 1.11 REVISION DATE:
16MB, 32MB, 64MB DATA SHEET REVISION: 111 REVISION DATE: 06-24-05 REV 111 06/24/05 NOTICES: Copyright 2002, 2004, 2005 Matrix Semiconductor, Inc All rights reserved If you have received this document from
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SPI. 64K Bits. Serial EEPROM
GT25C64 SPI 64K Bits Serial EEPROM Copyright 2011 Giantec Semiconductor Inc. (Giantec). All rights reserved. Giantec reserves the right to make changes to this specification and its products at any time
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TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 1-GBIT (128M 8 BITS) CMOS NAND E 2 PROM DESCRIPTION The TH58100 is a single 3.3 V 1-Gbit (1,107,296,256) bit NAND Electrically Erasable
P3C1256 HIGH SPEED 32K x 8 3.3V STATIC CMOS RAM
HIGH SPEED 3K x 8 3.3 STATIC CMOS RAM FEATURES 3.3 Power Supply High Speed (Equal Access and Cycle Times) 1///5 (Commercial) //5 (Industrial) Low Power Single 3.3 olts ±.3olts Power Supply Easy Memory
PY291A DESCRIPTION. Windowed devices for reprogramming. EPROM Technology for reprogramming. Fully TTL Compatible Inputs and Outputs
2K x 8 reprogrammable prom FEATURES EPROM Technology for reprogramming High Speed 20/25/35/50 ns (Commercial) 25/35/50 ns (Industrial) 35/50 ns (Military) Low Power Operation: 660 mw Single 5±10% Power
64K x 32 Static RAM Module
31 CYM1831 Features High-density 2-Mbit SRAM module 32-bit standard footprint supports densities from 16K x 32 through 1M x 32 High-speed CMOS SRAMs Access time of 15 ns Low active power 5.3W (max.) SMD
SST 29EE V-only 512 Kilobit Page Mode EEPROM
Data Sheet SST 29EE512 June 1997 2.1 Features: Single 5.0-Volt Read and Write Operations CMOS SuperFlash EEPROM Technology Endurance: 100,000 Cycles (typical) Greater than 100 years Data Retention Low
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GT24C256 2-WIRE. 256K Bits. Serial EEPROM
GT24C256 2-WIRE 256K Bits Serial EEPROM Copyright 2013 Giantec Semiconductor Inc. (Giantec). All rights reserved. Giantec reserves the right to make changes to this specification and its products at any
Features INSTRUCTION DECODER CONTROL LOGIC AND CLOCK GENERATORS COMPARATOR AND WRITE ENABLE EEPROM ARRAY READ/WRITE AMPS DATA IN/OUT REGISTER 16 BITS
July 2000 FM9366 (MICROWIRE Bus Interface) 4096- Serial EEPROM General Description FM9366 is a 4096-bit CMOS non-volatile EEPROM organized as 256 x 16-bit array. This device features MICROWIRE interface
P2M648YL, P4M6416YL. PIN ASSIGNMENT (Front View) 168-PIN DIMM. 8-2Mx8 SDRAM TSOP P2M648YL-XX 16-2Mx8 SDRAM TSOP P4M6416YL-XX
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www.ablic.com www.ablicinc.com ABLIC Inc., 2009-2015 The is a SPI serial E 2 PROM which operates at high speed, with low current consumption and the wide range operation. The has the capacity of 32 K-bit
1-Mbit (64K x 16) Static RAM
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M8M644S3V9 M16M648S3V9. 8M, 16M x 64 SODIMM
MM644S3V9 MM64S3V9 SDRAM Features: JEDEC Standard 144-pin, PC100, PC133 small outline, dual in-line memory Module (SODIMM) Unbuffered TSOP components. Single 3.3v +.3v power supply. Fully synchronous;
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128Kx8 CMOS MONOLITHIC EEPROM SMD
128Kx8 CMOS MONOLITHIC EEPROM SMD 5962-96796 WME128K8-XXX FEATURES Read Access Times of 125, 140, 150, 200, 250, 300ns JEDEC Approved Packages 32 pin, Hermetic Ceramic, 0.600" DIP (Package 300) 32 lead,
S-25C160A H Series 105 C OPERATION SPI SERIAL E 2 PROM FOR AUTOMOTIVE. Features. Packages.
www.ablic.com www.ablicinc.com 105 C OPERATION SPI SERIAL E 2 PROM FOR AUTOMOTIVE ABLIC Inc., 2010-2017 Rev.3.0_01_H The S-25C160A H series devices are high-temperature operation SPI serial E 2 PROMs for
1-Megabit (128K x 8) Low Voltage Paged Parallel EEPROMs
Features Single 3.3V ± 10% Supply Fast Read Access Time - 200 ns Automatic Page Write Operation Internal Address and Data Latches for 128 Bytes Internal Control Timer Fast Write Cycle Time Page Write Cycle
TS2043 Preliminary CMOS IC
UNISONIC TECHNOLOGIES CO., LTD TS2043 Preliminary CMOS IC TOUCH PANEL CONTROLLER DESCRIPTION The UTC TS2043 is a highly integrated 12-bit SAR analog-to-digital (A/D) converter designed for touch panel
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1M X28LV010 128K x 8 Bit 3.3 Volt, Byte Alterable E 2 PROM FEATURES Access Time: 70, 90, 120, 150ns Simple Byte and Page Write Single 3.3V±10% supply No external high voltages or V PP control circuits
64K (8K x 8) Battery-Voltage Parallel EEPROM with Page Write and Software Data Protection AT28BV64B
Features Single 2.7V to 3.6V Supply Hardware and Software Data Protection Low Power Dissipation 15mA Active Current 20µA CMOS Standby Current Fast Read Access Time 200ns Automatic Page Write Operation