Doing more with multicore! Utilizing the power-efficient, high-performance KeyStone multicore DSPs. November 2012

Size: px
Start display at page:

Download "Doing more with multicore! Utilizing the power-efficient, high-performance KeyStone multicore DSPs. November 2012"

Transcription

1 Doing more with multicore! Utilizing the power-efficient, high-performance KeyStone multicore DSPs November 2012

2 How the world is doing more with TI s multicore

3 Using TI multicore for wide variety of applications Radar/Safety Test and Automation High Performance Computing, Imaging Video and Audio Infrastructure Video Surveillance Wireless Base Stations, SDR

4 Applying TI multicore to get the highest performance of specialized processing Wireless base stations High performance math, signal processing Video transcoding, transrating Analytics Image processing 4

5 Leveraging TI multicore to enhance current products 5

6 TI s KeyStone Multicore Platform

7 TI s KeyStone multicore architecture Multicore Navigator Queue Manager Multicore Shared Memory Controller ARM CorePacs ARM CorePacs C66x CorePacs C66x CorePacs AccelerationPac I/O 7

8 Enriched KeyStone DSP portfolio available today! Portable, Standalone Infrastructure, Advanced connectivity

9 TI s breakthrough C66x Core Performance 32 GMACs Per 1 GHz 16 GFLOPs Per 1 GHz Fastest Integrated Fixed and Floating Point DSP 4x Multiply accumulate boost over C64x+ Up to 10 Ghz DSP (8 Ghz) Floating point operating at the industry s fastest fixed point speed (1.2 GHz) 90 new instructions Improved support for complex arithmetic and matrix computation SIMD support for floating point M1 8 Instruction VLIW Fetch Decode L1 S1 D1 M2 L2 S2 D2 Register File A Register File B 100% compatible with existing C64x+ software

10 TI s KeyStone tools Multicore performance, Single core simplicity Code Composer Studio TM Editor Codegen OpenMP Profiler Debugger Remote Debug SoC Analyzer Visualization Eclipse Third Party Plug-Ins Polycore ENEA Optima 3L Critical Blue Multicore Software Development Kit SYS/BIOS Multicore Demo Linux Multicore Demo Silicon Entitlement Linux, SYS/BIOS Demo Libraries DSPLIB, Image, Math, Media, Simulink SYS/BIOS Demonstration Operating System w/ Boot Loader Multicore Programming Model Inter Core Communication Linux Platform Development Kit (PDK) (Chip Support, Driver, Examples) Host Computer Target Board XDS 560 V2 XDS 560 Trace

11 KeyStone Multicore Software Libraries & Codecs Digital Signal Processing FFT Adaptive Filtering Filtering and convolution Others.. Available free from TI Image Processing Edge Detection Boundary Morphology Others.. Available free from TI Voice and Fax Line Echo Cancellation Voice Activity Detection Others Available free from TI Libraries MATLAB/Simulink Image processing Math operations Vision Analytics Security/Cryptography AES, SHA1, 3DES Codecs Voice G.711, G.722 G.723, G.729 CDMA, AMR(NB/WB), EVRC-B Others Fax T.38 Fax Modem Video H.263 H.264 MPEG2 MPEG4 VC1/WMV9 Decode Others Audio MPEG1 Layer2 AAC LC/HE AC3 2.0/5.1 Sample Rate Conversion

12 TMDXEVM6678L EVM Code Composer Studio IDE *Design *Code and Build *Debug *Analyze *Tune H/W Development Tools CCSv5 Allows designers of all experience levels to move quickly through application development ( EVM Kit includes BIOS 6.x, MCSDK 2.0 (NDK, PDK, LIB etc), Sample Program and Out of box demo (OOB) e.g. User Guide, Starter guide, Tech Ref Guide, App Notes etc TMDXEVM6678L EVM with XDS100 emulation $399 TMDXEVM6678LE EVM with XDS560V2 emulation $599 TMDXEVM6678LXE EVM with XDS560V2 emulation Encryption Enabled $599 TMDSEMU560v2STM UE XDS560v2 System Trace Emulator with 128Mb System Trace buffer and Ethernet / USB support Optional PCIe adapter card to connect the C6678 EVM to a standard PCI header of a desktop.

13 KeyStone multicore partners Multicore Programming Tools Commercial, off-the-shelf cards: Advanced Mezzanine (AMC) PCIe (with Gen 2) ATCA Chassis/System Custom H/W VPX card 13

14 Do more with MULTICORE TI s real-time updates and references Get started with TI Multicore Mix Chinese Language e2e forum TI news center TXInstruments texasinstruments

High Performance Compute Platform Based on multi-core DSP for Seismic Modeling and Imaging

High Performance Compute Platform Based on multi-core DSP for Seismic Modeling and Imaging High Performance Compute Platform Based on multi-core DSP for Seismic Modeling and Imaging Presenter: Murtaza Ali, Texas Instruments Contributors: Murtaza Ali, Eric Stotzer, Xiaohui Li, Texas Instruments

More information

Introduction to AM5K2Ex/66AK2Ex Processors

Introduction to AM5K2Ex/66AK2Ex Processors Introduction to AM5K2Ex/66AK2Ex Processors 1 Recommended Pre-Requisite Training Prior to this training, we recommend you review the KeyStone II DSP+ARM SoC Architecture Overview, which provides more details

More information

KeyStone C66x Multicore SoC Overview. Dec, 2011

KeyStone C66x Multicore SoC Overview. Dec, 2011 KeyStone C66x Multicore SoC Overview Dec, 011 Outline Multicore Challenge KeyStone Architecture Reminder About KeyStone Solution Challenge Before KeyStone Multicore performance degradation Lack of efficient

More information

Optimizing the performance and portability of multicore DSP platforms with a scalable programming model supporting the Multicore Association s MCAPI

Optimizing the performance and portability of multicore DSP platforms with a scalable programming model supporting the Multicore Association s MCAPI Texas Instruments, PolyCore Software, Inc. & The Multicore Association Optimizing the performance and portability of multicore DSP platforms with a scalable programming model supporting the Multicore Association

More information

Lab 1. OMAP5912 Starter Kit (OSK5912)

Lab 1. OMAP5912 Starter Kit (OSK5912) Lab 1. OMAP5912 Starter Kit (OSK5912) Developing DSP Applications 1. Overview In addition to having an ARM926EJ-S core, the OMAP5912 processor has a C55x DSP core. The DSP core can be used by the ARM to

More information

PAULA CARRILLO October Processor SDK & PRU-ICSS Industrial software

PAULA CARRILLO October Processor SDK & PRU-ICSS Industrial software PAULA CARRILLO October 2017 Processor SDK & PRU-ICSS Industrial software AGENDA 01 02 PRU-ICSS INDUSTRIAL SOFTWARE PROTOCOLS PAULA CARRILLO October 2017 CHAPTER AGENDA PSDK Descriptions Download webpage

More information

Video Interface Module for TI EVM TMDXEVM8148 and TMDXEVM368

Video Interface Module for TI EVM TMDXEVM8148 and TMDXEVM368 CH-Merge with LVDS HD-SDI for TI EVM TMDXEVM8148 and TMDXEVM368 VIM-HDSDI TMDXEVM8148 cable length over 100m Multi channel HD-SDI DDR3 TMS320DM8148(1GHz Cortex A8, 750MHz C674x ) Dual 32bit DDR3 of 1GB,

More information

KeyStone C665x Multicore SoC

KeyStone C665x Multicore SoC KeyStone Multicore SoC Architecture KeyStone C6655/57: Device Features C66x C6655: One C66x DSP Core at 1.0 or 1.25 GHz C6657: Two C66x DSP Cores at 0.85, 1.0, or 1.25 GHz Fixed and Floating Point Operations

More information

TI TMS320C6000 DSP Online Seminar

TI TMS320C6000 DSP Online Seminar TI TMS320C6000 DSP Online Seminar Agenda Introduce to C6000 DSP Family C6000 CPU Architecture Peripheral Overview Development Tools express DSP Q & A Agenda Introduce to C6000 DSP Family C6000 CPU Architecture

More information

Introducing the AM57x Sitara Processors from Texas Instruments

Introducing the AM57x Sitara Processors from Texas Instruments Introducing the AM57x Sitara Processors from Texas Instruments ARM Cortex-A15 solutions for automation, HMI, vision, analytics, and other industrial and high-performance applications. Embedded Processing

More information

PDK (Platform Development Kit) Getting Started. Automotive Processors

PDK (Platform Development Kit) Getting Started. Automotive Processors PDK (Platform Development Kit) Getting Started Automotive Processors 1 Agenda PDK Overview PDK Software Architecture PDK Directory structure PDK Pre-requisite and Build instructions Running Examples Important

More information

C55x Digital Signal Processors Software Overview

C55x Digital Signal Processors Software Overview C55x Digital Signal Processors Software Overview Agenda C55x Chip Support Library (CSL) Introduction Benefits Structure Example C55x DSP Library (DSPLIB) Introduction Structure Programmer Reference Guide

More information

SoC Overview. Multicore Applications Team

SoC Overview. Multicore Applications Team KeyStone C66x ulticore SoC Overview ulticore Applications Team KeyStone Overview KeyStone Architecture & Internal Communications and Transport External Interfaces and s Debug iscellaneous Application and

More information

Implementation of Deep Convolutional Neural Net on a Digital Signal Processor

Implementation of Deep Convolutional Neural Net on a Digital Signal Processor Implementation of Deep Convolutional Neural Net on a Digital Signal Processor Elaina Chai December 12, 2014 1. Abstract In this paper I will discuss the feasibility of an implementation of an algorithm

More information

C55x Digital Signal Processors Software Overview

C55x Digital Signal Processors Software Overview C55x Digital Signal Processors C55x Digital Signal Processors Software Overview Agenda C55x Chip Support Library (CSL) Introduction Benefits Structure Example C55x DSP Library (DSPLIB) Introduction Structure

More information

ARM+DSP - a winning combination on Qseven

ARM+DSP - a winning combination on Qseven ...embedding excellence ARM+DSP - a winning combination on Qseven 1 ARM Conference Munich July 2012 ARM on Qseven your first in module technology Over 6 Billion ARM-based chips sold in 2010 10% market

More information

C66x KeyStone Training HyperLink

C66x KeyStone Training HyperLink C66x KeyStone Training HyperLink 1. HyperLink Overview 2. Address Translation 3. Configuration 4. Example and Demo Agenda 1. HyperLink Overview 2. Address Translation 3. Configuration 4. Example and Demo

More information

C66x KeyStone Training HyperLink

C66x KeyStone Training HyperLink C66x KeyStone Training HyperLink 1. HyperLink Overview 2. Address Translation 3. Configuration 4. Example and Demo Agenda 1. HyperLink Overview 2. Address Translation 3. Configuration 4. Example and Demo

More information

THE LEADER IN VISUAL COMPUTING

THE LEADER IN VISUAL COMPUTING MOBILE EMBEDDED THE LEADER IN VISUAL COMPUTING 2 TAKING OUR VISION TO REALITY HPC DESIGN and VISUALIZATION AUTO GAMING 3 BEST DEVELOPER EXPERIENCE Tools for Fast Development Debug and Performance Tuning

More information

TMS320C6000 : The Broadband Infrastructure and Imaging DSP World s Highest Performance DSP

TMS320C6000 : The Broadband Infrastructure and Imaging DSP World s Highest Performance DSP TMS320C6000 : The Broadband Infrastructure and Imaging DSP World s Highest Performance DSP Platform Update August 2000 Henry Wiechman Worldwide C6000 DSP Product Marketing Manager Three DSP Breakthroughs

More information

KeyStone Training. Turbo Encoder Coprocessor (TCP3E)

KeyStone Training. Turbo Encoder Coprocessor (TCP3E) KeyStone Training Turbo Encoder Coprocessor (TCP3E) Agenda Overview TCP3E Overview TCP3E = Turbo CoProcessor 3 Encoder No previous versions, but came out at same time as third version of decoder co processor

More information

Classification of Semiconductor LSI

Classification of Semiconductor LSI Classification of Semiconductor LSI 1. Logic LSI: ASIC: Application Specific LSI (you have to develop. HIGH COST!) For only mass production. ASSP: Application Specific Standard Product (you can buy. Low

More information

Embedded Processing Portfolio for Ultrasound

Embedded Processing Portfolio for Ultrasound Embedded Processing Portfolio for Ultrasound High performance, programmable platform Processor performance speeds image analysis faster, clearer results Power/size efficient processors enable portability

More information

Tracing embedded heterogeneous systems P R O G R E S S R E P O R T M E E T I N G, M A Y

Tracing embedded heterogeneous systems P R O G R E S S R E P O R T M E E T I N G, M A Y Tracing embedded heterogeneous systems P R O G R E S S R E P O R T M E E T I N G, M A Y 2 0 1 6 T H O M A S B E R T A U L D D I R E C T E D B Y M I C H E L D A G E N A I S May 5th 2016 TRACING EMBEDDED

More information

Simplifying DSP Development with C6EZ Tools

Simplifying DSP Development with C6EZ Tools Simplifying DSP Development with C6EZ Tools DSP Development made easier with C6EZ Tools Seamlessly ports ARM code to DSP (ARM Developers) Provides ARM access to ready-to-use DSP kernels (System Developers)

More information

Digital Signal Processor 2010/1/4

Digital Signal Processor 2010/1/4 Digital Signal Processor 1 Analog to Digital Shift 2 Digital Signal Processing Applications FAX Phone Personal Computer Medical Instruments DVD player Air conditioner (controller) Digital Camera MP3 audio

More information

VICP Signal Processing Library. Further extending the performance and ease of use for VICP enabled devices

VICP Signal Processing Library. Further extending the performance and ease of use for VICP enabled devices Signal Processing Library Further extending the performance and ease of use for enabled devices Why is library effective for customer application? Get to market faster with ready-to-use signal processing

More information

The Path to Embedded Vision & AI using a Low Power Vision DSP. Yair Siegel, Director of Segment Marketing Hotchips August 2016

The Path to Embedded Vision & AI using a Low Power Vision DSP. Yair Siegel, Director of Segment Marketing Hotchips August 2016 The Path to Embedded Vision & AI using a Low Power Vision DSP Yair Siegel, Director of Segment Marketing Hotchips August 2016 Presentation Outline Introduction The Need for Embedded Vision & AI Vision

More information

2008/12/23. System Arch 2008 (Fire Tom Wada) 1

2008/12/23. System Arch 2008 (Fire Tom Wada) 1 Digital it Signal Processor System Arch 2008 (Fire Tom Wada) 1 Analog to Digital Shift System Arch 2008 (Fire Tom Wada) 2 Digital Signal Processing Applications FAX Phone Personal Computer Medical Instruments

More information

Code Composer Studio v4. Introduction

Code Composer Studio v4. Introduction Content Summary This presentation is split into different sections so that it can be used for multiple purposes Section 1: General Overview Section 2: Targeted at existing CCS users and why they should

More information

Software Driven Verification at SoC Level. Perspec System Verifier Overview

Software Driven Verification at SoC Level. Perspec System Verifier Overview Software Driven Verification at SoC Level Perspec System Verifier Overview June 2015 IP to SoC hardware/software integration and verification flows Cadence methodology and focus Applications (Basic to

More information

XDS560V2 Installation Guide

XDS560V2 Installation Guide XDS560V2 Installation Guide Wintech Digital System Co., Ltd http://www.wintechdigital.com 1 About This Manual IMPORTANT INFORMATION This Installation Guide is for the Wintech Digital XDS560v2 JTAG Emulator

More information

Kalray MPPA Manycore Challenges for the Next Generation of Professional Applications Benoît Dupont de Dinechin MPSoC 2013

Kalray MPPA Manycore Challenges for the Next Generation of Professional Applications Benoît Dupont de Dinechin MPSoC 2013 Kalray MPPA Manycore Challenges for the Next Generation of Professional Applications Benoît Dupont de Dinechin MPSoC 2013 The End of Dennard MOSFET Scaling Theory 2013 Kalray SA All Rights Reserved MPSoC

More information

Chapter 7. Hardware Implementation Tools

Chapter 7. Hardware Implementation Tools Hardware Implementation Tools 137 The testing and embedding speech processing algorithm on general purpose PC and dedicated DSP platform require specific hardware implementation tools. Real time digital

More information

30 Years of TI s DSP: what s next? Fernando Mujica, Ph.D. Director, System Architectures Research Lab

30 Years of TI s DSP: what s next? Fernando Mujica, Ph.D. Director, System Architectures Research Lab 30 Years of TI s DSP: what s next? Fernando Mujica, Ph.D. Director, System Architectures Research Lab Outline History of the DSP DSP evolution from theory to processor to enabler Past, present and Future

More information

DevKit8000 Evaluation Kit

DevKit8000 Evaluation Kit DevKit8000 Evaluation Kit TI OMAP3530 Processor based on 600MHz ARM Cortex-A8 core Memory supporting 256MByte DDR SDRAM and 256MByte NAND Flash UART, USB Host/OTG, Ethernet, Camera, Audio, SD, Keyboard,

More information

SurfExpress/PCIe TM. Modular PCI Express DSP Multimedia Processing Board for Enterprise and CTI Applications. Overview.

SurfExpress/PCIe TM. Modular PCI Express DSP Multimedia Processing Board for Enterprise and CTI Applications. Overview. S U R F Main Features» PCI Express (PCIe) form-factor farm with 2x Gigabit Ethernet ports and CT bus» Complete media processing package for audio, video, modem and fax» Flexible and scalable modular design

More information

SDACCEL DEVELOPMENT ENVIRONMENT. The Xilinx SDAccel Development Environment. Bringing The Best Performance/Watt to the Data Center

SDACCEL DEVELOPMENT ENVIRONMENT. The Xilinx SDAccel Development Environment. Bringing The Best Performance/Watt to the Data Center SDAccel Environment The Xilinx SDAccel Development Environment Bringing The Best Performance/Watt to the Data Center Introduction Data center operators constantly seek more server performance. Currently

More information

Lightning (DSPC-8681E) User Guide

Lightning (DSPC-8681E) User Guide Lightning (DSPC-8681E) User Guide Revision v0.3 Initiated by Sungyi Chen Holland Huang Job Title Senior Engineer Senior Engineer Signature Sungyi Chen Holland Huang Approved by Dick Lin Job Title Software

More information

SurfExpress/PCIe TM. Modular PCI Express DSP Multimedia Processing Board for Enterprise and CTI Applications. Overview.

SurfExpress/PCIe TM. Modular PCI Express DSP Multimedia Processing Board for Enterprise and CTI Applications. Overview. S U R F Main Features» PCI Express (PCIe) form-factor farm with 2x Gigabit Ethernet ports and CT bus» Complete media processing package for audio, video, modem and fax» Flexible and scalable modular design

More information

COMPUTING. SharpStreamer Platform. 2U Video Transcode Acceleration Appliance

COMPUTING. SharpStreamer Platform. 2U Video Transcode Acceleration Appliance COMPUTING Preliminary Data Sheet SharpStreamer Platform 2U Video Transcode Acceleration Appliance The SharpStreamer 2U Platform enables high density voice and video processing in a 2U rack server appliance

More information

Spectrum Digital DRA75x/TDA2x Surround View EVM Kit with 5 Cameras 05/02/2016. Copyright

Spectrum Digital DRA75x/TDA2x Surround View EVM Kit with 5 Cameras 05/02/2016. Copyright Spectrum Digital DRA75x/TDA2x Surround View EVM Kit with 5 Cameras 05/02/2016 1 Spectrum Digital DRA75x/TDA2x Surround View EVM Kit Ordering Information SDI Part # Description Qty Price each 703789-0001

More information

ConnX D2 DSP Engine. A Flexible 2-MAC DSP. Dual-MAC, 16-bit Fixed-Point Communications DSP PRODUCT BRIEF FEATURES BENEFITS. ConnX D2 DSP Engine

ConnX D2 DSP Engine. A Flexible 2-MAC DSP. Dual-MAC, 16-bit Fixed-Point Communications DSP PRODUCT BRIEF FEATURES BENEFITS. ConnX D2 DSP Engine PRODUCT BRIEF ConnX D2 DSP Engine Dual-MAC, 16-bit Fixed-Point Communications DSP FEATURES BENEFITS Both SIMD and 2-way FLIX (parallel VLIW) operations Optimized, vectorizing XCC Compiler High-performance

More information

Introduction to Sitara AM437x Processors

Introduction to Sitara AM437x Processors Introduction to Sitara AM437x Processors AM437x: Highly integrated, scalable platform with enhanced industrial communications and security AM4376 AM4378 Software Key Features AM4372 AM4377 High-performance

More information

SBC8140 Single Board Computer

SBC8140 Single Board Computer SBC8140 Single Board Computer TI DM3730 Processor based on 1GHz ARM Cortex-A8 core Flexible Design with a Tiny CPU Board mounted on Expansion Board Memory supporting 256MByte DDR SDRAM and 512MByte NAND

More information

XDS200 ISO Operating Guide

XDS200 ISO Operating Guide XDS200 ISO Operating Guide Wintech Dig ital System Technology Co., Ltd www.wintechdigital.com 1 About This Manual IMPORTANT INFORMATION This Installation Guide is for the Wintech Digital XDS200 ISO JTAG

More information

Embedded Target for TI C6000 DSP 2.0 Release Notes

Embedded Target for TI C6000 DSP 2.0 Release Notes 1 Embedded Target for TI C6000 DSP 2.0 Release Notes New Features................... 1-2 Two Virtual Targets Added.............. 1-2 Added C62x DSP Library............... 1-2 Fixed-Point Code Generation

More information

Lightning (DSPC-8681E) User Guide

Lightning (DSPC-8681E) User Guide Lightning (DSPC-8681E) User Guide Revision v0.8 Initiated by Holland Huang Sungyi Chen Job Title Supervisor Senior Engineer Signature Approved by Dick Lin Job Title Software Manager Signature 2 nd Approved

More information

DevKit8500D Evaluation Kit

DevKit8500D Evaluation Kit DevKit8500D Evaluation Kit TI DM3730 Processor based on 800MHz ARM Cortex-A8 core Onboard 512MByte DDR SDRAM and 512MByte NAND Flash 3 UART, 4 USB Host, USB OTG, Ethernet, Audio, TF, Keyboard, Jtag,...

More information

TMS320C5502 ezdsp Quick Start Guide

TMS320C5502 ezdsp Quick Start Guide TMS320C5502 ezdsp Quick Start Guide C5502 ezdsp USB Cable DVD Quick Start Guide 1.0 SYSTEM REQUIREMENTS To operate the Spectrum Digital XDS100 JTAG Emulator with your system it needs to meet the following

More information

Fujitsu System Applications Support. Fujitsu Microelectronics America, Inc. 02/02

Fujitsu System Applications Support. Fujitsu Microelectronics America, Inc. 02/02 Fujitsu System Applications Support 1 Overview System Applications Support SOC Application Development Lab Multimedia VoIP Wireless Bluetooth Processors, DSP and Peripherals ARM Reference Platform 2 SOC

More information

OpenMP Accelerator Model for TI s Keystone DSP+ARM Devices. SC13, Denver, CO Eric Stotzer Ajay Jayaraj

OpenMP Accelerator Model for TI s Keystone DSP+ARM Devices. SC13, Denver, CO Eric Stotzer Ajay Jayaraj OpenMP Accelerator Model for TI s Keystone DSP+ Devices SC13, Denver, CO Eric Stotzer Ajay Jayaraj 1 High Performance Embedded Computing 2 C Core Architecture 8-way VLIW processor 8 functional units in

More information

Introducing TI s Integrated Development Environment CCS (Code Composer) Studio) to Expert Engineers

Introducing TI s Integrated Development Environment CCS (Code Composer) Studio) to Expert Engineers Introducing TI s Integrated Development Environment CCS (Code Composer) Studio) to Expert Engineers 1. Introduction 1.1. Intended Audience Expert DSP engineer that is new to TI s Code Composer Studio (CCS)

More information

Industry s Performance Leading Ultra-Low-Power DSP Solution

Industry s Performance Leading Ultra-Low-Power DSP Solution The World Leader in High Performance Signal Processing Solutions Industry s Performance Leading Ultra-Low-Power DSP Solution The New ADSP-BF70x Series of DSP Processors June 12, 2014 v4.0 Processor Market

More information

A NOVEL BASED METHOD TO DESIGN A 4G NETWORK AND TO IMPLEMENT IN REAL TIME USING DSP INTERFACE

A NOVEL BASED METHOD TO DESIGN A 4G NETWORK AND TO IMPLEMENT IN REAL TIME USING DSP INTERFACE aerd Scientific Journal of Impact Factor(SJIF): 3.134 e-issn(o): 2348-4470 p-issn(p): 2348-6406 International Journal of Advance Engineering and Research Development Volume 2,Issue 3, March -2015 A NOVEL

More information

Zynq-7000 All Programmable SoC Product Overview

Zynq-7000 All Programmable SoC Product Overview Zynq-7000 All Programmable SoC Product Overview The SW, HW and IO Programmable Platform August 2012 Copyright 2012 2009 Xilinx Introducing the Zynq -7000 All Programmable SoC Breakthrough Processing Platform

More information

Blackhawk USB560v2 System Trace Emulator. Installation Guide

Blackhawk USB560v2 System Trace Emulator. Installation Guide Blackhawk USB560v2 System Trace Emulator Installation Guide USB560v2-IG-01 APRIL 2012 Blackhawk USB560v2 System Trace Emulator Installation Guide IMPORTANT IMFORMATION 2012 EWA Technologies, Inc. All rights

More information

Welcome. Altera Technology Roadshow 2013

Welcome. Altera Technology Roadshow 2013 Welcome Altera Technology Roadshow 2013 Altera at a Glance Founded in Silicon Valley, California in 1983 Industry s first reprogrammable logic semiconductors $1.78 billion in 2012 sales Over 2,900 employees

More information

Integrating DMA capabilities into BLIS for on-chip data movement. Devangi Parikh Ilya Polkovnichenko Francisco Igual Peña Murtaza Ali

Integrating DMA capabilities into BLIS for on-chip data movement. Devangi Parikh Ilya Polkovnichenko Francisco Igual Peña Murtaza Ali Integrating DMA capabilities into BLIS for on-chip data movement Devangi Parikh Ilya Polkovnichenko Francisco Igual Peña Murtaza Ali 5 Generations of TI Multicore Processors Keystone architecture Lowers

More information

More performance options

More performance options More performance options OpenCL, streaming media, and native coding options with INDE April 8, 2014 2014, Intel Corporation. All rights reserved. Intel, the Intel logo, Intel Inside, Intel Xeon, and Intel

More information

Enabling the design of multicore SoCs with ARM cores and programmable accelerators

Enabling the design of multicore SoCs with ARM cores and programmable accelerators Enabling the design of multicore SoCs with ARM cores and programmable accelerators Target Compiler Technologies www.retarget.com Sol Bergen-Bartel China Business Development 03 Target Compiler Technologies

More information

TI s PCI2040 PCI-to-DSP Bridge

TI s PCI2040 PCI-to-DSP Bridge TI s PCI2040 PCI-to-DSP Bridge Brian G. Carlson - Sr. DSP Engineer DNA Enterprises, Inc. August 5, 1999 E-mail: bcarlson@dnaent.com 1 Agenda Introduction to the PCI Bus DSP Host Port Interface (HPI) Overview

More information

ECE 487 LAB 1 ÇANKAYA UNIVERSITY Overview of DSP Board

ECE 487 LAB 1 ÇANKAYA UNIVERSITY Overview of DSP Board ECE 487 LAB 1 ÇANKAYA UNIVERSITY Overview of DSP Board DSP (Digital Signal Processor) boards are used in high performance, high throughput signal processing applications. You can find there processors

More information

SurfRider/AMC TM. Modular AMC Form Factor DSP Resource Board for Carrier Grade Applications. Overview. Main Features

SurfRider/AMC TM. Modular AMC Form Factor DSP Resource Board for Carrier Grade Applications. Overview. Main Features S U R F Main Features» AMC form-factor farm, pre-integrated with leading ATCA and MicroTCA chassis» Complete media processing package for audio, video, modem and fax» Flexible and scalable modular design

More information

A new Computer Vision Processor Chip Design for automotive ADAS CNN applications in 22nm FDSOI based on Cadence VP6 Technology

A new Computer Vision Processor Chip Design for automotive ADAS CNN applications in 22nm FDSOI based on Cadence VP6 Technology Dr.-Ing Jens Benndorf (DCT) Gregor Schewior (DCT) A new Computer Vision Processor Chip Design for automotive ADAS CNN applications in 22nm FDSOI based on Cadence VP6 Technology Tensilica Day 2017 16th

More information

Introduction to Pre-Boot Loader Supported by QorIQ Processors

Introduction to Pre-Boot Loader Supported by QorIQ Processors Introduction to Pre-Boot Loader Supported by QorIQ Processors FTF-NET-F0152 Zhongcai Zhou Application Engineer A P R. 2 0 1 4 TM External Use Introduction What does Pre-Boot Loader (PBL) do? Device configuration

More information

Easy Multicore Programming using MAPS

Easy Multicore Programming using MAPS Easy Multicore Programming using MAPS Jeronimo Castrillon, Maximilian Odendahl Multicore Challenge Conference 2012 September 24 th, 2012 Institute for Communication Technologies and Embedded Systems Outline

More information

VPX Test Platform User Manual

VPX Test Platform User Manual VPX Test Platform User Manual 03010-05202 DISCLAIMER The information in this document has been carefully checked and is believed to be entirely reliable. However, no responsibility is assumed for inaccuracies.

More information

Modern Computer Architecture. Lecture 12 embedded Applications, classical DSP, automotive (Tricore)

Modern Computer Architecture. Lecture 12 embedded Applications, classical DSP, automotive (Tricore) Modern Computer Architecture Lecture 12 embedded Applications, classical DSP, automotive (Tricore) Outline Lecture 12 Embedded Systems on a Chip Microcontrollers Digital Signal Processors (DSP) Applications:

More information

C6000 Compiler Roadmap

C6000 Compiler Roadmap C6000 Compiler Roadmap CGT v7.4 CGT v7.3 CGT v7. CGT v8.0 CGT C6x v8. CGT Longer Term In Development Production Early Adopter Future CGT v7.2 reactive Current 3H2 4H 4H2 H H2 Future CGT C6x v7.3 Control

More information

A design of real-time image processing platform based on TMS320C6678

A design of real-time image processing platform based on TMS320C6678 Advanced Materials Research Online: 2014-06-25 ISSN: 1662-8985, Vols. 971-973, pp 1454-1458 doi:10.4028/www.scientific.net/amr.971-973.1454 2014 Trans Tech Publications, Switzerland A design of real-time

More information

ECE 471 Embedded Systems Lecture 3

ECE 471 Embedded Systems Lecture 3 ECE 471 Embedded Systems Lecture 3 Vince Weaver http://web.eece.maine.edu/~vweaver vincent.weaver@maine.edu 10 September 2018 Announcements New classroom: Stevens 365 HW#1 was posted, due Friday Reminder:

More information

Lightning (DSPC-8681E) User Guide

Lightning (DSPC-8681E) User Guide Lightning (DSPC-8681E) User Guide Revision v0.7 Initiated by Holland Huang Sungyi Chen Job Title Supervisor Senior Engineer Signature Approved by Dick Lin Job Title Software Manager Signature 2 nd Approved

More information

Media Instructions, Coprocessors, and Hardware Accelerators. Overview

Media Instructions, Coprocessors, and Hardware Accelerators. Overview Media Instructions, Coprocessors, and Hardware Accelerators Steven P. Smith SoC Design EE382V Fall 2009 EE382 System-on-Chip Design Coprocessors, etc. SPS-1 University of Texas at Austin Overview SoCs

More information

Code Composer Studio Operation Manual

Code Composer Studio Operation Manual Code Composer Studio Operation Manual Contents Code Composer Studio Operation Manual... 1 Contents... 1 Section 1: Launching CSS... 1 Section 2: Create Project & Preparing Project Setting... 3 Section

More information

Maximizing heterogeneous system performance with ARM interconnect and CCIX

Maximizing heterogeneous system performance with ARM interconnect and CCIX Maximizing heterogeneous system performance with ARM interconnect and CCIX Neil Parris, Director of product marketing Systems and software group, ARM Teratec June 2017 Intelligent flexible cloud to enable

More information

The World Leader in High Performance Signal Processing Solutions. DSP Processors

The World Leader in High Performance Signal Processing Solutions. DSP Processors The World Leader in High Performance Signal Processing Solutions DSP Processors NDA required until November 11, 2008 Analog Devices Processors Broad Choice of DSPs Blackfin Media Enabled, 16/32- bit fixed

More information

S2C K7 Prodigy Logic Module Series

S2C K7 Prodigy Logic Module Series S2C K7 Prodigy Logic Module Series Low-Cost Fifth Generation Rapid FPGA-based Prototyping Hardware The S2C K7 Prodigy Logic Module is equipped with one Xilinx Kintex-7 XC7K410T or XC7K325T FPGA device

More information

2015 The MathWorks, Inc. 1

2015 The MathWorks, Inc. 1 2015 The MathWorks, Inc. 1 MATLAB 의 C 코드생성 워크플로우및최적화요령 정승혁과장 2015 The MathWorks, Inc. 2 MATLAB Coder User Story Using MATLAB Try a new idea quickly Evaluation of the system by testing and analysis High

More information

Choosing a Micro for an Embedded System Application

Choosing a Micro for an Embedded System Application Choosing a Micro for an Embedded System Application Dr. Manuel Jiménez DSP Slides: Luis Francisco UPRM - Spring 2010 Outline MCU Vs. CPU Vs. DSP Selection Factors Embedded Peripherals Sample Architectures

More information

NEWS 2018 CONTENTS SOURCE CODE COVERAGE WORKS WITHOUT CODE INSTRUMENTATION. English Edition

NEWS 2018 CONTENTS SOURCE CODE COVERAGE WORKS WITHOUT CODE INSTRUMENTATION. English Edition NEWS 2018 English Edition WORKS WITHOUT CODE INSTRUMENTATION SOURCE CODE COVERAGE CONTENTS Trace-based MCDC Coverage Code Coverage Live Tracing via PCI Express Transition Wind River to TRACE32 RISC-V Debugger

More information

Adding C Programmability to Data Path Design

Adding C Programmability to Data Path Design Adding C Programmability to Data Path Design Gert Goossens Sr. Director R&D, Synopsys May 6, 2015 1 Smart Products Drive SoC Developments Feature-Rich Multi-Sensing Multi-Output Wirelessly Connected Always-On

More information

Conclusions. Introduction. Objectives. Module Topics

Conclusions. Introduction. Objectives. Module Topics Conclusions Introduction In this chapter a number of design support products and services offered by TI to assist you in the development of your DSP system will be described. Objectives As initially stated

More information

Very Large FFT Multicore DSP Implementation Demonstration Guide

Very Large FFT Multicore DSP Implementation Demonstration Guide Very Large FFT Multicore DSP Implementation Demonstration Guide 1 Very Large FFT Multicore DSP Implementation Demonstration Guide Overview This demo software implements single precision floating point

More information

Multicore System Analyzer User s Guide

Multicore System Analyzer User s Guide Multicore System Analyzer User s Guide Literature Number: SPRUH43A May 2011 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,

More information

Implementing Video and Image Processing Designs Using FPGAs. Click to add subtitle

Implementing Video and Image Processing Designs Using FPGAs. Click to add subtitle Implementing Video and Image Processing Designs Using FPGAs Click to add subtitle Agenda Key trends in video and image processing Video and Image Processing Suite Model-based design for video processing

More information

System Analyzer User s Guide. Literature Number: SPRUH43B July 2011

System Analyzer User s Guide. Literature Number: SPRUH43B July 2011 System Analyzer User s Guide Literature Number: SPRUH43B July 2011 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements,

More information

Keystone Architecture Inter-core Data Exchange

Keystone Architecture Inter-core Data Exchange Application Report Lit. Number November 2011 Keystone Architecture Inter-core Data Exchange Brighton Feng Vincent Han Communication Infrastructure ABSTRACT This application note introduces various methods

More information

Microsemi Secured Connectivity FPGAs

Microsemi Secured Connectivity FPGAs IoT Solutions Microsemi Secured Connectivity FPGAs SmartFusion2 SoC FPGAs Low Power Small Form Factors Scalable Security Secured Connectivity FPGAs Best in Class for IoT Infrastructure The IoT Infrastructure

More information

KeyStone II. CorePac Overview

KeyStone II. CorePac Overview KeyStone II ARM Cortex A15 CorePac Overview ARM A15 CorePac in KeyStone II Standard ARM Cortex A15 MPCore processor Cortex A15 MPCore version r2p2 Quad core, dual core, and single core variants 4096kB

More information

Each Milliwatt Matters

Each Milliwatt Matters Each Milliwatt Matters Ultra High Efficiency Application Processors Govind Wathan Product Manager, CPG ARM Tech Symposia China 2015 November 2015 Ultra High Efficiency Processors Used in Diverse Markets

More information

HotChips An innovative HD video and digital image processor for low-cost digital entertainment products. Deepu Talla.

HotChips An innovative HD video and digital image processor for low-cost digital entertainment products. Deepu Talla. HotChips 2007 An innovative HD video and digital image processor for low-cost digital entertainment products Deepu Talla Texas Instruments 1 Salient features of the SoC HD video encode and decode using

More information

Unleashing the benefits of GPU Computing with ARM Mali TM Practical applications and use-cases. Steve Steele, ARM

Unleashing the benefits of GPU Computing with ARM Mali TM Practical applications and use-cases. Steve Steele, ARM Unleashing the benefits of GPU Computing with ARM Mali TM Practical applications and use-cases Steve Steele, ARM 1 Today s Computational Challenges Trends Growing display sizes and resolutions, richer

More information

Porting BLIS to new architectures Early experiences

Porting BLIS to new architectures Early experiences 1st BLIS Retreat. Austin (Texas) Early experiences Universidad Complutense de Madrid (Spain) September 5, 2013 BLIS design principles BLIS = Programmability + Performance + Portability Share experiences

More information

[Sub Track 1-3] FPGA/ASIC 을타겟으로한알고리즘의효율적인생성방법및신기능소개

[Sub Track 1-3] FPGA/ASIC 을타겟으로한알고리즘의효율적인생성방법및신기능소개 [Sub Track 1-3] FPGA/ASIC 을타겟으로한알고리즘의효율적인생성방법및신기능소개 정승혁과장 Senior Application Engineer MathWorks Korea 2015 The MathWorks, Inc. 1 Outline When FPGA, ASIC, or System-on-Chip (SoC) hardware is needed Hardware

More information

An Ultra High Performance Scalable DSP Family for Multimedia. Hot Chips 17 August 2005 Stanford, CA Erik Machnicki

An Ultra High Performance Scalable DSP Family for Multimedia. Hot Chips 17 August 2005 Stanford, CA Erik Machnicki An Ultra High Performance Scalable DSP Family for Multimedia Hot Chips 17 August 2005 Stanford, CA Erik Machnicki Media Processing Challenges Increasing performance requirements Need for flexibility &

More information

CONTACT: ,

CONTACT: , S.N0 Project Title Year of publication of IEEE base paper 1 Design of a high security Sha-3 keccak algorithm 2012 2 Error correcting unordered codes for asynchronous communication 2012 3 Low power multipliers

More information

Advance CPU Design. MMX technology. Computer Architectures. Tien-Fu Chen. National Chung Cheng Univ. ! Basic concepts

Advance CPU Design. MMX technology. Computer Architectures. Tien-Fu Chen. National Chung Cheng Univ. ! Basic concepts Computer Architectures Advance CPU Design Tien-Fu Chen National Chung Cheng Univ. Adv CPU-0 MMX technology! Basic concepts " small native data types " compute-intensive operations " a lot of inherent parallelism

More information

RTOS, Linux & Virtualization Wind River Systems, Inc.

RTOS, Linux & Virtualization Wind River Systems, Inc. taeyong.kim@windriver.com RTOS, Linux & Virtualization 2008 Wind River Systems, Inc. Simple Board Simple Code 2 2008 Wind River Systems, Inc. start: /* disable interrupts in CPU and switch to SVC32 mode

More information

Building and Running Inter-Processor Communication (IPC) Examples on the AM572x GP EVM. Sahin Okur Embedded Processor Catalog Applications

Building and Running Inter-Processor Communication (IPC) Examples on the AM572x GP EVM. Sahin Okur Embedded Processor Catalog Applications Building and Running Inter-Processor Communication (IPC) on the AM572x GP EVM Sahin Okur Embedded Processor Catalog Applications IPC Introduction Sitara AM572x 28 nm Processing General purpose Computational

More information