S-29530A/29630A CMOS SERIAL E 2 PROM. Rev.1.2_00. Features. Packages

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1 Rev.1.2_ CMOS SERIAL E 2 PROM The S-2953A / 63A series are low power 16K / 32K-bit E 2 PROM with a low operating voltage range. They are organized as 124-word 16-bit and 248-word 16bit, respectively. Each is capable of sequential read, at which time addresses are automatically incremented in 16-bit blocks. Features Low power consumption Standby : 1. µa Max. Operating : 1.2 ma Max.(V CC =5.5 V) :.4 ma Max.(V CC =2.5 V) Wide operating voltage range Write : 1.8 to 5.5 V Read : 1.8 to 5.5 V Sequential read capable Endurance : 1 6 cycles/word Data retention : 1 years Packages Package name Drawing code Package Tape Reel 8-Pin DIP DP8-A 8-Pin SOP(JEDEC) FJ8-A FJ8-D FJ8-D Seiko Instruments Inc. 1

2 CMOS SERIAL E 2 PROM Rev.1.2_ Pin Assignment 8-Pin DIP Top view Table 1 SK DI Figure 1 VCC NC TEST GND Pin Number Pin Name Function 1 Chip select input 2 SK Serial clock input 3 DI Serial data input 4 Serial data output 5 GND Ground 6 TEST *1 Test 7 NC No connection 8 VCC Power supply *1. Connect to GND or V CC. Remark See Dimensions for details of the package drawings. SK DI 8-Pin SOP(JEDEC) Top view Figure 2 VCC NC TEST GND Table 2 Pin Number Pin Name Function 1 Chip select input 2 SK Serial clock input 3 DI Serial data input 4 Serial data output 5 GND Ground 6 TEST *1 Test 7 NC No connection 8 VCC Power supply *1. Connect to GND or V CC. Remark See Dimensions for details of the package drawings. 2 Seiko Instruments Inc.

3 Rev.1.2_ CMOS SERIAL E 2 PROM Block Diagram Memory array Address decoder VCC GND DI Data register Output buffer Mode decode logic SK Clock generator Figure 3 Instruction Set Instruction Start Bit Operation Code Table 3 S-2953A Address S-2963A READ (Read data) 1 1 A9 to A xa1 to A D15 to D Output *1 WRITE (Write data) 1 1 A9 to A xa1 to A D15 to D Input ERASE (Erase data) 1 11 A9 to A xa1 to A EWEN (Program enable) 1 11xxxxxxxx 11xxxxxxxxxx EWDS (Program disable) 1 xxxxxxxx xxxxxxxxxx X : Doesn t matter. *1. Addresses are continuously incremented. Absolute Maximum Ratings Data Table 4 Parameter Symbol Ratings Unit Power supply voltage V CC.3 to +7. V Input voltage V IN.3 to V CC +.3 V Output voltage V OUT.3 to V CC V Storage temperature under bias T bias 5 to +95 C Storage temperature T stg 65 to +15 C Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. Seiko Instruments Inc. 3

4 CMOS SERIAL E 2 PROM Rev.1.2_ Recommended Operating Conditions Table 5 Parameter Symbol Conditions Min. Typ. Max. Unit Power supply voltage READ/WRITE/ERASE V CC EWEN/EWDS V High level input voltage V IH V CC = 2.5 to 5.5 V.8 Vcc Vcc V V CC = 1.8 to 2.5 V.8 Vcc Vcc V Low level input voltage V IL V CC = 2.5 to 5.5 V.2 Vcc V V CC = 1.8 to 2.5 V.15 Vcc V Operating temperature T opr C Pin Capacitance Table 6 (Ta=25 C, f=1. MHz, V CC =5 V) Parameter Symbol Conditions Min. Typ. Max. Unit Input Capacitance C IN V IN = V 8 pf Output Capacitance C OUT V OUT = V 1 pf Endurance Table 7 Parameter Symbol Min. Typ. Max. Unit Endurance N W 1 6 cycles/word 4 Seiko Instruments Inc.

5 Rev.1.2_ CMOS SERIAL E 2 PROM DC Electrical Characteristics Table 8 Parameter Smbl Conditions V CC =4.5 to 5.5 V V CC =2.5 to 4.5 V V CC =1.8 to 2.5 V Unit Current consumption (READ) Current consumption (PROGRAM) Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. I CC1 unloaded ma I CC2 unloaded ma Table 9 Parameter Smbl Conditions V CC =4.5 to 5.5 V V CC =2.5 to 4.5 V V CC =1.8 to 2.5 V Unit Standby current consumption Input leakage current Output leakage current Low level output voltage High level output voltage Write enable latch data hold voltage I SB =GND =Open Connected to V CC or GND Min. Typ. Max. Min. Typ. Max. Min. Typ. Max µa I LI V IN =GND to V CC µa I LO V OUT =GND to V CC µa V OL CMOS I OL = 1 µa.1.1 V V OH CMOS Vcc=2.5 to 5.5 V : I OH = 1 µa Vcc=1.8 to 2.5 V : I OH = 1 µa V DH Only when write disable mode V CC.7 V CC.7 V CC.3 V V Seiko Instruments Inc. 5

6 CMOS SERIAL E 2 PROM Rev.1.2_ AC Electrical Characteristics Table 1 Input pulse voltage Output reference voltage Output load.1 V CC to.9 V CC.5 V CC 1 pf Table 11 Parameter Symbol V CC =4.5 to 5.5 V V CC =2.5 to 4.5 V V CC =1.8 to 2.5 V Unit Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. setup time t S µs hold time t H µs deselect time t CDS µs Data setup time t DS µs Data hold time t DH µs Output delay t PD µs Clock frequency f SK MHz Clock pulse width t SKH, t SKL µs Output disable time t HZ1, t HZ µs Output enable time t SV µs Programming time t PR ms t S t CDS t SKH t SKL t H SK t DS t DH t DS t DH DI Valid data Valid data t PD t PD (READ) t SV t HZ2 t HZ1 (VERIFY) Figure 4 Timing Chart 6 Seiko Instruments Inc.

7 Rev.1.2_ CMOS SERIAL E 2 PROM Operation Instructions (in the order of start-bit, instruction, address, and data) are latched to DI in synchronization with the rising edge of SK after goes high. A start-bit can only be recognized when the high of DI is latched to the rising edge of SK when goes from low to high, it is impossible for it to be recognized as long as DI is low, even if there are SK pulses after goes high. Any SK pulses input while DI is low are called "dummy clocks". Dummy clocks can be used to adjust the number of clock cycles needed by the serial IC to match those sent out by the CPU. Instruction input finishes when goes low, where it must be low between commands during t CDS. All input, including DI and SK signals, is ignored while is low, which is stand-by mode. 1. Read The READ instruction reads data from a specified address. After A is latched at the rising edge of SK, output changes from a high-impedance state () to low level output. Data is continuously output in synchronization with the rise of SK. When all of the data (D15 to D) in the specified address has been read, the data in the next address can be read with the input of another SK clock. Thus, it is possible for all of the data addresses to be read through the continuous input of SK clocks as long as is high. The last address (An A1 A = 1 11) rolls over to the top address (An A1 A = ). SK DI 1 1 A9 A8 A7 A6 A5 A4 A3 A2 A1 A D15 D14 D13 D2 D1 D D15 D14 D13 D2 D1 D D15 D14 D13 A 9A 8A 7A 6A 5A 4A 3A 2A 1A +1 A 9A 8A 7A 6A 5A 4A 3A 2A 1A +2 Figure 5 Read Timing (S-2953A) SK DI 1 1 X A1 A9 A8 A7 A6 A5 A4 A3 A2 A1 A D15 D14 D13 D12 D D15 D14 D13 D2 D1 D D15 D14 D13 A 1A 9A 8A 7A 6A 5A 4A 3A 2A 1A +1 A 1A 9A 8A 7A 6A 5A 4A 3A 2A 1A +2 Figure 6 Read Timing (S-2963A) Seiko Instruments Inc. 7

8 CMOS SERIAL E 2 PROM Rev.1.2_ 2. Write (WRITE, ERASE) There are two write instructions, WRITE and ERASE. Each automatically begins writing to the non-volatile memory when goes low at the completion of the specified clock input. The write operation is completed in 1 ms (t PR Max.), and the typical write period is less than 4 ms. In the S- 2953A / 63A series, it is easy to VERIFY the completion of the write operation in order to minimize the write cycle by setting to high and checking the pin, which is low during the write operation and high after its completion. This VERIFY procedure can be executed over and over again. There are two methods to detect a change in the output. One is to detect a change from low to high setting to high, and the other is to detect a change from low to high as a result of repetitious operations of returning the to low after setting to high and checking the output. Because all SK and DI inputs are ignored during the write operation, any input of instruction will also be disregarded. When outputs high after completion of the write operation or if it is in the high-impedence state (), the input of instructions is available. Even if the pin remains high, it will enter the high-impedence state upon the recognition of a high of DI (start-bit) attached to the rising edge of an SK pulse. (see Figure 3). DI input should be low during the VERIFY procedure. 2.1 WRITE This instruction writes 16-bit data to a specified address. After changing to high, input a start-bit, op-code (WRITE), address, and 16-bit data. If there is a data overflow of more than 16 bits, only the last 16-bits of the data is considered valid. Changing to low will start the WRITE operation. It is not necessary to make the data "1" before initiating the WRITE operation. t CDS VERIFY SK DI 1 A9 A8 A7 A6 A5 A4 A3 A2 A1 A D15 D t SV t PR busy ready t HZ1 Figure 7 Write Timing (S-2953A) t CDS VERIFY SK DI 1 X A1 A9 A8 A7 A6 A5 A4 A3 A2 A1 A D15 D t SV t PR busy ready t HZ1 Figure 8 Write Timing (S-2963A) 8 Seiko Instruments Inc.

9 Rev.1.2_ CMOS SERIAL E 2 PROM 2.2 ERASE This command erases 16-bit data in a specified address. After changing to high, input a start-bit, op-code (ERASE), and address. It is not necessary to input data. Changing to low will start the ERASE operation, which changes every bit of the 16 bit data to "1". t CDS VERIFY SK DI 1 1 A9 A8 A7 A6 A5 A4 A3 A2 A1 A t SV t PR busy ready t HZ1 Figure 9 ERASE Timing (S-2953A) t CDS VERIFY SK DI 1 1 X A1 A9 A6 A7 A6 A5 A4 A3 A2 A1 A t SV t PR busy ready t HZ1 Figure 1 ERASE Timing (S-2963A) Seiko Instruments Inc. 9

10 CMOS SERIAL E 2 PROM Rev.1.2_ 3. Write enable (EWEN) and Write disable (EWDS) The EWEN instruction puts the S-2953A / 63A series into write enable mode, which accepts WRITE and ERASE instructions. The EWDS instruction puts the S-2953A / 63A series into write disable mode, which refuses WRITE and ERASE instructions. The S-2953A / 63A series powers on in write disable mode, which protects data against unexpected, erroneous write operations caused by noise and/or CPU malfunctions. It should be kept in write disable mode except when performing write operations, after power-on and before shut-down. SK DI EWEN= 1 1 EWDS= X X8 X Figure 11 EWEN/EWDS Timing (S-2953A) SK DI EWEN= 1 1 EWDS= DI X X1 X Figure 12 EWEN/EWDS Timing (S-2963A) 1 Seiko Instruments Inc.

11 Rev.1.2_ CMOS SERIAL E 2 PROM Receiving a Start-Bit A start bit can be recognized by latching the high level of DI at the rising edge of SK after changing to high (Start-bit Recognition). The write operation begins by inputting the write instruction and setting to low. The pin then outputs low during the write operation and high at its completion by setting to high (Verify Operation). Therefore, only after a write operation, in order to accept the next command by having go high, the pin switch from a state of high-impedence to a state of data output; but if it recognizes a start-bit, the pin returns to a state of high-impedence (see Figure 4). Three-wire Interface (DI- direct connection) Although the normal configuration of a serial interface is a 4-wire interface to, SK, DI, and, a 3-wire interface is also a possibility by connecting DI and. However, since there is a possibility that the output from the serial memory IC will interfere with the data output from the CPU with a 3-wire interface, install a resistor between DI and in order to give preference to data output from the CPU to DI(See Figure 13). CPU S-2953A / 2963A SIO DI R : 1 to 1 kω Figure 13 Please refer Application Note CMOS SERIAL E 2 PROM TIPS, TRICKS AND TRAPS WHEN USING THE S-29 SERIES AND S-93CxxA SERIES for equivalent circuit of each pin. Product code structure S-29X3A XXXX Package name DPA : DIP DFJA : SOP Product name S-2953A : 16K bit S-2963A : 32K bit Precaution Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic protection circuit. Seiko Instruments Inc. 11

12 CMOS SERIAL E 2 PROM Rev.1.2_ Characteristics 1. DC Characteristics 1.1 Current consumption (READ) I CC1 1.2 Current consumption (READ) I CC1 I CC1.4.2 Vcc=5.5 V fsk=1 MHz DATA=11 I CC1.4.2 Vcc=3.3 V fsk=5 khz DATA= Current consumption (READ) I CC1 1.4 Current consumption (READ) I CC1 Power supply voltage V CC I CC1.4.2 Vcc=1.8 V fsk=1 khz DATA=11 I CC1.4.2 Ta=25 C fsk=1 MHz, 5 khz DATA=11 1 MHz 1.5 Current consumption (READ) I CC1 Power supply voltage V CC 5 khz Vcc[V] 1.6 Current consumption (READ) I CC1 Clock frequency f SK I CC1.4.2 Ta=25 C fsk=1 khz, 1 khz DATA=11 1 khz I CC1.4.2 Vcc=5.5 V Ta=25 C DATA=11 1 khz Vcc[V] f SK [Hz] 12 Seiko Instruments Inc.

13 Rev.1.2_ CMOS SERIAL E 2 PROM 1.7 Current consumpion (PROGRAM) I CC2 Ambient temprature Ta 1.8 Current consumption (PROGRAM) I CC Vcc=5.5 V Vcc=3.3 V I CC2.5 I CC Current consumption (PROGRAM)I CC2 1.1 Current consumption (PROGRAM) I CC2 Power supply voltage V CC Vcc=1.8 V Ta=25 C I CC2.5 I CC Stand by current consumption I SB Vcc[V] 1.12 Input leakege current I LI Ambient temprature Ta I SB [A] 1E 5 1E 6 1E 7 1E 8 1E 9 1E 1 1E 11 Vcc=5.5 V 1E 12 I LI [µa] Vcc=5.5 V, SK, DI TEST= V Seiko Instruments Inc. 13

14 CMOS SERIAL E 2 PROM Rev.1.2_ 1.13 Input leakege current I LI Ambient temprature Ta 1.14 Output leakege current I LO Vcc=5.5 V, SK, DI, TEST=5.5 V Vcc=5.5 V = V I LI [µa].5 I LO [µa] Output leakege current I LO Ambient temprature Ta 1.16 High level output voltege V OH Vcc=5.5 V =5.5 V Vcc=4.5 V I OH = 1 µa I LO [µa].5 V OH [V] High level output voltage V OH High level output voltage V OH Vcc=2.7 V I OH = 1 µa Vcc=2.5 V I OH = 1 µa V OH [V] 2.6 V OH [V] Seiko Instruments Inc.

15 Rev.1.2_ 1.19 High level output voltage V OH 1.2 Low level output voltage V OL CMOS SERIAL E 2 PROM Vcc=1.8 V I OH = 1 µa.4.3 Vcc=4.5 V I OL =1 µa V OH [V] 1.8 V OL [V] Low level output voltage V OL 1.22 High level output current I OH Ambient temprature Ta Vcc=1.8 V I OL =1 µa 2 Vcc=4.5 V V OH =2.4 V V OL [V].2.1 I OH High level output current I OH 1.24 High level output current I OH 6 4 Vcc=2.7 V V OH =2. V 6 4 Vcc=2.5 V V OH =1.8 V I OH 2 I OH Seiko Instruments Inc. 15

16 CMOS SERIAL E 2 PROM Rev.1.2_ 1.25 High level output current I OH 1.26 Low level output current I OL Ambient temerature Ta Vcc=1.8 V V OH =1.6 V 3 2 Vcc=4.5 V V OL =.4 V I OH.5 I OL Low level output current I OL 1.28 Input inversion voltage V INV Power supply voltage V CC Vcc=1.8 V V OL =.1 V Ta=25 C, SK, DI I OL.5 V INV [V] Input inversion voltage V INV Vcc[V] 4 3 Vcc=5.5 V, SK, DI V INV [V] Seiko Instruments Inc.

17 Rev.1.2_ CMOS SERIAL E 2 PROM 2. AC Characteristics 2.1 Maximum operation frequency f Max Power supply voltage V CC 2.2 Program time T PR Power supply voltage V CC Ta=25 C 6. Ta=25 C f MAX [Hz] 1 5 T PR [ms] Vcc[V] 2.3 Program time T PR Vcc[V] 2.4 Program time T PR 6 Vcc=5. V 6 Vcc=3. V T PR [ms] 4 T PR [ms] Program time T PR 2.6 Data output delay time T PD 6 Vcc=1.8 V.4 Vcc=4.5 V T PR [ms] 4 2 T PD [ µ s] Ta[ C] Seiko Instruments Inc. 17

18 CMOS SERIAL E 2 PROM Rev.1.2_ 2.7 Data output delay time T PD 2.8 Data output delay time T PD.8.6 Vcc=2.7 V Vcc=1.8 V T PD [µs].4 T PD [µs] Seiko Instruments Inc.

23 The information described herein is subject to change without notice. Seiko Instruments Inc. is not responsible for any problems caused by circuits or diagrams described herein whose related industrial properties, patents, or other rights belong to third parties. The application circuit examples explain typical applications of the products, and do not guarantee the success of any specific mass-production design. When the products described herein are regulated products subject to the Wassenaar Arrangement or other agreements, they may not be exported without authorization from the appropriate governmental authority. Use of the information described herein for other purposes and/or reproduction or copying without the express permission of Seiko Instruments Inc. is strictly prohibited. The products described herein cannot be used as part of any device or equipment affecting the human body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus installed in airplanes and other vehicles, without prior written permission of Seiko Instruments Inc. Although Seiko Instruments Inc. exerts the greatest possible effort to ensure high quality and reliability, the failure or malfunction of semiconductor products may occur. The user of these products should therefore give thorough consideration to safety design, including redundancy, fire-prevention measures, and malfunction prevention, to prevent any accidents, fires, or community damage that may ensue.

Drawing code Package Tape Reel 8-Pin DIP DP008-F 8-Pin SOP(JEDEC) FJ008-A FJ008-D FJ008-D 8-Pin TSSOP FT008-A FT008-E FT008-E

Drawing code Package Tape Reel 8-Pin DIP DP008-F 8-Pin SOP(JEDEC) FJ008-A FJ008-D FJ008-D 8-Pin TSSOP FT008-A FT008-E FT008-E Rev. 3.2_ CMOS SERIAL E 2 PROM Features The is a high speed, low current consumption, 8 K-bit serial E 2 PROM with a wide operating voltage range. It is organized as 512-word 16-bit respectively. Each