THREADS ADMINISTRIVIA RECAP ALTERNATIVE 2 EXERCISES PAPER READING MICHAEL ROITZSCH 2

Transcription

1 Department of Computer Science Institute for System Architecture, Operating Systems Group THREADS ADMINISTRIVIA MICHAEL ROITZSCH 2 EXERCISES due to date and room clashes we have to divert from our regular schedule: there was no exercise last week there is no exercise on Oct 31st moved to Nov 7th there is no exercise tomorrow alternative 1: this Friday, 1.00 PM, INF E06 alternative 2: postpone and reorder ALTERNATIVE 2 Nov 7th: practical getting started exercise (room will be announced) Nov 14th: Brinch-Hansen paper reading Nov 28th: paper reading Dec 5th: practical exercise IPC Dec 12th: paper reading Jan 9th: practical exercise Bastei Jan 23rd: paper reading 3 4 PAPER READING read the paper for the exercise: Per Brinch-Hansen: The nucleus of a multiprogramming system you find the link on the course website understand it be prepared to summarize it be prepared to discuss it RECAP 5 6

2 kernel: provides system foundation MICROKERNEL usually runs in privileged CPU mode microkernel: kernel provides mechanisms, no policies most functionality implemented in user mode, unless dictated otherwise by security performance 7 ABSTRACTIONS Resource Mechanism CPU Thread Memory Task Communication IPC Platform Virtual Machine 8 VIRTUAL MACHINE provides an exclusive instance of a full system platform may be a synthetic platform (bytecode) full software implementations hardware-assisted implementations in the kernel (hypervisor) see virtualization lecture on Dec 11th inter-process communication between threads two-way agreement, synchronous short IPC: register only long IPC: direct and indirect memory mapping with flexpages see communication lecture on Nov 6th IPC 9 10 TASK (virtual) address space unit of memory management provides spatial isolation common memory content can be shared shared libraries kernel see memory lecture next week 4G 0 ALTERNATIVES user shared system privileged Monolith Exokernel Microkernel Software Isolation 11 12

3 THREADS abstraction of code execution unit of scheduling provides temporal isolation typically requires a stack thread state: instruction pointer stack pointer CPU registers, flags BASICS CPU IP SP Regs Stack Code storage for function-local data local variables return address one stack frame per function grows and shrinks dynamically grows from high to low addresses STACK Stack Frame 1 Stack Frame 2 Stack Frame 3 KERNEL S VIEW maps user-level threads to kernel-level threads usually a 1:1 mapping threads can be implemented in userland assigns threads to hardware one kernel-level thread per logical CPU with hyper-threading & multicore, we have more than one hardware thread now KERNEL ENTRY KERNEL ENTRY CPU SP IP Regs Stack Code thread can enter kernel: voluntarily system call forced interrupt exception CPU SP IP Regs Code Stack Stack Code IP and SP point into kernel user CPU state stored in TCB old IP and SP registers flags FPU state MMX, SSE 17 18

4 thread control block kernel object, one per thread stores thread s state while it is not running untrusted parts can be stored in user space separation into KTCB and UTCB TCB KERNEL EXIT once the kernel has provided its services, it returns back to userland by restoring the saved user IP and SP to the same thread or a different thread the old thread may be blocking now waiting for some resource returning to a different thread might involve switching address spaces BASICS scheduling describes the decision, which thread to run on a CPU at a given time SCHEDULING When do we schedule? current thread blocks or yields time quantum expired How do we schedule? RR, FIFO, RMS, EDF based on thread priorities POLICY QUANTA scheduling decisions are policies should not be in a microkernel L4 has facilities to implement scheduling in user land each thread has an associated preempter kernel sends an IPC when thread blocks preempter tells kernel where to switch to no efficient implementation yet scheduling is the only policy still in L4 a thread s time quantum defines the time it owns the CPU before it is preempted preemption is the process of (involuntarily) blocking a thread in favor of another one flavors of time quanta time slices for round robin scheduling execution time budgets for real-time time quanta get replenished 23 24

5 scheduling in L4 is based on thread priorities time-slice-based round robin within the same priority level kernel manages priority and timeslice as part of the thread state Fiasco has some additional real-time scheduling see scheduling lecture on Dec 4th L4 thread 1 is a high priority driver thread, waiting for an interrupt (blocking) thread 2 and 3 are ready with equal priority hardware thread threads 2 and 3 get their time slice filled scheduler selects 2 to run thread 1 becomes ready (device interrupt arrived) its time slice is filled thread 2 is preempted thread 1 blocks again (interrupt handled, waiting for next) thread 2 has time left thread 2 s time slice has expired scheduler selects the next thread on the same priority level (round robin) 29 30

6 BASICS synchronization used for SYNCHRONIZATION mutual exclusion producer-consumer-scenarios traditional approaches that do not work spinning, busy waiting disabling interrupts ATOMIC OPS EXPECTATION for concurrent access to data structures use atomic operations to protect manipulations only suited for simple critical sections in critical section in critical section SOLUTION SEMAPHORES Serializer Thread in critical section in critical section serializer and atomic operations can be combined to a nice counting semaphore semaphore shared counter for correctness wait queue for fairness down (P) and up (V) operation semaphore available iff counter >

7 SEMAPHORES counter increments and decrements using atomic operations when necessary, call semaphore thread to block/unblock and enqueue/dequeue Semaphore Thread down down enqueue and block up dequeue and unblock up 37 BENEFITS cross-task semaphores, when counter is in shared memory IPC only in the contention case good for mutual exclusion when contention is rare for producer-consumer-scenarios, contention is the common case solution for small critical sections in scheduling lecture 38 INTRODUCTION NOVA NOVA is a research microhypervisor currently developed by Udo Steinberg explore technologies for a small and robust platform that hosts: legacy operating systems native NOVA applications FEATURES Mechanism L4 NOVA Thread Task IPC Virtual Machine KERNEL STYLES Process-Style Interrupt-Style one kernel stack per thread one kernel stack per CPU context switch: save state context switch: switch to of current thread, discard stack of target thread stack, restore state of target thread state retained on stack at switch time can switch anytime target thread resumes at last context switch point Fiasco, Linux state must be serializable at switch time all state made explicit target thread resumes with empty stack in continuation function NOVA 41 42

8 RECAP repeated basic microkernel concepts tasks, threads, IPC closer look on threads TCB, kernel entry scheduling time quantum, priorities, preemption synchronization atomic ops, serializer thread, semaphore next up: memory management 43