Using ARM ETB with TI CCS. CCS 3.3 with SR9 on TMS320DM6446

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Meghan Hudson
6 years ago
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1 Using ARM ETB with TI CCS CCS 3.3 with SR9 on TMS320DM6446 1

2 ETB Usage Brief Tutorial 1. Setup CCS setup configuration to include the ETB. 2. Connect to the target (including the ETB) 3. Select the ETB as the Receiver type in the XDS560 Trace system control panel. (Tools XDS560 Trace Control) 4. Turn the trace system ON by going to the Unified Breakpoint Manager (Debug Breakpoints) and create a Trace operation. Select the action to be Trace ON and check the box for Program Address and Data. Enable the action and submit it. The trace system is ready! 5. Run your program to collect trace. If you know your point of failure, halt the core at that point. By default, the trace system will start/stop with the core. This means that every Run, Step, and Halt operation will refresh the Trace Display with trace information. 2

3 Make sure your CCS Setup includes the ETB 3

4 Parallel Debug Manager (PDM) on startup 4

5 Parallel Debug Manager (PDM) on startup 1. Select the target. 2. Choose Connect 3. Open the ARM processor CCS View 5

6 Parallel Debug Manager (PDM) on startup 1. Select the target. 2. Choose Connect 3. Open the ARM processor CCS View 6

7 Parallel Debug Manager (PDM) on startup 1. Select the target. 2. Choose Connect 3. Open the ARM processor CCS View 7

8 Choose Trace Control to select ETB as Receiver 8

9 Select Trace Recevier to be ETB Choose Receiver to select Trace collection method Select ETB 9

10 Select Breakpoints to turn the Trace system on. Can also do this through Tools XDS560 Trace Setup 10

11 The Unified Breakpoint Manager (UBM) is now available. Choose New 11

12 Select Trace 12

13 The Trace properties page is available. Click the + sign to choose when trace action (Start/Stop) as well as the type of tracing (program, data, etc. ) 13

14 Select + on what to trace to select Program and Data Note that different start/stop events can be used. 14

15 Select Program Trace Check the Enable box. 15

16 Click the Submit button to submit this trace job to the system. 16

17 Trace with ETB At this point, the ETB system is setup and is collecting trace. By default, the trace system will start/stop when Code Composer Studio (CCS) starts and stops the CPU. It is possible to choose different start/stop events for tracing, as these are based on the Advanced Event Triggering capabilities of the device (AET). 17

18 Trace Display is available under Tools XDS560 Trace Trace Display 18

19 Once you halt the processor, the Trace display will refresh with trace information. Choose Fields to select what is displayed. Right click-and choose source to setup the source code correlation. One display shows the current line, and the second display shows the C file for that line. 19

20 By filtering for source code only, we can see the C code that the processor executed. 20

21 With Data trace enabled, we can wee the processor load address and values. This is useful for checking whether the address is correct (pointer problems) and to validate the data values. 21

22 The trace information can be saved for later viewing and analysis. In this case, I am looking at the data accesses for a particular function. 22

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$file://c:\documents and Settings\degrysep\Local Settings\Temp\~hh607E.htm$ Page 1 of 18 Trace Tutorial Overview The objective of this tutorial is to acquaint you with the basic use of the Trace System software. The Trace System software includes the following: The Trace Control