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The C8051F91x/0x product family is designed to dramatically increase battery lifetime which is the number one requirement for most battery powered applications. The C8051F91x has the industry s lowest active mode current consumption which saves power when the application is running and also has the industry s lowest current consumption sleep modes that save power when the device is sleeping. The sleep mode is typically the main operating mode of battery powered applications. There is an increasing number of applications and regulations demanding lower power and energy saving modes and the C8051F91x/0x is a perfect fit to meet these needs. With its high speed core, advanced analog peripherals, smaller memory size and compact package, the C8051F912 hits the sweet spot for volume applications requiring precision analog and low power. As an example, the C8051F912 is a perfect fit for sensor applications that require tiny footprint, ultra-low power and a high resolution ADC to sample the sensor outputs. In addition, the C8051F912, which includes a high resolution 12-bit ADC, dc-dc converter, multiple comparators, internal oscillators, temperature sensor, and 6-bit idac, integrates many components customers would normally have to populate externally saving cost, board space and simplifying the design. The C80512F91x/0x integrates a highly efficient dc-dc converter capable of operation down to 0.9 V, thus enabling customers to lower their system cost and reduce board space by moving to a single cell battery implementation. The integrated dc-dc converter is capable of driving external components such as LEDs, sensors or transceivers up to 65 mw and has a programmable output voltage ranging from 1.8 to 3.3 V. 2
Let s first take a look at power consumption and its relationship to voltage and frequency. The equation for power consumption of the MCU as it relates to supply voltage is shown above. From the equation it can be seen that the power increases proportionally to the frequency and the square of the supply voltage. The plot shown is obtained by maintaining a constant frequency and varying the supply voltage. As the supply increases the power consumption is increased by the square of the voltage. Why is this a concern? When a battery is fully charged it is near the maximum supply voltage which would cause the system to consume higher power and drain the battery faster. This is typical of many MCUs on the market today. The C8051F9xx family integrates both a low dropout regulator (LDO) and a DC- DC boost converter. We will take a look at the effects of each next. 3
Here we see the effects of integrating the LDO into the MCU. Adding the LDO maintains a constant current independent of the supply voltage illustrated by the term, CV LDO F. The plot shows the new power curve which is now linear with respect to the supply voltage and is reduced over the original curve. Even with the addition of the quiescent current of the LDO the power consumption is improved. 4
Here we see the effect of integrating the DC-DC converter. By adding the DC-DC converter the supply voltage and the supply current to the MCU is held constant. This resolves the power curve to a single point instead of the previous conditions discussed and the DC-DC output voltage can be held to a voltage that minimizes the power consumption. This can be seen in the plot denoted by the star. Now when the battery is fully charged the MCU consumes the minimum amount of power. 5
Both consumers and manufacturers are demanding products have longer battery lifetime for many reasons including increasing time between battery changes, saving money on battery replacement, being environmentally friendly, and passing tougher energy regulations. Silicon Labs C8051F91x provides longer battery lifetime by focusing on reducing power consumption in all modes of operation. The C8051F91x family has the industry s lowest sleep current, saving power during periods of inactivity, while waking quickly, which minimizes energy waste during the active mode transition. The C8051F91x s low power ADC with burst mode can take analog measurements while the CPU is off further saving energy. Lastly, in addition to consuming the lowest current per MHz, a common industry specification, the C8051F91x/0x is unique in that it employs an integrated low drop-out regulator (LDO) to keep the current constant at 160 ua / MHz in the operating range of 1.8-3.6 V. The graph at the bottom shows the average battery lifetime of a typical sensor application versus time. It uses a typical sensor application operating model of waking up every ½ second, using the ADC to capture the sensor s output, performing a series of calculations and going back to sleep. As you can see from the graph the C8051F912 increases battery lifetime by 2-3 times versus its closest competitors. This translates into a >50% reduction in battery costs and reduced consumer hassle. 6
There were a lot of innovations for the C8051F9xx family developed specifically for low power. This chart shows some new low power features and the impact that it has on the three key operating modes. To reduce the overall power consumption the application remains in the sleep mode as long as possible, wakes as fast as possible and goes back to the sleep mode when finished. For low duty cycle applications the ultra low power sleep mode is the main operating state and the current draw in this mode is the primary contributor to the average current. For higher duty cycle applications the wake-up time, CPU/peripheral current consumption and speed are the dominant factors in the average power equation. Consult the data sheet for the specific devices to see all of the new features added. 7
The C8051F91x/0x uses innovative techniques and advanced IP blocks in order to achieve maximum power savings. The low drop-out regulator (LDO) is key to increasing battery lifetime because it enables the C8051F912 to maintain a low, constant active current over the full operating voltage range. For example, in 2 x AA/AAA and coin cell battery applications, the batteries operate near their 3 volt initial voltage most often. Unfortunately for the competition, their MCUs consume around 50% more current when operating at 3 V compared to their 1.8 V minimum operating condition. As was shown earlier, this requires end-users to change batteries more frequently. The C80512F91x/0x integrates a highly efficient dc-dc converter capable of operation down to 0.9 V, thus enabling lower system cost by reducing board space when moving to a single cell battery implementation. The integrated dc-dc converter is capable of driving external components such as LEDs, sensors or transceivers up to 65 mw and has a programmable output voltage ranging from 1.8 to 3.3 V. In general, competing devices only operate down to 1.8 V and often have analog and CPU speed limitations below 2.2 V which further reduces battery lifetime. The C8051F912 implements an advanced power management unit (PMU) to limit leakage allowing for ultra-low sleep currents even when using standard 0.18 micron CMOS technology. Other devices on the market use 0.25 or 0.35 micron technology to reduced the sleep current at the expense of higher active current or use 0.18 micron technology to reduce the active current at the expense of poor sleep current. Only Silicon Labs C8051F9xx products can delivery both the ultra-low sleep and active currents necessary for a truly low power microcontroller. 8
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Here is a block diagram of the new C8051F9xx devices. The areas highlighted represent new features in the C8051F91x/90x family. 10
The first ultra low power MCU from Silicon Labs was released over two years ago and it remains one of the lowest power solutions on the market today. Now with the introduction of the latest C8051F9xx devices Silicon Labs offers the industries lowest power MCU. Here we see some of the enhancements made to the family. All of the power numbers have been reduced over the current family and some new sleep modes are now available. In addition to the internal power consumption numbers, system level design considerations can now be addressed by allowing the MCU wake up source to drive a wakeup to external devices. This is a useful feature when external components are in a low power sleep mode and need to wake up based on system level events, for example, a power supply that needs to start up. New power enhancements were also added. The DC-DC converter has a low power mode where the bias currents are substantially reduced, which can lead to an efficiency improvement with light load currents (generally less than a few ma). Another converter enhancement is the continuous input range from 0.9 V to 3.6 V. This provides the ability to connect most battery topologies. 11
The smartclock oscillator has integrated a low frequency oscillator that is set to 16.4 KHz. When using the low frequency oscillator as the clock source the count value counts by two effectively providing a 32.8 KHz timer. The C8051F91x also provides the capability to drive the smartclock to a GPIO pin and can also drive the PCA clock input. The ADC resolution on the C8051F91x/90x devices has increased from 10 bit to 12 bits to provide more accuracy for analog measurements. In addition, the VREFturn on time has been reduced to 1.5us. This performance is critical in low power applications requiring analog measurements as it allows the system to enter the ultra low power sleep mode faster, thus consuming less current. 12
The mission when designing the C8051F91x/0x product family was to significantly reduce the amount of energy needed for typical battery operated devices. In order to accomplish that goal the C8051F912 needed to offer the lowest power sleep and active modes, operate over the full battery range, and wake-up quickly. Having ultra-low sleep current is vital for applications with a small power budget. Systems with battery-operated wireless nodes (RFID, security, smart metering, etc.) wake up periodically, quickly perform measurements, transmit data and then go back to sleep to conserve power. In sleep modes the C8051F91x/0x enters an ultra-low current state, preserving the contents of all the registers and SRAM. The real-time clock (RTC) is active so the MCU can wake up periodically using either the internal low power oscillator (C8051F912/02 only) or an external crystal source. Many products wake up periodically to sample a sensor output using the on-chip ADC. It is important to allow enough time for the analog circuitry to settle in order to take a valid ADC measurement. The C8051F912 can wake-up from the sleep mode with the analog circuitry settled in less than 2 us. That is 15 times faster than the closest competitor allowing the C8051F912 to capture the necessary sensor output and go back to sleep before the competition can start a valid capture. Lastly, the C8051F912 requires half the current consumption compared to the competition when operating with new batteries (3.0V). This eco-friendly benefit provides for much longer battery lifetime. 13
This chart shows the voltage supply range of single battery cells and combinations of battery cells. In the earlier C8051F9xx families there was a gap in the input operating range of the supplies for the device. This was due to the fact that the supply range was configured through the pin settings of the device. In one cell mode the upper limit to the supply was 1.8 V and the lower limit was 0.9 V. In the two cell mode the lower limit was 1.8 V. With some of the new devices in the C8051F9xx family the input voltage can span the entire input supply range from 0.9 V to 3.6 V. 14
These charts compare power consumption of C8051F900 with the integrated LDO with a competing low power MCU. The core voltage of the C8051F9xx is a constant 1.8V and the core current is a constant 160uA / MHz, regardless of the operating voltage. This is reduced from 170uA / MHz and is still lower than the competition. Because power is the product of voltage and current, the power savings are exponential. 15
One of the key differentiators for the C8051F9xx family is the integration of both an LDO and a DC-DC boost converter. This provides the capability of operating all the way down to 0.9V and the ability to use one or two batteries. By integrating these components the F9xx family has a flat current vs. supply voltage curve. The internal voltage regulator (VREG0) is used to regulate the internal core supply to 1.8 V from a VDD/DC+ supply of 1.8V to 3.6V. C8051F9xx devices include an onchip dc-dc converter to allow operation from a single cell battery with a supply voltage as low as 0.9 V. The dc-dc converter is a switching boost converter with an input voltage range of 0.9 to 1.8 V and a programmable output voltage range of 1.8 to 3.3 V. The default output voltage is 1.9 V. The dc-dc converter can supply the system with up to 65 mw of regulated power and can be used for powering other devices in the system. This allows the most flexibility when interfacing to sensors and other analog signals which typically require a higher supply voltage than a single-cell battery can provide. When operating from a single 1.5 V battery, the VDD/DC+ supply is generated by the DC-DC converter. Any supply voltage that is less than the DC-DC converter output voltage puts it into boost mode. On the devices that operate over the full input voltage range (C8051F912/02) the DC-DC converter enters a bypass mode when the voltage is above the output voltage and the diode bypass switch remains on. The output voltage will be equal to the input voltage minus any resistive loss in the switch and all of the converter s analog circuits will remain biased. 16
For single battery applications, other devices need to use a standalone dc-dc converter. It is not possible to switch off an external boost converter, otherwise the MCU can never wake-up from sleep. Therefore, there is a big advantage in sleep mode current when the dc-dc converter is integrated on-chip. We know that the C8051F900 can deliver a total power level of 65mW. If the application needs more, it is still very efficient to use C8051F900 with an external dc-dc converter because the C8051F900 will allow the external dc-dc converter to be switched completely off; other MCUs will not allow this. 17
Here is a chart showing the active mode power advantage of the C8051F9xx family compared to another low power MCU. These values are obtained by determining the power consumption as it relates to the frequency sensitivity. The chart is a representation of the power at the rated voltage and then normalizes the values to the highest power consumption. For example, looking at the first MCU at a 2.5V supply and frequency sensitivity of 305 ua/mhz the power consumed is 763 uw/mhz (2.5V * 305 ua/mhz). The C8051F91x/90x devices have an active mode power consumption across the entire operating supply voltage range of 160uA/MHz. You can see from the table how this leads to a much more efficient system, and in this case the power consumption is cut in half from the initial condition. 18
A priority for battery-operated products is to decrease power consumption to either extend the product s lifetime or reduce the battery size and cost. No MCU is better at reducing power consumption than the C8051F91x/0x. The C8051F91x/0x has significantly lower current in sleep and active mode compared to any other MCU devices without the limitations like failing to write flash and failing to operate the ADC below 2.2 V. The higher active mode currents of some devices drain the battery faster when the MCU is operating. Higher sleep mode currents of some devices make the particular family a poor choice for applications where the MCU is not constantly running. 19
C8051F91x/90x devices include an ultra low power 32-bit SmaRTClock Peripheral (Real Time Clock) with alarm. The SmaRTClock has a dedicated 32 KHz oscillator that can be configured for use with or without a crystal. No external resistor or loading capacitors are required. The on-chip loading capacitors are programmable to 16 discrete levels allowing compatibility with a wide range of crystals. The SmaRTClock can operate directly from a 0.9 3.6 V battery voltage and remains operational even when the device goes into its lowest power sleep mode. On C8051F912/F902 devices, the SmaRTClock output can be buffered and routed to a GPIO pin to provide an accurate, low frequency clock to other devices while the MCU is in its lowest power down mode. C8051F912/F902 devices also support an ultra low power internal LFO that reduces sleep mode current. 20
As you can see, the system becomes more efficient the longer it stays in sleep mode. 50nA sleep currents with a 2uS wake up time are pretty compelling numbers. Combine these numbers with the fast execution of the single cycle core and all of the autonomous peripherals and you have a complete low power system on a chip solution from Silicon Labs. 21
The C8051F91x/0x expands the C8051F93x/2x ultra-low power product portfolio to offer lower memory devices. This new family is fully software and hardware compatible with the C8051F93x/2x. They share the same 4x4 mm footprint when using the 24pin QFN option. The main difference between the C8051F91x/0x and C8051F93x/2x is smaller flash and RAM memory sizes. Also, the C8051F912/902 have several new modes including a brownout detector bypass option, a lower power internal real-time clock and an enhanced ADC mode enabling 12-bit resolution. The C8051F9xx family comes in a variety of packaging including 32pin QFN, 32pin LQFP, 24pin QFN and 24pin QSOP. 22
Firmware development has become the greatest cost and worry in embedded system development. Silicon Labs continues to offer the easiest to use, professional development system at an affordable price. The engineer will be downloading code and debugging in literally minutes. The development kit comes complete with everything needed to download code and start developing within minutes. The target board provides an easy debug and programming interface, and allows the engineer to begin development and provide easy access to all of the C8051F912 pins. Silicon Labs also offers a C8051F912 ToolStick, which is a low cost way to evaluate the C8051F912 product family. 23
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Let s take a look at a good example of an MCU and what makes it a good choice for low power applications. The single cycle, pipelined C8051F9xx family of MCUs were designed for power efficiency. First, the active and inactive mode currents are excellent for these applications. 160uA/MHz active mode current at 24.5MHz operation means the processor can get a lot done in a short amount of time with excellent frequency sensitivity which was one of the key elements to a low power system. Compare this to other processors that can only achieve similar numbers at a much lower clock speed which increases the amount of time the processor is awake. In addition with other processors, as the clock frequency goes up so does the ua/mhz number. The other current number of interest was the sleep state current which was important because this is the state that a low power system will be in most of the time. At 300nA, 50nA and 10nA sleep mode currents the C8051F9xx is the lowest power MCU on the market. We also mentioned that the wake up time was an important factor in power efficient systems. The C8051F9xx family has several low power modes and have fast wake up times for each. You will see a 2-cell mode and a 1-cell mode in the slide. This is due to the fact that the C8051F9xx family can run all the way down to 0.9V which provides the capability to run on one battery. Even with the longer wake up time for that mode is still extremely competitive. 25
The last slide showed the MCU core features that make it a good choice for power efficient systems. Now let s take a look at what surrounds the core that also make it a great choice. We previously showed an example where the voltage reference had to turn on and stabilize in the given application and how the long turn on time of the reference was a contributing factor to an inefficient system design. In the C8051F9xx family the voltage reference is on and stable in less than 2us. In addition to that, the ADC is able to track the input during this time so that the complete conversion happens within the ADC conversion rate without the added latency of the turn on time. This feature helps to maximize the inactive mode of the system. Autonomous peripherals are those that can operate without CPU intervention and when the CPU is asleep. There are many autonomous peripherals on the C8051F9xx family. UARTs, SPI, SMBus and the ADC can all run without the CPU. The ADC can burst samples and accumulate them while the CPU is inactive since the clock is independent of the CPU clock. Typically an MCU has to either remain awake or wake up and get the samples and do the averaging function. 26
Visit the Silicon Labs Education Resource Center to learn more about the MCU products. 27
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