Slide Set 1 for ENCM 369 Winter 2014 Lecture Section 01 Steve Norman, PhD, PEng Electrical & Computer Engineering Schulich School of Engineering University of Calgary Winter Term, 2014 ENCM 369 W14 Section 01 Slide Set 1 slide 2/79 Contents About these slides Organization of a Simple Computer Introduction to the MIPS-32 Computer Architecture Introduction to MIPS registers, machine language and assembly language MIPS Assembly Language Programming: Getting Started ENCM 369 W14 Section 01 Slide Set 1 slide 3/79 Outline of Slide Set 1 ENCM 369 W14 Section 01 Slide Set 1 slide 4/79 About these slides About these slides Organization of a Simple Computer Introduction to the MIPS-32 Computer Architecture Introduction to MIPS registers, machine language and assembly language MIPS Assembly Language Programming: Getting Started This is the first of around ten large sets of slides that will be used for lectures in Section 01 of ENCM 369 in Winter 2014 It will usually take several lectures to get through a single set of slides For example, I expect that it will take about 5 1 lectures to get through this first set 2 Reading these slides online is not a good subsitute for attending lectures in most lectures I will do some important hand-written work using the document camera Please come to lectures prepared to take some notes ENCM 369 W14 Section 01 Slide Set 1 slide 5/79 Typographical conventions Either bold text or bright red text will be used for emphasis The typewriter font will usually be used for code in assembly language, C, or C++ (I might not use the typewriter font for code if it makes the code too wide to fit in a slide) Text in a box is a general description of what could appear within a piece of code Example: A C do statement has this syntax do statement while ( expression ); (Usually statement is a compound statement that starts with { and ends with } ) ENCM 369 W14 Section 01 Slide Set 1 slide 6/79 Typographical conventions: Italics Italics will be used two different ways One word or a few words in italics will be used to formally or informally define a term Example: A bit is the basic unit of information in a digital system; the value of a bit is either 0 or 1 An entire sentence in italics indicates a pause to elaborate a concept or solve a problem under the document camera Example: Let s translate the C statement into a sequence of assembly language instructions
ENCM 369 W14 Section 01 Slide Set 1 slide 7/79 Outline of Slide Set 1 ENCM 369 W14 Section 01 Slide Set 1 slide 8/79 Organization of a Simple Computer About these slides Organization of a Simple Computer Introduction to the MIPS-32 Computer Architecture Introduction to MIPS registers, machine language and assembly language Processor Bus Main Memory Device What is a bus? What is the role of the processor? MIPS Assembly Language Programming: Getting Started Device ENCM 369 W14 Section 01 Slide Set 1 slide 9/79 Organization of a Simple Computer: ENCM 369 W14 Section 01 Slide Set 1 slide 10/79 Main memory Bus Main Memory What does stand for? Main memory is a collection of electronic circuits that hold instructions and data of running programs (Hey, what s an instruction?) Processor Device Device What are examples of devices in laptop or desktop computers? What are examples of devices in embedded computers? Main memory in a desktop or laptop is RAM ( random access memory ), not the hard drive (Typically, the hard drive contains mostly files not currently in use by any running program) RAM is volatile storage information in RAM is lost when a computer is powered down ENCM 369 W14 Section 01 Slide Set 1 slide 11/79 Bytes ENCM 369 W14 Section 01 Slide Set 1 slide 12/79 Models of Engineering Systems A bit is the smallest possible item of digital data A bit has a value of 0 or 1 A byte is a collection of eight bits Example byte values, written in base two: 01101001 and 10001000 Unfortunately, bit and byte are very similar words be careful not to mix up their meanings! How many different bit patterns are possible for the value of a byte? Definition: A model is a simplified description of a system that allows people to understand and predict the behaviour of the system Often, models are collections of equations (especially differential equations) For computer systems, models are likely to be informal but detailed pictures and stories explaining how systems work
ENCM 369 W14 Section 01 Slide Set 1 slide 13/79 Models: Deeper Understanding and Better Prediction ENCM 369 W14 Section 01 Slide Set 1 slide 14/79 Simple model of main memory: A giant array of bytes Sometimes, an existing model can be enhanced made more accurate by adding details, such as extra terms in equations, or more complex stories about components Other times, an existing model is inaccurate about something important and the model has to be replaced with a new, better model There may be thousands or millions or billions of bytes in the array Each byte in the array has a unique address, which is just a number To advance from one byte to the next byte in memory, add 1 to the address A variable of type char* (pointer-to-char) in a C or C++ program is a container for the address of a byte ENCM 369 W14 Section 01 Slide Set 1 slide 15/79 Registers: Storage of bytes inside the processor A register is a storage location for one or more bytes (typically a group of two, four, or eight bytes) inside the processor So registers are NOT part of main memory, because main memory is external to the processor processor registers bus main memory device device ENCM 369 W14 Section 01 Slide Set 1 slide 16/79 Avoid using the word memory when describing a register! This can be confusing A register is definitely a kind of memory system, in the sense that a pattern of 1 s and 0 s can be written into a register and later read back from that register However, in discussion of computer organization, memory usually means main memory, which is outside the processor, and does not include the registers inside the processor ENCM 369 W14 Section 01 Slide Set 1 slide 17/79 Processors have relatively SMALL numbers of registers ENCM 369 W14 Section 01 Slide Set 1 slide 18/79 Replacing a model from ENCM 339 Example: In the x86-64 architecture, used by processors in current Macs, and PCs running 64-bit Windows or Linux, there are 16 eight-byte general-purpose registers (GPRs) (So, how many bits are there in an x86-64 GPR?) Another example: In the MIPS32 architecture there are 32 four-byte GPRs Total capacity of registers is TINY compared to main memory capacity! Model: All variables and function arguments in a running C or C++ programs are in main memory, in regions called the stack, static storage, and the free store (or heap) This model is very helpful in understanding C and C++ code, but in ENCM 369 you must stop believing it! Why won t this model work in ENCM 369?
ENCM 369 W14 Section 01 Slide Set 1 slide 19/79 Key terms: Memory Read and Memory Write ENCM 369 W14 Section 01 Slide Set 1 slide 20/79 Memory Reads and Memory Writes, continued Memory read operation: The processor puts a memory address on the bus A group of bytes (usually one, two, four or eight) in memory gets copied from memory to a register, via the bus Memory write operation: The processor puts a memory address on the bus A group of bytes (usually one, two, four or eight) in memory gets copied from a register to memory, via the bus What component is choosing the address in a read operation? What component is choosing the address in a write operation? Why is only one address needed when there is a read or write of two or more bytes? ENCM 369 W14 Section 01 Slide Set 1 slide 21/79 The Simplest Useful Model for How a Computer Works ENCM 369 W14 Section 01 Slide Set 1 slide 22/79 The Simplest Useful Model for How a Computer Works: Key Questions There are two steps Let s write descriptions for these steps The processor performs Step 1, Step 2, Step 1, Step 2, Step 1, Step 2, forever (or until the computer is turned off) In Step 1, how does the processor decide what address to use to get an instruction? In Step 2, what kinds of action can be performed by the processor in executing an instruction? ENCM 369 W14 Section 01 Slide Set 1 slide 23/79 Flow of instructions (What memory address is used in Step 1?) ENCM 369 W14 Section 01 Slide Set 1 slide 24/79 Flow of instructions: if statements, loops, and function calls The picture shows 9 bytes within the giant array of bytes that is main memory Suppose that the processor is about to read Instruction A What happens next? lower addresses higher addresses 01011110 Instruction A 11001001 (3 bytes) 10101100 00001110 Instruction B 10010000 (2 bytes) 00010001 00000000 Instruction C 00000000 (4 bytes) 00000100 It would be impossible to create useful programs if processors always read and executed instructions in the order in which the instructions appeared in main memory What kinds of special instructions allow program pieces like if statements, loops, and function calls to work?
ENCM 369 W14 Section 01 Slide Set 1 slide 25/79 Registers (Review) ENCM 369 W14 Section 01 Slide Set 1 slide 26/79 Uses for GPRs and memory A register is a storage location for one or more bytes (typically a group of two, four, or eight bytes) inside the processor So registers are NOT part of main memory, because main memory is external to the processor processor registers bus main memory device device Reminder: GPR stands for general-purpose register A GPR can hold either an integer (a C int or unsigned int) or a memory address (a C pointer) GPRs hold a small amount of a running program s data (Here data means variables and function arguments) Memory holds the rest of the program s data usually much more than what is in the GPRs and all of the program s instructions ENCM 369 W14 Section 01 Slide Set 1 slide 27/79 Examples of tasks performed in executing an instruction (or What happens in Step 2? ) Suppose we have the C statement foo = x + y + z; where all the variables are ints What sequence of instructions could be used to make this statement work? ENCM 369 W14 Section 01 Slide Set 1 slide 28/79 Outline of Slide Set 1 About these slides Organization of a Simple Computer Introduction to the MIPS-32 Computer Architecture Introduction to MIPS registers, machine language and assembly language MIPS Assembly Language Programming: Getting Started ENCM 369 W14 Section 01 Slide Set 1 slide 29/79 MIPS processors ENCM 369 W14 Section 01 Slide Set 1 slide 30/79 Why study the MIPS architecture in ENCM 369? Designed by a company called MIPS (wwwmipscom) Manufactured under license by many different companies Today, used mostly in embedded systems, such as digital cameras, network hardware, automotive applications, GPS receivers, In 1980 s and 1990 s, used for desktop workstations produced by DEC and SGI It s easier to learn and understand than the x86 and x86-64 architectures (used in PCs and Macs) or ARM architectures (used in smartphones, tablets, lots of other products) It has many properties in common with x86, x86-64, ARM, and other major architectures Our textbook is MIPS-based!
ENCM 369 W14 Section 01 Slide Set 1 slide 31/79 Variations of MIPS ENCM 369 W14 Section 01 Slide Set 1 slide 32/79 Memory is really organized in words, not bytes In this course, we ll study the MIPS-32 version We ll just say MIPS in this course, but we really mean MIPS-32 In MIPS-32 GPRs are 32 bits wide Memory addresses are 32 bits wide Instructions are 32 bits wide Memory words are 32 bits wide There are related MIPS-16 and MIPS-64 architectures, but we won t study those in detail A simple model presented about 18 slides back says: main memory is a giant array of bytes A more complex and accurate model that we ll start using now says: Bytes in main memory are grouped together in multi-byte pieces called words, and memory should be thought of as a giant array of words Much later in the course, we will study more complex models of main memory, involving concepts of caches and virtual memory ENCM 369 W14 Section 01 Slide Set 1 slide 33/79 Different architectures have different word sizes Word size Word size Example (bytes) (bits) systems 2 16 PCs and Macs of 1980 s low-power embedded systems 4 32 MIPS-32 PCs, Macs, until a few years ago many embedded systems 8 64 servers current game consoles current PCs and Macs ENCM 369 W14 Section 01 Slide Set 1 slide 34/79 MIPS-32 memory organization: An array of 32-bit words Each word is four bytes the address of a word is the lowest of the addresses of its bytes What are the addresses of word X, byte Y, and byte Z? word address 2 32 4 2 32 8 2 32 12 8 4 0 byte offset +3 +2 +1 00 11 00 11 +0 00000000 11111111 00000000 11111111 byte Z byte Y word X ENCM 369 W14 Section 01 Slide Set 1 slide 35/79 Address spaces and regions within address spaces ENCM 369 W14 Section 01 Slide Set 1 slide 36/79 A model for MIPS memory access The address space of a computer system is the set of all possible memory addresses The previous slide showed the MIPS-32 address space Why is 2 32 4 the largest word address in the MIPS-32 address space? A typical program ignores most of the address space The program uses only a few regions within the address space typically one region for instructions, and two or three regions for data MIPS processor registers logical address 32 address translation Bus control signals? physical address 32 data or instruction 32 Main Memory (big array of words)
ENCM 369 W14 Section 01 Slide Set 1 slide 37/79 A model for MIPS memory access (continued) ENCM 369 W14 Section 01 Slide Set 1 slide 38/79 Alignment restrictions in MIPS: word addresses must be multiples of 4 What are some examples of control signals, and how might they be used? What does address translation mean? Example 1: How is the bus used to bring an instruction into the processor? Example 2: How is the bus used when the processor updates a byte in a character string in memory? byte offset word address +3 +2 +1 +0 00 11 4,194,320 00 11 4 consecutive 4,194,3160000000 1111111 bytes, but NOT 4,194,312 a word 000000000 111111111 4,194,308000000000 111111111 a word 4,194,304 ENCM 369 W14 Section 01 Slide Set 1 slide 39/79 More about alignment ENCM 369 W14 Section 01 Slide Set 1 slide 40/79 Outline of Slide Set 1 Addresses of 16-bit MIPS halfwords must be multiples of 2 Most processor families have alignment rules, such as: 16-bit chunks must have addresses that are multiples of 2 32-bit chunks must have addresses that are multiples of 4 64-bit chunks (such as C doubles) must have addresses that are multiples of 8 Alignment rules simplify the design of memory hardware About these slides Organization of a Simple Computer Introduction to the MIPS-32 Computer Architecture Introduction to MIPS registers, machine language and assembly language MIPS Assembly Language Programming: Getting Started ENCM 369 W14 Section 01 Slide Set 1 slide 41/79 Introduction to MIPS registers, machine language and assembly language ENCM 369 W14 Section 01 Slide Set 1 slide 42/79 MIPS registers that are NOT GPRs Let s start with the GPRs (general-purpose registers) (Remember, registers are inside the processor, not part of main memory!) MIPS has 32 general-purpose registers (GPRs) Each GPR is 32 bits wide, and can hold either a C int or a memory address (C pointer) The GPRs are numbered from 0 to 31 They also have names we ll learn the names soon There are 16 floating-point point registers (FPRs), each 64 bits wide Each can hold a C double (We ll learn more about floating-point numbers and FPRs near the end of the course) There are also several special-purpose registers, including a very important one called the PC (program counter)
ENCM 369 W14 Section 01 Slide Set 1 slide 43/79 MIPS instruction size ENCM 369 W14 Section 01 Slide Set 1 slide 44/79 The Program Counter (PC) Each instruction is exactly one word in size (How many bits is that? How many bytes?) (In the ARM instruction set, instructions are, as in MIPS, all 4 bytes in size In contrast, instructions in the x86 instruction set vary in size from one byte to 17 bytes) A fixed instruction size simplifies hardware design, but having varying sizes sometimes results in smaller program size In this course you will have to determine from context whether PC means personal computer or program counter! The MIPS PC is a 32-bit special-purpose register that holds the address of the next instruction to be read from memory Instruction pointer would be a better name than program counter! But program counter is the standard name in MIPS and many other architectures ENCM 369 W14 Section 01 Slide Set 1 slide 45/79 The PC and the Simplest Useful Model for How a Computer Works Step 1: Processor reads instruction from memory Step 2: Processor executes the instruction (The instruction is a very simple command) The processor performs Step 1, Step 2, Step 1, Step 2, Step 1, Step 2, forever (or until the computer is turned off) What are Steps 1 and 2 in terms of the PC and the MIPS memory model? ENCM 369 W14 Section 01 Slide Set 1 slide 46/79 Review of hexadecimal numbers, notation for hexadecimal numbers As you learned in ENEL 353, hexadecimal means base sixteen Using the notation of ENEL 353, here s an example: 50CD 16 = 5 16 3 + 0 16 2 + 12 16 1 + 13 16 0 = 5 4096 + 0 256 + 12 16 + 13 = 20685 10 In ENCM 369 we ll use 0x (digit 0, not letter O) to indicate hexadecimal constants, because that notation is used in C, C++, many assembly languages, and many other programming languages Example: In C, this expression is true 0x50cd == 20685 ENCM 369 W14 Section 01 Slide Set 1 slide 47/79 Notation in ENCM 369 for numbers with lots of digits ENCM 369 W14 Section 01 Slide Set 1 slide 48/79 A typical MIPS instruction Underscores separate groups of digits Groups of digits are whatever size is convenient Examples one billion: 1 000 000 000 2 31 1, in hexadecimal: 0x7fff_ffff Let s call this example (1): Add values of GPR 8 and GPR 9, copy result into GPR 17 The bits for example (1) 000000_01000_01001_10001_00000_000000 What do the groups of bits within the instruction mean?
ENCM 369 W14 Section 01 Slide Set 1 slide 49/79 More example instructions ENCM 369 W14 Section 01 Slide Set 1 slide 50/79 Processor-memory interaction for 3 kinds of MIPS instructions Example (2): Add constant 1025 and value of GPR 18, copy result into GPR 10 Example (3): Copy word of memory pointed to by GPR 4 into GPR 8 (This is a load word instruction) Example (4): Copy byte of memory pointed to by GPR 4 into GPR 8 (This is a load byte instruction) MIPS processor logical address 32 registers address translation main memory control signals? data/instruction 32 32 physical address Let s use 6 copies of this diagram to trace Steps 1 and 2 for three instructions ENCM 369 W14 Section 01 Slide Set 1 slide 51/79 Processor-memory interaction for 3 kinds of MIPS instructions, continued The instructions will be example (1), an add instruction; example (3), an lw instruction; an sw (store word) instruction, which copies a word from a GPR to memory, using another GPR value as an address Very important! Know this as soon as possible: lw (load word) copies data from memory to a GPR sw (store word) copies data from a GPR to memory ENCM 369 W14 Section 01 Slide Set 1 slide 52/79 Programming in Machine Language A program is a sequence of instructions, and each instruction is a bit pattern With a manual describing the bit patterns for all of the instructions available on a computer, you could write a program by composing bit patterns, one instruction at a time This method of building a program is called programming in machine language The earliest computers had to be programmed in machine language there was no software available for any other method of programming! ENCM 369 W14 Section 01 Slide Set 1 slide 53/79 Assembly Language ENCM 369 W14 Section 01 Slide Set 1 slide 54/79 Things you will see in an A L (assembly language) file Composing machine language is tedious and slow It s easier from humans to write instructions with a text editor and let a translator program determine the bit patterns This kind of translator program is called an assembler the input to the assembler is called assembly language Descriptions of instructions, one instruction per line Directives for allocation and initialization of static data Other important kinds of information
ENCM 369 W14 Section 01 Slide Set 1 slide 55/79 Syntax for instructions in A L, examples of MIPS A L instructions ENCM 369 W14 Section 01 Slide Set 1 slide 56/79 Historic uses of Assembly Language What is the general form of an A L instruction? What would the MIPS A L be for the machine language examples we saw previously? (1) add GPRs 8 and 9, put result in GPR 17 (2) add GPR 8 and constant 1025, put result in GPR 10 (3) copy memory word pointed to by GPR 4 into GPR 8 (4) copy memory byte pointed to by GPR 4 into GPR 8 For decades, entire programs were written in AL Examples: Operating systems for industry-dominating IBM mainframes (1960 s) Microsoft MS-DOS and many important applications for MS-DOS Many, many pieces of embedded system software ENCM 369 W14 Section 01 Slide Set 1 slide 57/79 Why write an entire program in AL? ENCM 369 W14 Section 01 Slide Set 1 slide 58/79 Modern reasons to know AL It used to be true that human-written A L programs could be smaller and faster than equivalent high-level language (HLL) programs This reason is now obsolete good modern compilers can usually generate smaller, more efficient instruction sequences than most humans can write in AL 1 Certain small pieces of programs are better written in AL than in a HLL 2 Old AL programs may need to be debugged or enhanced 3 Students programming in AL develop precise models for what a processor does and what a compiler does Reason 3 is why you will read and write a lot of AL in ENCM 369 ENCM 369 W14 Section 01 Slide Set 1 slide 59/79 Reasons to avoid programming in AL ENCM 369 W14 Section 01 Slide Set 1 slide 60/79 Outline of Slide Set 1 Cost: Compared to C and other HLLs, AL takes more time to write and is much harder to read and debug Lack of portability: Good C code is portable: It can be compiled to run on many different processor families AL code is processor-specific for example, a program written in MIPS AL can not be made to run efficiently on an x86 computer About these slides Organization of a Simple Computer Introduction to the MIPS-32 Computer Architecture Introduction to MIPS registers, machine language and assembly language MIPS Assembly Language Programming: Getting Started
ENCM 369 W14 Section 01 Slide Set 1 slide 61/79 MIPS Assembly Language Programming: Getting Started Let s start with some names and uses for MIPS GPRs $0 is also known as $zero It has unique, possibly surprising behaviour: It always contains the number 0, regardless of what is done with it Suppose $16 and $17 contain values 20 and 30 What happens as a result of these instructions? add $18, $16, $17 add $0, $16, $17 ENCM 369 W14 Section 01 Slide Set 1 slide 62/79 Names and uses for some MIPS GPRs, continued $16 $23 are known as $s0 $s7 and are often (but not always) used for local variables of procedures (Procedure is a general name for things like C functions) (Remember, contrary to models given in ENCM 339, some variables and functions are in GPRs, not main memory) $8 $15, $24, and $25 are known as $t0 $t9 and are often (but not always) used as temporaries storage for intermediate results More complete rules for use of $s0 $s7 and $t0 $t9 will be presented later in the course ENCM 369 W14 Section 01 Slide Set 1 slide 63/79 Example uses of s-registers and t-registers variable register a $s0 b $s1 c $s2 d $s3 e $s4 f $s5 Suppose GPRS are allocated for 6 int variables as shown in the table What are AL translations for the statements below? // statement one a = 0; // statement two b = (c - d) + (e - f); ENCM 369 W14 Section 01 Slide Set 1 slide 64/79 MIPS AL syntax for lw (load word) and sw (store word) Review: load means copy data from memory to a register, store means copy data from a register to memory Syntaxes for the instructions are lw destination, address sw source, address destination in lw must be a GPR source in sw must be a GPR Let s make some notes about the syntax for address ENCM 369 W14 Section 01 Slide Set 1 slide 65/79 Array elements, registers, and memory ENCM 369 W14 Section 01 Slide Set 1 slide 66/79 Example AL code for array element access Memory words all have addresses Registers DO NOT HAVE ADDRESSES! (Registers can contain addresses, but that s not the same thing!) How does array element access work? What does that imply about whether arrays can be in registers or in memory? Suppose $s0 is used for p, of type int* (pointer-to-int) Suppose $s1 is used for k, of type int What would be a correct AL translation for the C code below? p[10] = p[20] + k; (This requires that p points to the start of an array of at least 21 int elements You re expected to know about using pointers to access array elements from ENCM 339!)
ENCM 369 W14 Section 01 Slide Set 1 slide 67/79 Decision-making and branch instructions ENCM 369 W14 Section 01 Slide Set 1 slide 68/79 Labels in AL To write AL that works like a C if statement, we need an instruction that causes a skip forward if some condition is true Example C code, where x, y, z are all ints: if (x == y) z = 0; z = z + x; Suppose x is in $s0, y is in $s1, and z is in $s2 What would be a correct MIPS AL translation? L1 in the previous AL code is an example of a label A label is used to give a name to an instruction or an item of static data (See Lab 2 for examples of labels for static data) A label names the next instruction or data item listed in the AL code, regardless of comments or blank lines ENCM 369 W14 Section 01 Slide Set 1 slide 69/79 In each example below, L1 is a label for the add instruction ENCM 369 W14 Section 01 Slide Set 1 slide 70/79 Branch and jump instructions Example 1 Example 2 Example 3 L1: L1: add $s2, $s2, $s0 L1: # Here are add $s2, $s2, $s0 # some comments # and blank lines add $s2, $s2, $s0 The style of Example 1 saves vertical space The style of Example 2 may be more readable (The style of Example 3 is silly but allowed by the assembler) We made you write lots of goto statements in C in Lab 1 because that should help you quickly understand branches and jumps! Branch (general concept): goto an instruction, but only if some condition is true Jump (general concept): goto an instruction, without checking any condition ENCM 369 W14 Section 01 Slide Set 1 slide 71/79 beq, bne, and j: three of the many branch and jump instructions available in MIPS ENCM 369 W14 Section 01 Slide Set 1 slide 72/79 A few terms: jump target, taken, branch target beq GPR 1, GPR 2, label meaning: if ( GPR 1 == GPR 2 ) goto label bne GPR 1, GPR 2, label meaning: if ( GPR 1!= GPR 2 ) goto label The target of a jump instruction is defined as the instruction to be executed after the jump instruction (So the AL label in a MIPS j instruction is the label of the jump target) A branch instruction is said to be taken if the condition tested by the branch is true The target of a branch is the instruction that will be executed next if the branch is taken j label meaning: goto label
ENCM 369 W14 Section 01 Slide Set 1 slide 73/79 How do jumps and branches fit into The Simplest Useful Model? ENCM 369 W14 Section 01 Slide Set 1 slide 74/79 One way to code a C while loop in AL: branch at the top, jump at the bottom The model, for MIPS Step 1: Using PC contents as an address, read instruction word from memory, add 4 to PC Step 2: Execute the instruction Repeat Step 1, Step 2, Step 1, Step 2, and so on, forever Using the terms target and taken, what are more precise descriptions of Step 2 for MIPS j, beq, and bne instructions? Let s translate this example into MIPS AL sum = 0; i = 0; while (i!= n) { sum += a[i]; i++; } // more code variable type GPR a int * $s0 n int $s1 sum int $s2 i int $s3 ENCM 369 W14 Section 01 Slide Set 1 slide 75/79 Branches and comparisons: the MIPS slt instruction ENCM 369 W14 Section 01 Slide Set 1 slide 76/79 Using the sll (shift left logical) instruction to multiply by a power of 2 What if we want to branch to some label, say, L42, if $s0 < $s1? Neither bne nor beq will work! A two-instruction sequence is needed: slt $t0, $s0, $s1 # $t0 = ($s0 < $s1) bne $t0, $zero, L42 # if ($t0) goto L42 slt means set on less than In the example, if $s0 < $s1, $t0 gets a value of 1, otherwise $t0 gets 0 slt is a kind of comparison instruction From the while loop example: sll $t0, $s3, 2 # $t0 = 4 * $s3 Why does this work? To start, let s find out what sll does The syntax is sll dest GPR, source GPR, constant The instruction takes the bit pattern from the source, shifts it left by constant bit positions, and puts the result in the destination ENCM 369 W14 Section 01 Slide Set 1 slide 77/79 Why does left shift do multiplication? ENCM 369 W14 Section 01 Slide Set 1 slide 78/79 Pseudoinstructions in MIPS AL In base ten, think about computing 9753 987, then computing 9753 1000 How is this related to multiplication in base two? Let s write some MIPS examples of multiplication using the sll instruction Later in the course we ll find that MIPS has multiply instructions However, sll is more convenient for the special case of multiplying by a power of two These are convenient for AL programmers, but a little confusing for beginners A pseudoinstruction is a line of AL that looks like a MIPS instruction but does not correspond exactly to a MIPS machine instruction The assembler handles a pseudoinstruction by generating real instructions that have the appropriate effect
ENCM 369 W14 Section 01 Slide Set 1 slide 79/79 Pseudoinstructions in MIPS AL, continued Example: blt $s0, $s1, L1 MIPS does not have a single instruction that can do both a less than comparison and a branch decision What does the assembler do with this blt pseudoinstruction? In ENCM 369 we want to learn real instructions, so we ll avoid pseudoinstructions whenever possible However, certain pseudoinstructions for example, la, used in Lab 2 are impossible to avoid