Daniel Verkamp, Software Engineer

Similar documents
Jim Harris. Principal Software Engineer. Data Center Group

NVMe Over Fabrics: Scaling Up With The Storage Performance Development Kit

Jim Harris. Principal Software Engineer. Intel Data Center Group

Ben Walker Data Center Group Intel Corporation

Intel Architecture 2S Server Tioga Pass Performance and Power Optimization

Are You Insured Against Your Noisy Neighbor Sunku Ranganath, Intel Corporation Sridhar Rao, Spirent Communications

Changpeng Liu. Senior Storage Software Engineer. Intel Data Center Group

Andreas Schneider. Markus Leberecht. Senior Cloud Solution Architect, Intel Deutschland. Distribution Sales Manager, Intel Deutschland

Changpeng Liu. Cloud Storage Software Engineer. Intel Data Center Group

Storage Performance Development Kit (SPDK) Daniel Verkamp, Software Engineer

Changpeng Liu, Cloud Software Engineer. Piotr Pelpliński, Cloud Software Engineer

Jim Pappas Director of Technology Initiatives, Intel Vice-Chair, Storage Networking Industry Association (SNIA) December 07, 2018

Munara Tolubaeva Technical Consulting Engineer. 3D XPoint is a trademark of Intel Corporation in the U.S. and/or other countries.

THE STORAGE PERFORMANCE DEVELOPMENT KIT AND NVME-OF

Accelerating NVMe I/Os in Virtual Machine via SPDK vhost* Solution Ziye Yang, Changpeng Liu Senior software Engineer Intel

Out-of-band (OOB) Management of Storage Software through Baseboard Management Controller Piotr Wysocki, Kapil Karkra Intel

Accelerating NVMe-oF* for VMs with the Storage Performance Development Kit

Hardware and Software Co-Optimization for Best Cloud Experience

Intel. Rack Scale Design: A Deeper Perspective on Software Manageability for the Open Compute Project Community. Mohan J. Kumar Intel Fellow

Ceph BlueStore Performance on Latest Intel Server Platforms. Orlando Moreno Performance Engineer, Intel Corporation May 10, 2018

Essential Performance and Advanced Security

Ed Warnicke, Cisco. Tomasz Zawadzki, Intel

Future of datacenter STORAGE. Carol Wilder, Niels Reimers,

Vectorization Advisor: getting started

Data and Intelligence in Storage Carol Wilder Intel Corporation

SPDK China Summit Ziye Yang. Senior Software Engineer. Network Platforms Group, Intel Corporation

Intel Xeon Phi Coprocessor. Technical Resources. Intel Xeon Phi Coprocessor Workshop Pawsey Centre & CSIRO, Aug Intel Xeon Phi Coprocessor

Crosstalk between VMs. Alexander Komarov, Application Engineer Software and Services Group Developer Relations Division EMEA

Sample for OpenCL* and DirectX* Video Acceleration Surface Sharing

Intel s Architecture for NFV

Intel optane memory as platform accelerator. Vladimir Knyazkin

Case Study. Optimizing an Illegal Image Filter System. Software. Intel Integrated Performance Primitives. High-Performance Computing

LNet Roadmap & Development. Amir Shehata Lustre * Network Engineer Intel High Performance Data Division

April 2 nd, Bob Burroughs Director, HPC Solution Sales

Välkommen. Intel Anders Huge

OpenCL* and Microsoft DirectX* Video Acceleration Surface Sharing

Re-Architecting Cloud Storage with Intel 3D XPoint Technology and Intel 3D NAND SSDs

Intel Inside. amazing windows 10 Outside

Software Optimization Case Study. Yu-Ping Zhao

H.J. Lu, Sunil K Pandey. Intel. November, 2018

Mohan J. Kumar Intel Fellow Intel Corporation

FAST FORWARD TO YOUR <NEXT> CREATION

Jomar Silva Technical Evangelist

Bei Wang, Dmitry Prohorov and Carlos Rosales

Debugging and Analyzing Programs using the Intercept Layer for OpenCL Applications

Intel Open Network Platform Release 2.0 Hardware and Software Specifications Application Note. SDN/NFV Solutions with Intel Open Network Platform

Small File I/O Performance in Lustre. Mikhail Pershin, Joe Gmitter Intel HPDD April 2018

IXPUG 16. Dmitry Durnov, Intel MPI team

NFV Platform Service Assurance Intel Infrastructure Management Technologies

M.2 Evolves to Storage Benefit

OPENSHMEM AND OFI: BETTER TOGETHER

12th ANNUAL WORKSHOP 2016 NVME OVER FABRICS. Presented by Phil Cayton Intel Corporation. April 6th, 2016

OpenMP * 4 Support in Clang * / LLVM * Andrey Bokhanko, Intel

Intel Xeon Processor E v3 Family

Fast and Easy Persistent Storage for Docker* Containers with Storidge and Intel

Intel SSD Data center evolution

INTEL MKL Vectorized Compact routines

Intel Software Guard Extensions Platform Software for Windows* OS Release Notes

Achieving 2.5X 1 Higher Performance for the Taboola TensorFlow* Serving Application through Targeted Software Optimization

INTEL HPC DEVELOPER CONFERENCE FUEL YOUR INSIGHT

INTEL PENTIUM Gold AND CELERON PROCESSORS

Agenda. Optimization Notice Copyright 2017, Intel Corporation. All rights reserved. *Other names and brands may be claimed as the property of others.

Intel Cluster Checker 3.0 webinar

Expand Your HPC Market Reach and Grow Your Sales with Intel Cluster Ready

Accelerating Data Center Workloads with FPGAs

SPDK Blobstore: A Look Inside the NVM Optimized Allocator

ENVISION TECHNOLOGY CONFERENCE. Functional intel (ia) BLA PARTHAS, INTEL PLATFORM ARCHITECT

Engineers can be significantly more productive when ANSYS Mechanical runs on CPUs with a high core count. Executive Summary

Bitonic Sorting. Intel SDK for OpenCL* Applications Sample Documentation. Copyright Intel Corporation. All Rights Reserved

Virtuozzo Hyperconverged Platform Uses Intel Optane SSDs to Accelerate Performance for Containers and VMs

POWER YOUR CREATIVITY WITH THE INTEL CORE X-SERIES PROCESSOR FAMILY

DEVITO AUTOMATED HIGH-PERFORMANCE FINITE DIFFERENCES FOR GEOPHYSICAL EXPLORATION

WITH INTEL TECHNOLOGIES

FlashGrid Software Enables Converged and Hyper-Converged Appliances for Oracle* RAC

VDPA: VHOST-MDEV AS NEW VHOST PROTOCOL TRANSPORT

Fast-track Hybrid IT Transformation with Intel Data Center Blocks for Cloud

Intel Clear Containers. Amy Leeland Program Manager Clear Linux, Clear Containers And Ciao

Ultimate Workstation Performance

Real World Development examples of systems / iot

Bitonic Sorting Intel OpenCL SDK Sample Documentation

Srinivas Chennupaty. Intel Corporation, 2018

Accelerate performance and maximize productivity gains.

HPCG on Intel Xeon Phi 2 nd Generation, Knights Landing. Alexander Kleymenov and Jongsoo Park Intel Corporation SC16, HPCG BoF

A Better Way to Work. Transform your workplace with 5th generation Intel Core vpro and Intel Core M vpro processors.

Mikhail Dvorskiy, Jim Cownie, Alexey Kukanov

Hubert Nueckel Principal Engineer, Intel. Doug Nelson Technical Lead, Intel. September 2017

Becca Paren Cluster Systems Engineer Software and Services Group. May 2017

Intel Software Development Products Licensing & Programs Channel EMEA

Software Evaluation Guide for WinZip* esources-performance-documents.html

Intel Network Builders Solution Brief. Etisalat* and Intel Virtualizing the Internet. Flexibility

Contributors: Surabhi Jain, Gengbin Zheng, Maria Garzaran, Jim Cownie, Taru Doodi, and Terry L. Wilmarth

Ernesto Su, Hideki Saito, Xinmin Tian Intel Corporation. OpenMPCon 2017 September 18, 2017

6th Generation Intel Core Processor Series

Extremely Fast Distributed Storage for Cloud Service Providers

Agenda. Introduction Network functions virtualization (NFV) promise and mission cloud native approach Where do we want to go with NFV?

Using Web Workers to Improve the Performance of Metro HTML5- JavaScript* Apps

Ziye Yang. NPG, DCG, Intel

Accelerate Machine Learning on macos with Intel Integrated Graphics. Hisham Chowdhury May 23, 2018

An introduction to today s Modular Operating System

Guy Blank Intel Corporation, Israel March 27-28, 2017 European LLVM Developers Meeting Saarland Informatics Campus, Saarbrücken, Germany

Transcription:

Daniel Verkamp, Software Engineer

Notices and Disclaimers Intel technologies features and benefits depend on system configuration and may require enabled hardware, software or service activation. Learn more at intel.com, or from the OEM or retailer. Some results have been estimated or simulated using internal Intel analysis or architecture simulation or modeling, and provided to you for informational purposes. Any differences in your system hardware, software or configuration may affect your actual performance.. Intel processors of the same SKU may vary in frequency or power as a result of natural variability in the production process. Intel does not control or audit third-party benchmark data or the web sites referenced in this document. You should visit the referenced web site and confirm whether referenced data are accurate. Optimization Notice: Intel's compilers may or may not optimize to the same degree for non-intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice. Notice Revision #20110804. The benchmark results may need to be revised as additional testing is conducted. The results depend on the specific platform configurations and workloads utilized in the testing, and may not be applicable to any particular user's components, computer system or workloads. The results are not necessarily representative of other benchmarks and other benchmark results may show greater or lesser impact from mitigations. Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors. Performance tests, such as SYSmark and MobileMark, are measured using specific computer systems, components, software, operations and functions. Any change to any of those factors may cause the results to vary. You should consult other information and performance tests to assist you in fully evaluating your contemplated purchases, including the performance of that product when combined with other products. For more complete information visit www.intel.com/benchmarks. Results have been estimated or simulated using internal Intel analysis or architecture simulation or modeling, and provided to you for informational purposes. Any differences in your system hardware, software or configuration may affect your actual performance. Intel technologies' features and benefits depend on system configuration and may require enabled hardware, software or service activation. Performance varies depending on system configuration. No computer system can be absolutely secure. Check with your system manufacturer or retailer or learn more at www.intel.com. The cost reduction scenarios described are intended to enable you to get a better understanding of how the purchase of a given In tel based product, combined with a number of situation-specific variables, might affect future costs and savings. Circumstances will vary and there may be unaccounted-for costs related to the use and deployment of a given product. Nothing in this document should be interpreted as either a promise of or contract for a given level of costs or cost reduction. No computer system can be absolutely secure. 2018 Intel Corporation. Intel, the Intel logo, Xeon and Xeon logos are trademarks of Intel Corporation in the U.S. and/or other countries. *Other names and brands may be claimed as the property of others. 2

Agenda Logical volumes overview Example use case: vhost + lvol Logical volume management API How it works: SPDK Blobstore Limitations 3

Logical volumes overview Features: Dynamic allocation of volumes (bdevs) Volumes can be managed independently (created, resized, deleted) Supports thin provisioning s and clones (copy on write) Implemented as a virtual bdev (can be layered on all other SPDK bdevs) Intel Builders 4

Example use case: vhost + lvol Subdivide large storage device into slices for individual s Create, delete, resize volumes without interruption of service for other s Vhost target Logical Volume Store Ne* SSD Intel Builders 5

/Clone : read-only copy of volume Clone: read/write copy of snapshot Clone Clone Logical Volume Intel Builders 6

Logical volume management API Management via RPC methods: construct_lvol_store, destroy_lvol_store construct_lvol_bdev, destroy_lvol_bdev snapshot_lvol_bdev, clone_lvol_bdev resize_lvol_bdev Available via JSON-RPC JSON-RPC clients: scripts/rpc.py, scripts/spdkcli.py Intel Builders 7

How it works: SPDK Blobstore Logical volume layer is built on SPDK blobstore Blobstore provides high-performance, lowoverhead cluster allocation I/O to each volume is independent (no locks) Thin provisioning/copy on write and snapshots natively supported in blobstore Intel Builders 8

Cluster-based Allocation Allocation unit is a cluster (by default, 4 MB) Volumes are made up of whole clusters: no external or internal fragmentation Clusters may be scattered around the backing storage Cluster (4MB) Cluster (4MB) Cluster (4MB) Other clusters are allocated to other volumes or free Intel Builders 9

Thin Provisioning Thin-provisioned volumes start with all clusters unallocated Read unallocated cluster: return zeroes Write unallocated cluster: allocate new cluster, fill with zeroes, apply write Thin-provisioned volume Written Cluster zeroes_dev 00000 00000 00000 00000 Intel Builders 10

/Clone Clones start with all clusters unallocated, pointing to backing snapshot Read unallocated cluster: read backing snapshot Write unallocated cluster: allocate new cluster, read backing snapshot, apply write Clone Written Cluster Cluster Cluster Cluster Cluster Intel Builders 11

Limitations Limitation Cannot span base bdevs Data stored unencrypted on disk Additional opportunities for data reduction Volumes compete for disk resources (noisy neighbor) Cannot resize open volumes Potential Solution Concatenation/spanning/RAID virtual bdev module Encryption virtual bdev module Compression/deduplication virtual bdev modules QoS support in bdev layer (limit IOPS/bandwidth/ per volume) Resize notification in bdev layer Intel Builders 12