Technical Note: NVMe Simple Management Interface

Similar documents
Technical Note: NVMe Basic Management Command

LEGAL NOTICE: LEGAL DISCLAIMER:

Block Data is the data transferred to or from the device using SCT Command Transport feature set capabilities.

PMBus Power System Management Protocol Specification Part I General Requirements, Transport And Electrical Interface

New Standard for Remote Monitoring and Management of NVMe SSDs: NVMe-MI

NVM Express TM Management Interface

Software Developer's Manual

NVMe Management Interface (NVMe-MI)

Linear-Encoders CANopen Profile

Technical Note. SMART Command Feature Set for the eu500. Introduction. TN-FD-35: eu500 eusb SMART Commands. Introduction

Intel Storage System JBOD 2000S3 Product Family

Architecture Specification

AC/DC Modular Power Supply Series PMBus APPLICATION NOTES

Software Developer's Manual

Seagate Nytro XM1440. PCIe Gen 3 x4 - NVMe SSD

Technical Note. Client SATA SSD SMART Attribute Reference. Introduction. TN-FD-22: Client SATA SSD SMART Attribute Reference.

Document Revision 1.0 September 16, 1998 Intel Hewlett-Packard NEC Dell

Interoperability Specification for ICCs and Personal Computer Systems

Management Component Transport Protocol (MCTP) IDs and Codes

Linear-Encoder Multi-Sensor CANopen Profile

04-352r0 SAS-1.1 Phy test functions for SMP 29 October 2004

Seagate Nytro XF1440. PCIe Gen 3 x4 - NVMe SSD

PMBus Power System Management Protocol Specification Part I General Requirements, Transport And Electrical Interface

Management Component Transport Protocol (MCTP) IDs and Codes

Contents. Additional Instructions P-3X CANopen

Type 1 Tag Operation Specification. Technical Specification NFC Forum TM T1TOP 1.1 NFCForum-TS-Type-1-Tag_

Modbus Protocol For FTS/FTM 3x&8x

LUTs. Block RAMs. Instantiation. Additional Items. Xilinx Implementation Tools. Verification. Simulation

06-078r3 SAS-2 Expander Route Table (REPORT EXPANDER ROUTE TABLE) 21 June 2006

PMBus. Specification

Open-Channel Solid State Drives Specification

PCI Express Link/Transaction Test Methodology

Enhanced Serial Peripheral Interface (espi) ECN

Model IR4000M. HART Field Device Specification Multi-Point Monitor. Instruction Manual 07-08

Software Developer's Manual

Technical Note. SMART Command Feature Set for the M510DC. Introduction. TN-FD-33: M510DC SSD SMART Implementation. Introduction

Type 3 Tag Operation Specification. Technical Specification NFC Forum TM T3TOP 1.1 NFCForum-TS-Type-3-Tag_

Model IR4000M. Multi-Point Monitor Modbus programming guide

Intel Platform Innovation Framework for EFI SMBus Host Controller Protocol Specification. Version 0.9 April 1, 2004

Fieldbus Appendix AnyBus-S FIPIO

BiSS C (unidirectional) PROTOCOL DESCRIPTION

Software Developer's Manual

PLC2 Board Communication Manual CANopen Slave

PFC96Evo / PFC144Evo CONTROLLER MODBUS PROTOCOL

Open CloudServer OCS Solid State Drive Version 2.1

Technical Note. SMART Command Feature Set for the Introduction. TN-FD-34: 5100 SSD SMART Implementation. Introduction

750/760 COMMUNICATIONS GUIDE. Digital Energy Multilin. Feeder Management Relay

MODBUS Protocol for MiCOM P30 Series

Technical Note. SMART Command Feature Set for the M500DC. Introduction. TN-FD-26: M500DC SSD SMART Implimentation. Introduction

IS-DEV KIT-9 User Manual

CAN / RS485. Product Description. Technical Reference Note. Interface Adapter. Special Features

CAN OPEN DP404 Digital Output

MF1ICS General description. Functional specification. 1.1 Key applications. 1.2 Anticollision. Energy. MIFARE card contacts La, Lb.

NVM Express 1.3 Delivering Continuous Innovation

LXM23A CANopen Fieldbus protocol for servo drive Fieldbus manual V2.00,

PCI-X Addendum to the PCI Compliance Checklist. Revision 1.0a

USB-900 Control Center User s Guide

Security & Chip Card ICs SLE 55R04. Intelligent 770 Byte EEPROM with Contactless Interface complying to ISO/IEC Type A and Security Logic

Enterprise and Datacenter. SSD Form Factor. Connector Specification

Model IR700. Infrared Point Detector for Carbon Dioxide Gas Applications. Modbus Programming Guide

Communication 7. What's in this Chapter? This chapter contains the following sections:

The Cubesat Internal bus: The I2C

Errata and Clarifications to the PCI-X Addendum, Revision 1.0a. Update 3/12/01 Rev P

WV58MR. Redundant rotary encoder with CANopen Safety interface extension User manual 307/17

Hello, and welcome to this presentation of the STM32 I²C interface. It covers the main features of this communication interface, which is widely used

PCI Express TM. Architecture. Link Layer Test Considerations Revision 1.0

DCMI Data Center Manageability Interface Specification v1.0, Revision 1.0. Addenda, Errata, and Clarifications

SCSI is often the best choice of bus for high-specification systems. It has many advantages over IDE, these include:

ML605 PCIe x8 Gen1 Design Creation

PCI Express TM. Architecture. Configuration Space Test Considerations Revision 1.0

Platform Management Component Intercommunications (PMCI) Architecture. White Paper

Universal Configuration Manager

PowerKey 1000 J1939 user manual

AL2-MBU Advanced Manual

AMCP/5-WP/72 APPENDIX D (ENGLISH ONLY)

I2C to DALI Interface

PCI-X Protocol Addendum to the PCI Local Bus Specification Revision 2.0a

NVDIMM DSM Interface Example

SFF Committee Specification for. Self-Monitoring, Analysis and Reporting Technology (S.M.A.R.T.) SFF-8035i Revision 2.0

9 January r0 SAS-2 SPC-4 Enabling and disabling Transport Layer Retries

OLED Engineering Kits User Manual

Using the MODBUS Protocol with Athena Series C (1ZC, 16C, 18C, and 25C) Controllers

The following modifications have been made to this version of the DSM specification:

Mettler-Toledo Smart Communications Protocol Revison 1.0: June 9, 2004 Cond Ind 7100/2(X)H Command Specification Page: 1 of 16

MANHATTAN PROGRAMMING GUIDE IR38060/IR38062/IR38063/IR38064

BS-46 BALOGH. Notes are used to call attention to information that is significant to understanding and operating the equipment.

06-037r5 SAS-2 SMP Lists (DISCOVER LIST) 1 May, 2006

1 Introduction Revision History... 4

RUNNING SPEED AND CADENCE SERVICE

GT34C02. 2Kb SPD EEPROM

PCI-X Protocol Addendum to the PCI Local Bus Specification Revision 2.0a

3ME2 Series. Customer Approver. Innodisk Approver. Customer: Customer Part Number: Innodisk Part Number: Innodisk Model Name: Date:

DELTA CONTROLS CORPORATION

USB Feature Specification: Shared Endpoints

B Interface description 12.01/

INTELLIS. Modbus Direct Network Monitor

Optimized for V CC range of 1.7V to 3.6V. 2-wire serial interface: I 2 C Fast Mode Plus (FM+) compatible

Series SD6 Limit with DeviceNet

Automationdirect.com. D i r e c t L o g i c S D S N e t w o r k M a s t e r. S m a r t D i s t r i b u t e d. S y s t e m M o d u l e

FeliCa Card User's Manual Excerpted Edition

Transcription:

Technical Note: NVMe Simple Management Interface Revision 1.0 February 24, 2015 LEGAL NOTICE: Copyright 2007-2015 NVM Express, Inc. ALL RIGHTS RESERVED. This Technical Note on the NVMe Simple Management Interface is proprietary to the NVM Express, Inc. (also referred to as Company ) and/or its successors and assigns. LEGAL DISCLAIMER: THIS DOCUMENT AND THE INFORMATION CONTAINED HEREIN IS PROVIDED ON AN AS IS BASIS. TO THE MAXIMUM EXTENT PERMITTED BY APPLICABLE LAW, NVM EXPRESS, INC. (ALONG WITH THE CONTRIBUTORS TO THIS DOCUMENT) HEREBY DISCLAIM ALL REPRESENTATIONS, WARRANTIES AND/OR COVENANTS, EITHER EXPRESS OR IMPLIED, STATUTORY OR AT COMMON LAW, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE, VALIDITY, AND/OR NONINFRINGEMENT. All product names, trademarks, registered trademarks, and/or servicemarks may be claimed as the property of their respective owners. NVM Express Workgroup c/o Virtual, Inc. 401 Edgewater Place, Suite 600 Wakefield, MA 01880 info@nvmexpress.org

The NVMe Management Interface (NVMe-MI) Workgroup is developing a specification using Management Component Transport Protocol (MCTP) messages. One command will not use MCTP and it is being released early by this technical note so that systems may already start polling their NVMe devices for basic health status information over SMBus. This command does not provide any mechanism to modify or configure the NVMe device. Such features will use the more capable MCTP protocol rather than this command s simpler SMBus Block Read. The host can reuse existing SMBus or serial EEPROM read subroutines for this read and is not required to switch the SMBus between master and slave modes as in MCTP. The block read protocol is specified by the SMBus specification which is available online at www.smbus.org. First slave address write and command code bytes are transmitted by the host, then a repeated start and finally a slave address read. The host keeps clocking as the drive then responds in slave mode with the selected data. The command code is used as a starting offset into the data block shown in Figure 1, like an address on a serial EEPROM. The offset value increments on every byte read and is reset to zero on a stop condition. A read command without a repeated start is permissible and would always start transmission from offset zero. Reading more than the block length with an I2C read is also permissible and these reads would continue into the first byte in the next block of data. Note that the calculated PEC includes the host command and will be different depending on how the read starts. Blocks of data are packed sequentially. The first 2 blocks are defined by the NVMe-MI workgroup. The first block is the dynamic host health data. The second block includes the Vendor ID (VID) and serial number of the drive. Additional blocks of data can be defined by the owner of the VID. Reading past the end of the vendor defined blocks shall return zeros. The SMBus slave address to read this data structure is allowed to be the same address we use for MCTP, and defaults to 6Ah if ARP is not invoked. Mixed MCTP and block read traffic does not result in any packet corruption. Here are a few example reads from an NVMe drive at 30 C, no alarms, VID=1234h, serial number is AZ123456. All values are in hexadecimal or ASCII for character. Host transmissions are shown in black, and drive transmissions are shown in grey: SMBus block read of drive status: Start D4 00 Start D5 06 BF FF 1E 01 00 00 10 Stop SMBus block read of static data: Start D4 08 Start D5 16 12 34 A Z 1 2 3 4 5 6 20 20 20 20 20 20 20 20 20 20 20 20 DA Stop SMBus send byte to reset Arbitration bit: Start D4 FF Stop I2C read of status and vendor content, I2C allows reading across SMBus block boundaries: Start D4 00 Start D5 06 BF FF 1E 01 00 00 10 16 12 34 A Z 1 2 3 4 5 6 20 20 20 20 20 20 20 20 20 20 20 20 B0 Stop

The SMBus Arbitration bit may be used for simple arbitration on systems that have multiple drives on the same SMBus segment without ARP or muxes to separate them. To use this mechanism, the host follows this 3 step process to handle collisions for the same slave address: 1. The host does a SMBus byte write to send byte FFh which clears the SMBus Arbitration bit on all listening NVMe Management Endpoints at this slave address. 2. The host does an I2C read starting from offset 0h and continuing at least through the serial number in the second block. The drive transmitting a 0 when other drives sent a 1 eventually wins arbitration and sets the arbitration bit to 1 to give other drives priority on the next read. 3. Repeat step 2 until all drives are read, reading the Arbitration bit as a 1 indicates loop is done. 4. Sort the responses by serial number since the order of drive responses depends partially on health status and temperatures. Be careful that there are no short reads of similar data between steps 1 and 3. If the read data is the same on multiple drives then all these drives will set the arbitration bit. After that a new send byte FFh is required to restart the process. The logic levels were intentionally set to normally high in the 2 nd and 3 rd bytes. This is an additional mechanism to assist systems that do not have ARP or muxes. Since 0 bits win arbitration on SMBus, a drive with an alarm condition will be prioritized over healthy drives in the above arbitration scheme.

Command Code Offset 00 Description Length of Status: Indicates number of additional bytes to read before encountering PEC. This value should always be 6 in implementations of this version of the spec. Status Flags (SFLGS): This field indicates the status of the NVM subsystem. SMBus Arbitration Bit 7 is set 1 after a SMBus block read is completed all the way to the stop bit without bus contention and cleared to 0 if a SMBus Send Byte FFh is received on this SMBus slave address. Powered Up Bit 6 is set to 1 when the subsystem cannot process NVMe management commands, and the rest of the transmission may be invalid. If cleared to 0, then the NVM subsystem is fully powered and ready to respond to management commands. This logic level intentionally identifies and prioritizes powered up and ready drives over their powered off neighbors on the same SMBus segment. 0 01 Drive Functional Bit 5 is set to 1 to indicate an NVM subsystem is functional. If cleared to 0, then there is an unrecoverable failure in the NVM subsystem and the rest of the transmission may be invalid. Reset Not Required - Bit 4 is set to 1 to indicate the NVM subsystem does not need a reset to resume normal operation. If cleared to 0 then the NVM subsystem has experienced an error that prevents continued normal operation. A controller reset is required to resume normal operation. PCIe Link Active - Bit 3 is set to 1 to indicate one or more of the PCIe links is up (i.e., the Data Link Control and Management State Machine is in the DL_Active state). If cleared to 0, then all the PCIe links are down. 02 Bits 2-0 shall be set to 1. SMART Warnings: This field shall contain the Critical Warning field (byte 0) of the NVMe SMART / Health Information log. Each bit in this field shall be inverted from the NVMe definition (i.e., the management interface shall indicate a 0 value while the corresponding bit is 1 in the log page). Refer to the NVMe specification for bit definitions. If there are multiple controllers in the NVM subsystem, the management endpoint shall combine the Critical Warning field from every controller such that a bit in this field is: Cleared to 0 if any controller in the subsystem indicates a critical warning for that corresponding bit. Set to 1 if all controllers in the NVM subsystem do not indicate a critical warning for the corresponding bit.

Composite Temperature (CTemp): This field indicates the current temperature in degrees Celsius. If a temperature value is reported, it should be the same temperature as the Composite Temperature from the SMART log of hottest controller in the NVM subsystem. The reported temperature range is vendor specific, and shall not exceed the range -60 to +127 C. The 8 bit format of the data is shown below. This field should not report a temperature when that is older than 5 seconds. If recent data is not available, the NVMe management endpoint should indicate a value of 80h for this field. 03 Value Description 00h 7Eh Temperature is measured in degrees Celsius (0 to 126C) 7Fh 80h 81h 82h C3h C4 C5 FFh 127C or higher No temperature data or temperature data is more the 5 seconds old. Temperature sensor failure Reserved Temperature is 60C or lower Temperature measured in degrees Celsius is represented in twos complement ( 1 to 59C) Percentage Drive Life Used (PDLU): Contains a vendor specific estimate of the percentage of NVM subsystem NVM life used based on the actual usage and the manufacturer s prediction of NVM life. If an NVM subsystem has multiple controllers the highest value is 04 returned. A value of 100 indicates that the estimated endurance of the NVM in the NVM subsystem has been consumed, but may not indicate an NVM subsystem failure. The value is allowed to exceed 100. Percentages greater than 254 shall be represented as 255. This value should be updated once per power-on hour and equal the Percentage Used value in the NVMe SMART Health Log Page. 06:05 Reserved: Shall be set to 0000h 07 PEC: An 8 bit CRC calculated over the slave address, command code, second slave address and returned data. Algorithm is in SMBus Specifications. 08 Length of identification: shall always be 22 in implementations of this version of the spec 10:09 Vendor ID: The 2 byte vendor ID, assigned by the PCI SIG. Should match VID in the Identify Controller command response. MSB is transmitted first. 8 Serial Number: 20 characters that match the serial number in the NVMe Identify Controller 30:11 command response. First character is transmitted first 31 PEC: An 8 bit CRC calculated over the slave address, command code, second slave address and returned data. Algorithm is in SMBus Specifications. 32+ 255:32 Vendor Specific This data structure shall not exceed the maximum read length of 255 specified in the SMBus version 3 specification. Preferably length is not greater than 32 for compatibility with SMBus 2.0, additional blocks shall be on 8 byte boundaries. Figure 1: Subsystem Management Data Structure