TECHNOLOGY Page 1
Intel x86 Microcomputer CPU Characteristics 8086 16 bit Expansion Bus 16 bit External Bus 8 bit Internal Bus 20 bit Memory Address 2 20 = 1,048,576 = 1024 Kb Physical Memory Real Address Modes Supported July 1981 - IBM introduces its first desktop computer, the Datamaster. It uses a 16-bit 8086, and is a dedicated data processing machine. 8088 8 bit Expansion Bus 8 bit External Bus 8 bit Internal Bus 20 bit Memory Address 2 20 = 1,048,576 = 1024 Kb Physical Memory 4.77 to 10Mhz Clock Speeds Real Address Modes Supported August 1981 - IBM announces the IBM 5150 PC Personal Computer, featuring a 4.77-MHz Intel 8088 CPU, 64KB RAM, 40KB ROM, one 5.25-inch floppy drive, and PC-DOS 1.0 (Microsoft's MS-DOS), for US$3000. A fully loaded version with color graphics cost US$6000. Eight months after the introduction of the IBM PC, 50,000 units have been sold 80286 16 bit Expansion Bus 16 bit External Bus 16 bit Internal Bus 24 bit Memory Address 2 24 = 16,777,216 = 16,384 Kb Physical Memory 6 to 20Mhz Clock Speeds Real, Protected Address Modes Supported 80287 Math Co- August 1984 - IBM announces the PC AT, a 6MHz 80286 computer using PC-DOS 3.0, a 5.25-inch 1.2MB floppy drive, with 256KB RAM, for US$4000, which doesn't include hard drive or monitor/card. With a 20MB hard drive, color card and monitor: US$6700. TECHNOLOGY Page 2
September 1986 - Compaq Computer introduces the first 16-MHz Intel 80386-based PC, the Compaq Deskpro 386. Little-known company ALR - Advanced Logic Research also announces the first 386-based PC, the Access 386. April 1987 - IBM introduces the IBM Personal System/2 (PS/2) line, with IBM's first 386 PC, and 3.5-inch floppy drives as standard. The PS/2 Model 30 uses a 8-MHz 8086, the Model 50 and 60 use the 10-MHz 80286, and the Model 80 uses a 20-MHz 80386. 80386 SX 16 bit Expansion Bus 16 bit External Bus 32 bit Internal Bus 16 to 20Mhz Clock Speeds 80387 Math Co- 80386 DX 16 bit Expansion Bus 32 bit External Bus 32 bit Internal Bus 16 to 33Mhz Clock Speeds 80387 Math Co- April 1989 - Intel introduces the 33-MHz version of the 80386 microprocessor and 80387 numeric co-processor. TECHNOLOGY Page 3
April 1989 - Intel introduces the 80486 microprocessor at Spring Comdex in Chicago, Illinois. It integrates the 80386, 80387 math coprocessor, and adds a primary cache. It uses 1.2 million transistors. Initial price is US$900. June 1989 - Apricot Computers announces the first 486-based PC, in London, England. The VX FT system uses the 25-MHz Intel 80486 chip, IBM's MCA bus, and is priced starting at US$18,000. The 80486 (1989) added full pipelines, single on chip 8K cache, integrated FPU (based on the eight element 80-bit stack-oriented FPU in the 80387 FPU), and clock doubling versions (like the Z-280). The (late 1993) was super scalar (up to two instructions at once in dual integer units and single FPU) with separate 8K I/D caches. 80486 DX/DX2/DX4 32 bit Expansion Bus 32 bit External Bus 32 bit Internal Bus 25 to 100Mhz Clock Speeds Integrated FPU in CPU Math Co- April 1991 - Intel debuts the i486sx chip, initially at 20-MHz, and the i487sx math coprocessor. The i486sx is like the 486, but without the math coprocessor. 80486 SX 32 bit Expansion Bus 32 bit External Bus 32 bit Internal Bus 25 to 100Mhz Clock Speeds 80487 Math Co- July 1993 - IBM introduces its clock-tripled 25/75MHz Blue Lightning 486-based processor. January 1995 - Advanced Micro Devices and Intel settle all outstanding processor related legal issues. Advanced Micro Devices pays Intel US$58 million in damages, and Intel pays US$18 million for breach of contract damages. Advanced Micro Devices retains full rights to microcode in Intel386 and Intel486 chips. TECHNOLOGY Page 4
A 32-bit microprocessor introduced by Intel in 1993. It contains 3.3 million transistors, nearly triple the number contained in its predecessor, the 80486 chip. Though still in production, the processor has been superseded by the Pro and II microprocessors. 64 bit Expansion Bus 64 bit External Bus 64 bit Internal Bus 60 to 200Mhz Clock Speeds Integrated FPU in CPU Math Co- The was the name Intel gave the 80586 version because it could not legally protect the name "586" to prevent other companies from using it - and in fact, the compatible CPU from NexGen is called the Nx586 (early 1995). Due to its popularity, the 80x86 line has been the most widely cloned processors, from the NEC V20/V30 (slightly faster clones of the 8088/8086 (could also run 8085 code)), AMD and Cyrix clones of the 80386 and 80486, to versions of the within less than two years of its introduction. Manufacturer Family Name Intel Code name "P5" "P54C" General Information Generation Motherboard Generation Fifth Fifth Version P60 P66 P75 P90 P100 P120 P133 P150 P166 P200 Introduced March 1993 Oct. 1994 March 1994 March 1995 June 1995 Jan. 1996 Jan. 1996 June 1996 Speed Specifications Memory Bus Clock Multiplier 60 66 50 60 66 60 66 60 66 66 1.0 1.5 2.0 2.5 3.0 60 66 75 90 100 120 133 150 166 200 Packaging Packaging Style 273-Pin PGA Motherboard Interface 296-Pin SPGA Socket 4 Socket 5, Socket 7 Socket 7 TECHNOLOGY Page 5
MMX 64 bit Expansion Bus 64 bit External Bus 64 bit Internal Bus 166 to 233Mhz Clock Speeds Integrated FPU in CPU Math Co- MMX (initially reported as Multimedia extension, but later said by Intel to mean Matrix Math extension) is very similar to the earlier SPARC VIS or HP-PA MAX, or later MIPS MDMX instructions - they perform integer operations on vectors of 8, 16, or 32 bit words, using the 80 bit FPU stack elements as eight 64 bit registers. The P55C version (January 1997) is the first Intel CPU to include MMX instructions, followed by the AMD K6, and II. Cyrix also added these instructions in its M2 CPU (6x86MX, June 1997), as well as IDT with its C6. General Information Manufacturer Family Name Code name Generation Intel with MMX Technology "P55C" Fifth Version with MMX 166 with MMX 200 with MMX 233 Introduced Jan. 1997 June 1997 Speed Specifications Packaging Memory Bus Clock Multiplier Speed (MHz) Transistors (millions) Packaging Style Motherboard Interface 66 2.5 3.0 166 200 233 4.5 296-Pin SPGA Socket 7 with 2.8V Core 3.5 (jumper as 1.5) TECHNOLOGY Page 6
Interestingly, the old architecture is such a barrier to improvements that most of the compatible CPUs (NexGen Nx586/Nx686, AMD K5, IDT-C6), and even the " Pro" ('s successor, late 1995) don't clone the, but emulate it with specialized hardware decoders like those introduced in the National Semiconductor Swordfish, which convert instructions to RISC-like instructions which are executed on specially designed superscalar RISC-style cores faster than the itself. Intel also used BiCMOS in the and Pro to achieve clock rates competitive with CMOS loadstore processors (the P55C (early 1997) version is a pure CMOS design). Pro 64 bit Expansion Bus 64 bit External Bus 64 bit Internal Bus 36 Bit Memory Address 2 36 = 68,719,476,736 = 67,108,864 Kb = 64GB Physical Memory 150 to 200Mhz Clock Speeds Real, Protected, Virtual Pro. Address Modes Supported Integrated FPU in CPU Math Co- 5.5 million transistors Not MMX capable 66 Mhz System Board Manufacturer Family Name Code name Intel Pro "P6" General Information Generation Version Sixth Pro 150 Pro 166 Pro 180 Pro 200 (256 KB) Pro 200 (512 KB) Pro 200 (1 MB) Introduced Nov. 1995 1996 Jan. 1997 Speed Specifications Memory Bus Clock Multiplier 60 66 60 66 2.5 3.0 150 166 180 200 Packaging Packaging Style 387-Pin Dual SPGA TECHNOLOGY Page 7
Motherboard Interface Socket 8 II 64 bit Expansion Bus 64 bit External Bus 64 bit Internal Bus 36 Bit Memory Address 2 36 = 68,719,476,736 = 67,108,864 Kb = 64GB Physical Memory 233 to 333Mhz Clock Speeds Real, Protected, Virtual Pro. Address Modes Supported Integrated FPU in CPU Math Co- 7.5 million transistors MMX capable 66 and 100 Mhz System Board Manufacturer Family Name Intel II General Information Code name "Klamath" "Deschutes" Generation Sixth Version II 233 II 266 II 300 II 333 Introduced May 1997 February 1998 Speed Specifications Memory Bus Clock Multiplier 66 3.5 4.0 4.5 5.0 233 266 300 333 Packaging Style 242-Pin SEC Packaging Motherboard Interface Level 2 Cache Bus Speed Slot 1 116 MHz 133 MHz 150 MHz 166 MHz Multiprocessing Dual (SMP) with compatible motherboard TECHNOLOGY Page 8
Internal Architecture Instruction Set MMX Support Modes x86 plus and Pro extensions Yes Real, Protected, Virtual Real Celeron 64 bit Expansion Bus 64 bit External Bus 64 bit Internal Bus 36 Bit Memory Address 2 36 = 68,719,476,736 = 67,108,864 Kb = 64GB Physical Memory 333 to 533Mhz Clock Speeds Real, Protected, Virtual Pro. Address Modes Supported Integrated FPU in CPU Math Co- 19 million transistors MMX capable 66 Mhz System Board TECHNOLOGY Page 9
Technical Specifications 8086 6/8/78 8088 6/1/79 80286 2/1/82 Intel386(TM)DX Microprocessor Intel386(TM)SX Microprocessor Intel486(TM)DX Microprocessor Intel486(TM)SX Microprocessor Pro Introduction Date 10/17/85 6/16/88 4/10/89 4/22/91 3/22/93 3/27/95 Clock Speeds 5 MHz 8 MHz 10 MHz 5 MHz 8 MHz 8 MHz 10 MHz 12 MHz 16 MHz 20 MHz 25 MHz 33 MHz 16 MHz 20 MHz 25 MHz 33 MHz 50 MHz 16 MHz 20 MHz 25 MHz 33 MHz 60MHz 66MHz 75MHz 90MHz 100MHz 120MHz 133MHz 150MHz 166MHz 150MHz 180MHz 200MHz Bus Width Number of Transistors 16 bits 29,000 (3 microns) 8 bits 16 bits 29,000 (3 microns) 134,000 (1.5 microns) 32 bits 275,000 (1 micron) 16 bits 275,000 (1 micron) 32 bits 1,200,000 (1 micron,.8 micron with 50 MHz) 32 bits 1,185,000 (.8 micron) 32 bits 32 bits 3.1 million (.8 micron) Addressable Memory 1 Megabyte 16 Megabytes 4 gigabytes 4 gigabytes 4 gigabytes 4 gigabytes 4 gigabytes Virtual Memory 1 gigabyte 64 64 64 64 64 5.5 million (.32 micron) 4 gigabytes 64 Brief Description 10X the performance of the 8080 Identical to 8086 except for its 8-bit external bus 3-6X the performance of the 8086 First X86 chip to handle 32-bit data sets 16-bit address bus enabled low-cost 32-bit processing Level 1 cache on chip identical in design to Intel486(TM) DX but without math coprocessor superscaler architecture brought 5X the performance of the 33-MHz Intel486 DX processor dynamic execution architecture drives high- TECHNOLOGY Page 10
performing processor TECHNOLOGY Page 11